int tsi108_direct_write_config(struct pci_bus *bus, unsigned int devfunc, int offset, int len, u32 val) { volatile unsigned char *cfg_addr; if (ppc_md.pci_exclude_device) if (ppc_md.pci_exclude_device(bus->number, devfunc)) return PCIBIOS_DEVICE_NOT_FOUND; cfg_addr = (unsigned char *)(tsi_mk_config_addr(bus->number, devfunc, offset) | (offset & 0x03)); #ifdef DEBUG printk("PCI CFG write : "); printk("%d:0x%x:0x%x ", bus->number, devfunc, offset); printk("%d ADDR=0x%08x ", len, (uint) cfg_addr); printk("data = 0x%08x\n", val); #endif switch (len) { case 1: out_8((u8 *) cfg_addr, val); break; case 2: out_le16((u16 *) cfg_addr, val); break; default: out_le32((u32 *) cfg_addr, val); break; } return PCIBIOS_SUCCESSFUL; }
int tsi108_direct_read_config(struct pci_bus *bus, unsigned int devfn, int offset, int len, u32 * val) { volatile unsigned char *cfg_addr; struct pci_controller *hose = pci_bus_to_host(bus); u32 temp; if (ppc_md.pci_exclude_device) if (ppc_md.pci_exclude_device(hose, bus->number, devfn)) return PCIBIOS_DEVICE_NOT_FOUND; cfg_addr = (unsigned char *)(tsi_mk_config_addr(bus->number, devfn, offset) | (offset & 0x03)); switch (len) { case 1: __tsi108_read_pci_config(temp, cfg_addr, "lbzx"); break; case 2: __tsi108_read_pci_config(temp, cfg_addr, "lhbrx"); break; default: __tsi108_read_pci_config(temp, cfg_addr, "lwbrx"); break; } *val = temp; #ifdef DEBUG if ((0xFFFFFFFF != temp) && (0xFFFF != temp) && (0xFF != temp)) { printk("PCI CFG read : "); printk("%d:0x%x:0x%x ", bus->number, devfn, offset); printk("%d ADDR=0x%08x ", len, (uint) cfg_addr); printk("data = 0x%x\n", *val); } #endif return PCIBIOS_SUCCESSFUL; }