void Foam::combustionModels::PaSR<Type>::correct()
{
if (this->active())
{
laminar<Type>::correct();
if (turbulentReaction_)
{
tmp<volScalarField> tepsilon(this->turbulence().epsilon());
const volScalarField& epsilon = tepsilon();
tmp<volScalarField> tmuEff(this->turbulence().muEff());
const volScalarField& muEff = tmuEff();
tmp<volScalarField> ttc(this->tc());
const volScalarField& tc = ttc();
tmp<volScalarField> trho(this->rho());
const volScalarField& rho = trho();
forAll(epsilon, i)
{
scalar tk =
Cmix_*sqrt(max(muEff[i]/rho[i]/(epsilon[i] + SMALL), 0));
if (tk > SMALL)
{
kappa_[i] = tc[i]/(tc[i] + tk);
}
else
{
kappa_[i] = 1.0;
}
}
}
void Foam::combustionModels::EDC<ReactionThermo>::correct()
{
tmp<volScalarField> tepsilon(this->turbulence().epsilon());
const volScalarField& epsilon = tepsilon();
tmp<volScalarField> tmu(this->turbulence().mu());
const volScalarField& mu = tmu();
tmp<volScalarField> tk(this->turbulence().k());
const volScalarField& k = tk();
tmp<volScalarField> trho(this->rho());
const volScalarField& rho = trho();
scalarField tauStar(epsilon.size(), 0);
if (version_ == EDCversions::v2016)
{
tmp<volScalarField> ttc(this->chemistryPtr_->tc());
const volScalarField& tc = ttc();
forAll(tauStar, i)
{
const scalar nu = mu[i]/(rho[i] + small);
const scalar Da =
max(min(sqrt(nu/(epsilon[i] + small))/tc[i], 10), 1e-10);
const scalar ReT = sqr(k[i])/(nu*epsilon[i] + small);
const scalar CtauI = min(C1_/(Da*sqrt(ReT + 1)), 2.1377);
const scalar CgammaI =
max(min(C2_*sqrt(Da*(ReT + 1)), 5), 0.4082);
const scalar gammaL =
CgammaI*pow025(nu*epsilon[i]/(sqr(k[i]) + small));
tauStar[i] = CtauI*sqrt(nu/(epsilon[i] + small));
if (gammaL >= 1)
{
kappa_[i] = 1;
}
else
{
kappa_[i] =
max
(
min
(
pow(gammaL, exp1_)/(1 - pow(gammaL, exp2_)),
1
),
0
);
}
}
}
void Foam::combustionModels::PaSR<Type>::correct()
{
if (this->active())
{
const scalar t = this->mesh().time().value();
const scalar dt = this->mesh().time().deltaTValue();
if (!useReactionRate_)
{
this->chemistryPtr_->solve(t - dt, dt);
}
else
{
this->chemistryPtr_->calculate();
}
if (turbulentReaction_)
{
tmp<volScalarField> trho(this->rho());
const volScalarField& rho = trho();
tmp<volScalarField> tepsilon(this->turbulence().epsilon());
const volScalarField& epsilon = tepsilon();
tmp<volScalarField> tmuEff(this->turbulence().muEff());
const volScalarField& muEff = tmuEff();
tmp<volScalarField> ttc(tc());
const volScalarField& tc = ttc();
forAll(epsilon, i)
{
if (epsilon[i] > 0)
{
scalar tk =
Cmix_*Foam::sqrt(muEff[i]/rho[i]/(epsilon[i] + SMALL));
// Chalmers PaSR model
if (!useReactionRate_)
{
kappa_[i] = (dt + tc[i])/(dt + tc[i] + tk);
}
else
{
kappa_[i] = tc[i]/(tc[i] + tk);
}
}
else
{
// Return to laminar combustion
kappa_[i] = 1.0;
}
}
}
else
{
kappa_ = 1.0;
}
}
double SelectionBar::GetRightTime()
{
if (mRightEndButton->GetValue())
return mRightTime->GetTimeValue();
else {
// What would be shown if we were showing the end time
TimeTextCtrl ttc(this, wxID_ANY, wxT(""), 0.0, mRate);
ttc.SetFormatString(mRightTime->GetFormatString());
ttc.SetSampleRate(mRate);
ttc.SetTimeValue(mEnd);
return ttc.GetTimeValue();
}
}
void seromap_power_init(DEV_OMAP *dev, TTYINIT_OMAP *dip)
{
#if 0
// Initialize power management structures
pmd_attr_init(&dev->driver_pmd);
pmd_attr_setmodes(&dev->driver_pmd, PM_MODE_ACTIVE, drv_modes, SEROMAP_NUM_POWER_MODES);
pmd_attr_setpower(&dev->driver_pmd, seromap_setpower, dev);
// Register Power Management and provide necessary data to IO-Char
dev->tty.power.pwm_attr = &dev->driver_pmd;
dev->tty.power.pwm_event = &dev->pwm_event;
ttc(TTC_INIT_POWER, &dev->tty, dip->pwm_init);
#endif
}
int
main(int argc, char *argv[]) {
struct passwd* pw;
uid_t uid = 0;
gid_t gid = 0;
ttyctrl.max_devs = 16;
ttc(TTC_INIT_PROC, &ttyctrl, 24);
if(options(argc, argv) == 0) {
fprintf(stderr, "%s: No serial ports found\n", argv[0]);
exit(0);
}
if (user_parm != NULL) {
if(*user_parm >= '0' && *user_parm <= '9') {
uid = strtol(user_parm, (char**)&user_parm, 0);
if(*user_parm++ == ':') {
gid = strtol(user_parm, (char**)&user_parm, 0);
}
}
else if (( pw = getpwnam( user_parm ) ) != NULL ) {
uid = pw->pw_uid;
gid = pw->pw_gid;
}
if(setgid(gid) == -1 || setuid(uid) == -1 ) {
fprintf(stderr, "%s: unable to set uid/gid - %s", "devc-seromap", strerror(errno));
return -1;
}
}
ttc(TTC_INIT_START, &ttyctrl, 0);
return 0;
}
DEV_OMAP *
create_device(TTYINIT_OMAP *dip, unsigned unit, unsigned maxim_xcvr_kick) {
DEV_OMAP *dev;
unsigned i;
uintptr_t port;
unsigned char msr;
unsigned char tlr = 0, tcr = 0;
#ifdef PWR_MAN
clk_enable_t clk_cfg = clk_enable_none;
#endif
// Get a device entry and the input/output buffers for it.
if ((dev = malloc(sizeof(*dev))) == NULL)
{
slogf(_SLOG_SETCODE(_SLOGC_CHAR, 0), _SLOG_ERROR, "io-char: Allocation of device entry failed (%d)", errno);
return (dev);
}
memset(dev, 0, sizeof(*dev));
// Get buffers.
dev->tty.ibuf.head = dev->tty.ibuf.tail = dev->tty.ibuf.buff = malloc(dev->tty.ibuf.size = dip->tty.isize);
if (dev->tty.ibuf.buff == NULL)
{
slogf(_SLOG_SETCODE(_SLOGC_CHAR, 0), _SLOG_ERROR, "io-char: Allocation of input buffer failed (%d)", errno);
free(dev);
return (NULL);
}
dev->tty.obuf.head = dev->tty.obuf.tail = dev->tty.obuf.buff = malloc(dev->tty.obuf.size = dip->tty.osize);
if (dev->tty.obuf.buff == NULL)
{
slogf(_SLOG_SETCODE(_SLOGC_CHAR, 0), _SLOG_ERROR, "io-char: Allocation of output buffer failed (%d)", errno);
free(dev->tty.ibuf.buff);
free(dev);
return (NULL);
}
dev->tty.cbuf.head = dev->tty.cbuf.tail = dev->tty.cbuf.buff = malloc(dev->tty.cbuf.size = dip->tty.csize);
if (dev->tty.cbuf.buff == NULL)
{
slogf(_SLOG_SETCODE(_SLOGC_CHAR, 0), _SLOG_ERROR, "io-char: Allocation of canonical buffer failed (%d)", errno);
free(dev->tty.ibuf.buff);
free(dev->tty.obuf.buff);
free(dev);
return (NULL);
}
if (dip->tty.highwater)
dev->tty.highwater = dip->tty.highwater;
else
dev->tty.highwater = dev->tty.ibuf.size - (FIFO_SIZE * 2);
strcpy(dev->tty.name, dip->tty.name);
dev->tty.baud = dip->tty.baud;
dev->tty.fifo = dip->tty.fifo;
dev->tty.verbose = dip->tty.verbose;
port = mmap_device_io(OMAP_UART_SIZE, dip->tty.port);
for (i = 0; i < OMAP_UART_SIZE; i += 4)
dev->port[i] = port + i;
dev->intr = dip->tty.intr;
dev->clk = dip->tty.clk;
dev->div = dip->tty.div;
dev->tty.flags = EDIT_INSERT | LOSES_TX_INTR;
dev->tty.c_cflag = dip->tty.c_cflag;
dev->tty.c_iflag = dip->tty.c_iflag;
dev->tty.c_lflag = dip->tty.c_lflag;
dev->tty.c_oflag = dip->tty.c_oflag;
dev->tty.lflags = dip->tty.lflags;
if (dip->tty.logging_path[0] != NULL)
dev->tty.logging_path = strdup(dip->tty.logging_path);
#ifdef PWR_MAN
dev->physbase = dip->tty.port;
if (omap_clock_toggle_init(dev) != EOK)
{
slogf(_SLOG_SETCODE(_SLOGC_CHAR, 0), _SLOG_ERROR, "io-char: Fail to initialize clocks for PM!");
free(dev->tty.ibuf.buff);
free(dev->tty.obuf.buff);
free(dev);
return (NULL);
}
#ifdef WINBT
clk_cfg = clk_enable_smart_wkup;
if (omap_force_rts_init(dev) != EOK)
{
slogf(_SLOG_SETCODE(_SLOGC_CHAR, 0), _SLOG_ERROR, "io-char: Fail to initialize force_rts for PM!");
free(dev->tty.ibuf.buff);
free(dev->tty.obuf.buff);
free(dev);
return (NULL);
}
#endif
omap_clock_enable(dev, clk_cfg);
#ifdef WINBT
bt_ctrl_init();
#endif
#endif
/* Set auto_rts mode */
dev->auto_rts_enable = dip->auto_rts_enable;
// Do not enable MSR interrupt
dev->no_msr_int = dip->no_msr_int;
// Initialize termios cc codes to an ANSI terminal.
ttc(TTC_INIT_CC, &dev->tty, 0);
// Initialize the device's name.
// Assume that the basename is set in device name. This will attach
// to the path assigned by the unit number/minor number combination
unit = SET_NAME_NUMBER(unit) | NUMBER_DEV_FROM_USER;
ttc(TTC_INIT_TTYNAME, &dev->tty, unit);
// see if we have a maxim rs-232 transceiver that needs to be
// kicked after it goes to sleep
dev->kick_maxim = maxim_xcvr_kick;
// Only setup IRQ handler for non-pcmcia devices.
// Pcmcia devices will have this done later when card is inserted.
if (dip->tty.port != 0 && dip->tty.intr != _NTO_INTR_SPARE) {
#ifdef OMAP5910
/*
* Don't change default mode set in the very distant past. Even though
* MODE_SELECT should be DISABLE before changing DLH, DLL.
*/
// enable the UART
write_omap(dev->port[OMAP_UART_MDR1], OMAP_MDR1_MODE_16X);
#else
/*
* TRM states: Before initializing or modifying clock parameter controls
* (DLH, DLL), MODE_SELECT must be set to 0x7 (DISABLE). Failure to observe
* this rule can result in unpredictable module behavior.
*/
write_omap(dev->port[OMAP_UART_MDR1], OMAP_MDR1_MODE_DISABLE);
#endif
/* Work around for silicon errata i202 states: */
/* Need a delay = 5 L4 clock cycles + 5 UART functional clock cycle (@48MHz = ~0.2uS) */
nanospin_ns(200);
/* Clear FIFOs */
set_port(dev->port[OMAP_UART_FCR], OMAP_FCR_RXCLR | OMAP_FCR_TXCLR, OMAP_FCR_RXCLR | OMAP_FCR_TXCLR);
/* Wait for FIFO to empty: when empty, RX_FIFO_E bit is 0 and TX_FIFO_E bit is 1 */
i = 5;
while ((read_omap(dev->port[OMAP_UART_LSR]) & (OMAP_UART_LSR_THRE | OMAP_UART_LSR_DR)) != OMAP_UART_LSR_THRE)
{
nanospin_ns(200);
if (--i == 0)
{
break; /* No need to do anything drastic if FIFO is still not empty */
}
}
// enable access to divisor registers
write_omap(dev->port[OMAP_UART_LCR], OMAP_LCR_DLAB);
write_omap(dev->port[OMAP_UART_DLL], 0);
write_omap(dev->port[OMAP_UART_DLH], 0);
/* Switch to config mode B to get access to EFR Register */
write_omap(dev->port[OMAP_UART_LCR], 0xBF);
/* Enable access to TLR register */
set_port(dev->port[OMAP_UART_EFR], OMAP_EFR_ENHANCED, OMAP_EFR_ENHANCED);
/* Switch to operational mode to get acces to MCR register */
write_omap(dev->port[OMAP_UART_LCR], 0x00);
/* set MCR bit 6 to enable access to TCR and TLR registers */
set_port(dev->port[OMAP_UART_MCR], OMAP_MCR_TCRTLR, OMAP_MCR_TCRTLR);
write_omap(dev->port[OMAP_UART_FCR], OMAP_FCR_ENABLE|OMAP_FCR_RXCLR|OMAP_FCR_TXCLR);
tcr = 0x0e; /* set auto-rts assert at 56 bytes, restore at 0 bytes */
if (dev->tty.fifo)
{
/* Set RX fifo trigger level */
switch (dev->tty.fifo >> 4) {
case FIFO_TRIG_8:
default:
tlr = 0x20;
break;
case FIFO_TRIG_16: tlr = 0x40; break;
case FIFO_TRIG_32: tlr = 0x80; break;
case FIFO_TRIG_56: tlr = 0xe0; break;
case FIFO_TRIG_60:
tlr = 0xf0;
tcr = 0x0f; /* Ensure auto-rts trigger is not less the RX trigger */
break;
}
/* Set TX fifo trigger level */
switch (dev->tty.fifo & 0x0f) {
case FIFO_TRIG_8:
default:
tlr |= 0x02;
break;
case FIFO_TRIG_16: tlr |= 0x04; break;
case FIFO_TRIG_32: tlr |= 0x08; break;
case FIFO_TRIG_56: tlr |= 0x0e; break;
case FIFO_TRIG_60: tlr |= 0x0f; break;
}
}
write_omap(dev->port[OMAP_UART_TCR], tcr);
write_omap(dev->port[OMAP_UART_TLR], tlr);
#ifdef PWR_MAN
write_omap(dev->port[OMAP_UART_SCR], OMAP_SCR_WAKEUPEN);
#else
write_omap(dev->port[OMAP_UART_SCR], 0x00);
#endif
/* Switch back to Config mode B to gain access to EFR again */
write_omap(dev->port[OMAP_UART_LCR], 0xBF);
/* remove access to TLR register */
set_port(dev->port[OMAP_UART_EFR], OMAP_EFR_ENHANCED, 0);
/* Switch to operational mode to get acces to MCR register */
write_omap(dev->port[OMAP_UART_LCR], 0x00);
/* clr MCR bit 6 to remove access to TCR and TLR registers */
set_port(dev->port[OMAP_UART_MCR], OMAP_MCR_TCRTLR, 0);
ser_stty(dev);
ser_attach_intr(dev);
}
eval_t NegaScout::evaluate(
const Board& board,
unsigned depth,
bool passed,
eval_t alpha,
eval_t beta) {
//std::cerr << board.to_zebra_str() << std::endl;
TransTableController<TransTable> ttc(*p_trans_table_);
if (!ttc.init_alpha_beta(board, alpha, beta)) {
return ttc.get_return_value();
}
eval_t g = alpha;
if (depth == 0) {
leaf_count_++;
g = p_evaluator_->evaluate(board, BLACK);
} else {
node_count_++;
eval_t a = alpha;
eval_t b = beta;
bool first = true;
BitBoard::data_type moves = board.get_move_bit();
//std::cerr << moves.to_str() << std::endl;
unsigned moves_size = moves.size();
if (moves_size == 0) {
if (passed) {
g = board.get_score() / 1024;
} else {
Board next_board = board.make_inverse();
g = -evaluate(next_board, depth - 1, true, -beta, -alpha);
}
} else {
if (depth >= max_depth_) {
std::cerr << moves.to_str() << std::endl;
}
BitMoveOrderingIterator it(board, *p_evaluator_);
while (it.has_next()) {
/* while (moves.any()) {
BitBoard::data_type next = moves.get_next_bit();
moves ^= next;
BitBoard next_board(board);
next_board.move(next);
next_board.inverse();
*/
BitBoard next_board = it.get_next();
if (depth >= max_depth_ - 2) {
BitMatrix move = board.get_blank_bit() ^ next_board.get_blank_bit();
std::cerr << "move: " << Position(move.get_next()).to_str()
<< " " << move.to_str() << std::endl;
}
/*
// scout
eval_t val = -evaluate(next_board, depth - 1, false, -b, -a);
if (a < val && val < beta && !first)
val = -evaluate(next_board, depth - 1, false, -beta, -val);
*/
eval_t val = -evaluate(next_board, depth - 1, false, -b, -a);
//a = std::max(a, val);
if (a < val) {
if (depth == max_depth_)
next_move_ = (board.get_blank_bit() ^ next_board.get_blank_bit()).get_next();
a = val;
}
g = std::max(g, val);
if (depth == max_depth_) {
std::cerr << "a: " << a << ", g: " << g << std::endl;
}
if (a >= beta) {
if (depth == max_depth_) {
next_move_ = (board.get_blank_bit() ^ next_board.get_blank_bit()).get_next();
//next_move_ = next.get_next();
std::cerr << "next: " << next_move_ << std::endl;
}
return a;
}
//b = a + 1;
first = false;
it.go_next();
}
}
}
ttc.update_alpha_beta(board, g, alpha, beta);
return g;
}
