/********************************************************************************
* Disconnect from the controller completely, in preparation for unload.
*/
static int
twe_detach(device_t dev)
{
struct twe_softc *sc = device_get_softc(dev);
int s, error;
debug_called(4);
error = EBUSY;
s = splbio();
if (sc->twe_state & TWE_STATE_OPEN)
goto out;
/*
* Shut the controller down.
*/
if ((error = twe_shutdown(dev)))
goto out;
twe_free(sc);
error = 0;
out:
splx(s);
return(error);
}
/********************************************************************************
* Disconnect from the controller completely, in preparation for unload.
*/
static int
twe_detach(device_t dev)
{
struct twe_softc *sc = device_get_softc(dev);
debug_called(4);
TWE_IO_LOCK(sc);
if (sc->twe_state & TWE_STATE_OPEN) {
TWE_IO_UNLOCK(sc);
return (EBUSY);
}
sc->twe_state |= TWE_STATE_DETACHING;
TWE_IO_UNLOCK(sc);
/*
* Shut the controller down.
*/
if (twe_shutdown(dev)) {
TWE_IO_LOCK(sc);
sc->twe_state &= ~TWE_STATE_DETACHING;
TWE_IO_UNLOCK(sc);
return (EBUSY);
}
twe_free(sc);
return(0);
}
/********************************************************************************
* Allocate resources, initialise the controller.
*/
static int
twe_attach(device_t dev)
{
struct twe_softc *sc;
int rid, error;
u_int32_t command;
debug_called(4);
/*
* Initialise the softc structure.
*/
sc = device_get_softc(dev);
sc->twe_dev = dev;
/*
* Make sure we are going to be able to talk to this board.
*/
command = pci_read_config(dev, PCIR_COMMAND, 2);
if ((command & PCIM_CMD_PORTEN) == 0) {
twe_printf(sc, "register window not available\n");
return(ENXIO);
}
/*
* Force the busmaster enable bit on, in case the BIOS forgot.
*/
command |= PCIM_CMD_BUSMASTEREN;
pci_write_config(dev, PCIR_COMMAND, command, 2);
/*
* Allocate the PCI register window.
*/
rid = TWE_IO_CONFIG_REG;
if ((sc->twe_io = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE)) == NULL) {
twe_printf(sc, "can't allocate register window\n");
twe_free(sc);
return(ENXIO);
}
sc->twe_btag = rman_get_bustag(sc->twe_io);
sc->twe_bhandle = rman_get_bushandle(sc->twe_io);
/*
* Allocate the parent bus DMA tag appropriate for PCI.
*/
if (bus_dma_tag_create(NULL, /* parent */
1, 0, /* alignment, boundary */
BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
MAXBSIZE, TWE_MAX_SGL_LENGTH, /* maxsize, nsegments */
BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
BUS_DMA_ALLOCNOW, /* flags */
&sc->twe_parent_dmat)) {
twe_printf(sc, "can't allocate parent DMA tag\n");
twe_free(sc);
return(ENOMEM);
}
/*
* Allocate and connect our interrupt.
*/
rid = 0;
if ((sc->twe_irq = bus_alloc_resource(sc->twe_dev, SYS_RES_IRQ, &rid, 0, ~0, 1, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
twe_printf(sc, "can't allocate interrupt\n");
twe_free(sc);
return(ENXIO);
}
if (bus_setup_intr(sc->twe_dev, sc->twe_irq, INTR_TYPE_BIO | INTR_ENTROPY, twe_pci_intr, sc, &sc->twe_intr)) {
twe_printf(sc, "can't set up interrupt\n");
twe_free(sc);
return(ENXIO);
}
/*
* Create DMA tag for mapping objects into controller-addressable space.
*/
if (bus_dma_tag_create(sc->twe_parent_dmat, /* parent */
1, 0, /* alignment, boundary */
BUS_SPACE_MAXADDR, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
MAXBSIZE, TWE_MAX_SGL_LENGTH,/* maxsize, nsegments */
BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
0, /* flags */
&sc->twe_buffer_dmat)) {
twe_printf(sc, "can't allocate data buffer DMA tag\n");
twe_free(sc);
return(ENOMEM);
}
/*
* Initialise the controller and driver core.
*/
if ((error = twe_setup(sc)))
return(error);
/*
* Print some information about the controller and configuration.
*/
twe_describe_controller(sc);
/*
* Create the control device.
*/
sc->twe_dev_t = make_dev(&twe_cdevsw, device_get_unit(sc->twe_dev), UID_ROOT, GID_OPERATOR,
S_IRUSR | S_IWUSR, "twe%d", device_get_unit(sc->twe_dev));
sc->twe_dev_t->si_drv1 = sc;
/*
* Schedule ourselves to bring the controller up once interrupts are available.
* This isn't strictly necessary, since we disable interrupts while probing the
* controller, but it is more in keeping with common practice for other disk
* devices.
*/
sc->twe_ich.ich_func = twe_intrhook;
sc->twe_ich.ich_arg = sc;
if (config_intrhook_establish(&sc->twe_ich) != 0) {
twe_printf(sc, "can't establish configuration hook\n");
twe_free(sc);
return(ENXIO);
}
return(0);
}
/********************************************************************************
* Allocate resources, initialise the controller.
*/
static int
twe_attach(device_t dev)
{
struct twe_softc *sc;
int rid, error;
u_int32_t command;
debug_called(4);
/*
* Initialise the softc structure.
*/
sc = device_get_softc(dev);
sc->twe_dev = dev;
sysctl_ctx_init(&sc->sysctl_ctx);
sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
SYSCTL_STATIC_CHILDREN(_hw), OID_AUTO,
device_get_nameunit(dev), CTLFLAG_RD, 0, "");
if (sc->sysctl_tree == NULL) {
twe_printf(sc, "cannot add sysctl tree node\n");
return (ENXIO);
}
SYSCTL_ADD_STRING(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree),
OID_AUTO, "driver_version", CTLFLAG_RD, TWE_DRIVER_VERSION_STRING, 0,
"TWE driver version");
/*
* Make sure we are going to be able to talk to this board.
*/
command = pci_read_config(dev, PCIR_COMMAND, 2);
if ((command & PCIM_CMD_PORTEN) == 0) {
twe_printf(sc, "register window not available\n");
return(ENXIO);
}
/*
* Force the busmaster enable bit on, in case the BIOS forgot.
*/
command |= PCIM_CMD_BUSMASTEREN;
pci_write_config(dev, PCIR_COMMAND, command, 2);
/*
* Allocate the PCI register window.
*/
rid = TWE_IO_CONFIG_REG;
if ((sc->twe_io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,
RF_ACTIVE)) == NULL) {
twe_printf(sc, "can't allocate register window\n");
twe_free(sc);
return(ENXIO);
}
sc->twe_btag = rman_get_bustag(sc->twe_io);
sc->twe_bhandle = rman_get_bushandle(sc->twe_io);
/*
* Allocate the parent bus DMA tag appropriate for PCI.
*/
if (bus_dma_tag_create(NULL, /* parent */
1, 0, /* alignment, boundary */
BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
MAXBSIZE, TWE_MAX_SGL_LENGTH, /* maxsize, nsegments */
BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
0, /* flags */
NULL, /* lockfunc */
NULL, /* lockarg */
&sc->twe_parent_dmat)) {
twe_printf(sc, "can't allocate parent DMA tag\n");
twe_free(sc);
return(ENOMEM);
}
/*
* Allocate and connect our interrupt.
*/
rid = 0;
if ((sc->twe_irq = bus_alloc_resource_any(sc->twe_dev, SYS_RES_IRQ,
&rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) {
twe_printf(sc, "can't allocate interrupt\n");
twe_free(sc);
return(ENXIO);
}
if (bus_setup_intr(sc->twe_dev, sc->twe_irq, INTR_TYPE_BIO | INTR_ENTROPY,
NULL, twe_pci_intr, sc, &sc->twe_intr)) {
twe_printf(sc, "can't set up interrupt\n");
twe_free(sc);
return(ENXIO);
}
/*
* Create DMA tag for mapping command's into controller-addressable space.
*/
if (bus_dma_tag_create(sc->twe_parent_dmat, /* parent */
1, 0, /* alignment, boundary */
BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
sizeof(TWE_Command) *
TWE_Q_LENGTH, 1, /* maxsize, nsegments */
BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
0, /* flags */
NULL, /* lockfunc */
NULL, /* lockarg */
&sc->twe_cmd_dmat)) {
twe_printf(sc, "can't allocate data buffer DMA tag\n");
twe_free(sc);
return(ENOMEM);
}
/*
* Allocate memory and make it available for DMA.
*/
if (bus_dmamem_alloc(sc->twe_cmd_dmat, (void **)&sc->twe_cmd,
BUS_DMA_NOWAIT, &sc->twe_cmdmap)) {
twe_printf(sc, "can't allocate command memory\n");
return(ENOMEM);
}
bus_dmamap_load(sc->twe_cmd_dmat, sc->twe_cmdmap, sc->twe_cmd,
sizeof(TWE_Command) * TWE_Q_LENGTH,
twe_setup_request_dmamap, sc, 0);
bzero(sc->twe_cmd, sizeof(TWE_Command) * TWE_Q_LENGTH);
/*
* Create DMA tag for mapping objects into controller-addressable space.
*/
if (bus_dma_tag_create(sc->twe_parent_dmat, /* parent */
1, 0, /* alignment, boundary */
BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
MAXBSIZE, TWE_MAX_SGL_LENGTH,/* maxsize, nsegments */
BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
BUS_DMA_ALLOCNOW, /* flags */
busdma_lock_mutex, /* lockfunc */
&Giant, /* lockarg */
&sc->twe_buffer_dmat)) {
twe_printf(sc, "can't allocate data buffer DMA tag\n");
twe_free(sc);
return(ENOMEM);
}
/*
* Create DMA tag for mapping objects into controller-addressable space.
*/
if (bus_dma_tag_create(sc->twe_parent_dmat, /* parent */
1, 0, /* alignment, boundary */
BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
MAXBSIZE, 1, /* maxsize, nsegments */
BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */
0, /* flags */
NULL, /* lockfunc */
NULL, /* lockarg */
&sc->twe_immediate_dmat)) {
twe_printf(sc, "can't allocate data buffer DMA tag\n");
twe_free(sc);
return(ENOMEM);
}
/*
* Allocate memory for requests which cannot sleep or support continuation.
*/
if (bus_dmamem_alloc(sc->twe_immediate_dmat, (void **)&sc->twe_immediate,
BUS_DMA_NOWAIT, &sc->twe_immediate_map)) {
twe_printf(sc, "can't allocate memory for immediate requests\n");
return(ENOMEM);
}
/*
* Initialise the controller and driver core.
*/
if ((error = twe_setup(sc))) {
twe_free(sc);
return(error);
}
/*
* Print some information about the controller and configuration.
*/
twe_describe_controller(sc);
/*
* Create the control device.
*/
sc->twe_dev_t = make_dev(&twe_cdevsw, device_get_unit(sc->twe_dev), UID_ROOT, GID_OPERATOR,
S_IRUSR | S_IWUSR, "twe%d", device_get_unit(sc->twe_dev));
sc->twe_dev_t->si_drv1 = sc;
/*
* Schedule ourselves to bring the controller up once interrupts are available.
* This isn't strictly necessary, since we disable interrupts while probing the
* controller, but it is more in keeping with common practice for other disk
* devices.
*/
sc->twe_ich.ich_func = twe_intrhook;
sc->twe_ich.ich_arg = sc;
if (config_intrhook_establish(&sc->twe_ich) != 0) {
twe_printf(sc, "can't establish configuration hook\n");
twe_free(sc);
return(ENXIO);
}
return(0);
}
