/* assumes row autoincrement and activated nibble remap */ static void u8g_dev_ssd1327_2bit_write_4_pixel(u8g_t *u8g, u8g_dev_t *dev, uint8_t left, uint8_t right) { uint8_t d, tmp, cnt; static uint8_t buf[4]; buf[0] = 0; buf[1] = 0; buf[2] = 0; buf[3] = 0; cnt = 0; do { if ( left == 0 && right == 0 ) break; d = left; d &= 3; d <<= 4; tmp = right; tmp &= 3; d |= tmp; d <<= 2; buf[cnt] = d; left >>= 2; right >>= 2; cnt++; }while ( cnt < 4 ); u8g_WriteSequence(u8g, dev, 4, buf); }
uint8_t u8g_dev_st7565_lm6059_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) { switch(msg) { case U8G_DEV_MSG_INIT: u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_400NS); u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_lm6059_init_seq); break; case U8G_DEV_MSG_STOP: break; case U8G_DEV_MSG_PAGE_NEXT: { u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_lm6059_data_start); u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page)); /* select current page (ST7565R) */ u8g_SetAddress(u8g, dev, 1); /* data mode */ u8g_WriteSequence(u8g, dev, pb->width, pb->buf); u8g_SetChipSelect(u8g, dev, 0); u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_lm6059_data_start); u8g_WriteByte(u8g, dev, 0x0b0 | (2*pb->p.page+1)); /* select current page (ST7565R) */ u8g_SetAddress(u8g, dev, 1); /* data mode */ u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)(pb->buf)+pb->width); u8g_SetChipSelect(u8g, dev, 0); } break; case U8G_DEV_MSG_CONTRAST: u8g_SetChipSelect(u8g, dev, 1); u8g_SetAddress(u8g, dev, 0); /* instruction mode */ u8g_WriteByte(u8g, dev, 0x081); u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 2); u8g_SetChipSelect(u8g, dev, 0); return 1; case U8G_DEV_MSG_SLEEP_ON: u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_lm6059_sleep_on); return 1; case U8G_DEV_MSG_SLEEP_OFF: u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7565_lm6059_sleep_off); return 1; } return u8g_dev_pb16v1_base_fn(u8g, dev, msg, arg); }
uint8_t u8g_dev_uc1610_dogxl160_2x_gr_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) { switch(msg) { case U8G_DEV_MSG_INIT: u8g_InitCom(u8g, dev); u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_init_seq); break; case U8G_DEV_MSG_STOP: u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_stop_seq); break; case U8G_DEV_MSG_PAGE_NEXT: { u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_data_start); u8g_WriteByte(u8g, dev, 0x060 | (pb->p.page*2) ); /* select current page (UC1610) */ u8g_SetAddress(u8g, dev, 1); /* data mode */ if ( u8g_WriteSequence(u8g, dev, WIDTH, pb->buf) == 0 ) return 0; u8g_WriteEscSeqP(u8g, dev, u8g_dev_uc1610_dogxl160_data_start); u8g_WriteByte(u8g, dev, 0x060 | (pb->p.page*2+1) ); /* select current page (UC1610) */ u8g_SetAddress(u8g, dev, 1); /* data mode */ if ( u8g_WriteSequence(u8g, dev, WIDTH, pb->buf+WIDTH) == 0 ) return 0; u8g_SetChipSelect(u8g, dev, 0); } break; case U8G_DEV_MSG_CONTRAST: u8g_SetChipSelect(u8g, dev, 1); u8g_SetAddress(u8g, dev, 0); /* instruction mode */ u8g_WriteByte(u8g, dev, 0x081); u8g_WriteByte(u8g, dev, (*(uint8_t *)arg) >> 1); u8g_SetChipSelect(u8g, dev, 0); return 1; } return u8g_dev_pb16v2_base_fn(u8g, dev, msg, arg); }
uint8_t u8g_dev_ssd1351_128x128gh_332_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) { // u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); switch(msg) { case U8G_DEV_MSG_INIT: u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_50NS); u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1351_128x128gh_init_seq); break; case U8G_DEV_MSG_STOP: break; case U8G_DEV_MSG_PAGE_FIRST: u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1351_128x128_column_seq); break; case U8G_DEV_MSG_PAGE_NEXT: { u8g_uint_t x; uint8_t page_height; uint8_t i; u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); uint8_t *ptr = (uint8_t *)pb->buf; u8g_SetChipSelect(u8g, dev, 1); page_height = pb->p.page_y1; page_height -= pb->p.page_y0; page_height++; for( i = 0; i < page_height; i++ ) { for (x = 0; x < pb->width; x+=RGB332_STREAM_BYTES) { u8g_ssd1351_to_stream(ptr); u8g_WriteSequence(u8g, dev, RGB332_STREAM_BYTES*3, u8g_ssd1351_stream_bytes); ptr += RGB332_STREAM_BYTES; } } u8g_SetChipSelect(u8g, dev, 0); } break; case U8G_DEV_MSG_GET_MODE: return U8G_MODE_R3G3B2; } return u8g_dev_pb8h8_base_fn(u8g, dev, msg, arg); }
uint8_t u8g_dev_sbn1661_122x32_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) { switch(msg) { case U8G_DEV_MSG_INIT: u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_NONE); u8g_WriteEscSeqP(u8g, dev, u8g_dev_sbn1661_122x32_init_seq); break; case U8G_DEV_MSG_STOP: break; case U8G_DEV_MSG_PAGE_NEXT: { u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); u8g_SetAddress(u8g, dev, 0); /* command mode */ u8g_SetChipSelect(u8g, dev, 1); u8g_WriteByte(u8g, dev, 0x0b8 | pb->p.page); /* select current page (SBN1661/SED1520) */ u8g_WriteByte(u8g, dev, 0x000 ); /* set X address */ u8g_SetAddress(u8g, dev, 1); /* data mode */ u8g_WriteSequence(u8g, dev, WIDTH/2, pb->buf); u8g_SetAddress(u8g, dev, 0); /* command mode */ u8g_SetChipSelect(u8g, dev, 2); u8g_WriteByte(u8g, dev, 0x0b8 | pb->p.page); /* select current page (SBN1661/SED1520) */ u8g_WriteByte(u8g, dev, 0x000 ); /* set X address */ u8g_SetAddress(u8g, dev, 1); /* data mode */ u8g_WriteSequence(u8g, dev, WIDTH/2, WIDTH/2+(uint8_t *)pb->buf); u8g_SetChipSelect(u8g, dev, 0); } break; case U8G_DEV_MSG_CONTRAST: break; } return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg); }
uint8_t u8g_dev_st7920_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) { switch(msg) { case U8G_DEV_MSG_INIT: u8g_InitCom(u8g, dev); u8g_WriteEscSeqP(u8g, dev, u8g_dev_st7920_128x64_init_seq); break; case U8G_DEV_MSG_STOP: break; case U8G_DEV_MSG_PAGE_NEXT: { uint8_t y, i; uint8_t *ptr; u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); u8g_SetAddress(u8g, dev, 0); /* cmd mode */ u8g_SetChipSelect(u8g, dev, 1); y = pb->p.page_y0; ptr = pb->buf; for( i = 0; i < 8; i ++ ) { u8g_SetAddress(u8g, dev, 0); /* cmd mode */ u8g_WriteByte(u8g, dev, 0x03e ); /* enable extended mode */ if ( y < 32 ) { u8g_WriteByte(u8g, dev, 0x080 | y ); /* y pos */ u8g_WriteByte(u8g, dev, 0x080 ); /* set x pos to 0*/ } else { u8g_WriteByte(u8g, dev, 0x080 | (y-32) ); /* y pos */ u8g_WriteByte(u8g, dev, 0x080 | 8); /* set x pos to 64*/ } //u8g_WriteByte(u8g, dev, 0x080 | y ); /* y pos */ //u8g_WriteByte(u8g, dev, 0x080 ); /* set x pos to 0*/ u8g_SetAddress(u8g, dev, 1); /* data mode */ u8g_WriteSequence(u8g, dev, WIDTH/8, ptr); ptr += WIDTH/8; y++; } u8g_SetChipSelect(u8g, dev, 0); } break; } return u8g_dev_pb8h1_base_fn(u8g, dev, msg, arg); }
/******************************************************************************* * jlx240160g-676 4x peed driver. More ram. ******************************************************************************/ uint8_t u8g_dev_st75256_jlx240160g676_4x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) { uint16_t i; switch (msg) { case U8G_DEV_MSG_INIT: u8g_InitCom(u8g, dev, NULL); u8g_WriteEscSeqP(u8g, dev, u8g_dev_st75256_init_seq); u8g_WriteEscSeqP(u8g, dev, u8g_dev_st75256_data_start1); u8g_WriteByte(u8g, dev, 1); // Set start page u8g_WriteEscSeqP(u8g, dev, u8g_dev_st75256_data_start2); for (i = 0; i < (WIDTH * HEIGHT/PAGE_HEIGHT); i++) { u8g_WriteByte(u8g, dev, 0x00); //Заполняем дисплей белым } break; case U8G_DEV_MSG_PAGE_NEXT: { uint8_t y, i; uint8_t *ptr; u8g_pb_t *pb = (u8g_pb_t *) (dev->dev_mem); u8g_SetChipSelect(u8g, dev, 1); y = pb->p.page_y0; ptr = pb->buf; u8g_WriteEscSeqP(u8g, dev, u8g_dev_st75256_data_start1); u8g_WriteByte(u8g, dev, 1 + y); // Set start page u8g_WriteEscSeqP(u8g, dev, u8g_dev_st75256_data_start2); for (i = 0; i < 4; i++) { u8g_WriteSequence(u8g, dev, WIDTH, ptr); ptr += WIDTH; y++; } u8g_SetChipSelect(u8g, dev, 0); } break; case U8G_DEV_MSG_CONTRAST: u8g_SetChipSelect(u8g, dev, 1); u8g_SetAddress(u8g, dev, 0); /* instruction mode */ u8g_WriteByte(u8g, dev, 0x81); u8g_SetAddress(u8g, dev, 1); /* data mode */ u8g_WriteByte(u8g, dev, (*(uint8_t *) arg % 64)); u8g_WriteByte(u8g, dev, 3 + (*(uint8_t *) arg / 64)); u8g_SetChipSelect(u8g, dev, 0); return 1; case U8G_DEV_MSG_SLEEP_ON: u8g_WriteEscSeqP(u8g, dev, u8g_dev_st75256_sleep_on); return 1; case U8G_DEV_MSG_SLEEP_OFF: u8g_WriteEscSeqP(u8g, dev, u8g_dev_st75256_sleep_off); return 1; } return u8g_dev_pb32v1_base_fn(u8g, dev, msg, arg); }
uint8_t u8g_dev_ks0108_128x64_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) { switch(msg) { case U8G_DEV_MSG_INIT: u8g_InitCom(u8g, dev); u8g_WriteEscSeqP(u8g, dev, u8g_dev_ks0108_128x64_init_seq); break; case U8G_DEV_MSG_STOP: break; case U8G_DEV_MSG_PAGE_NEXT: { u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); u8g_SetAddress(u8g, dev, 0); /* command mode */ u8g_SetChipSelect(u8g, dev, 2); u8g_WriteByte(u8g, dev, 0x0b8 | pb->p.page); /* select current page (KS0108b) */ u8g_WriteByte(u8g, dev, 0x040 ); /* set address 0 */ u8g_SetAddress(u8g, dev, 1); /* data mode */ u8g_WriteSequence(u8g, dev, 64, pb->buf); u8g_SetChipSelect(u8g, dev, 0); u8g_SetAddress(u8g, dev, 0); /* command mode */ u8g_SetChipSelect(u8g, dev, 1); u8g_WriteByte(u8g, dev, 0x0b8 | pb->p.page); /* select current page (KS0108b) */ u8g_WriteByte(u8g, dev, 0x040 ); /* set address 0 */ u8g_SetAddress(u8g, dev, 1); /* data mode */ u8g_WriteSequence(u8g, dev, 64, 64+(uint8_t *)pb->buf); u8g_SetChipSelect(u8g, dev, 0); } break; } return u8g_dev_pb8v1_base_fn(u8g, dev, msg, arg); }
uint8_t u8g_dev_ssd1306_128x32_2x_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) { switch(msg) { case U8G_DEV_MSG_INIT: u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_300NS); u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1306_128x32_init_seq); break; case U8G_DEV_MSG_STOP: break; case U8G_DEV_MSG_PAGE_NEXT: { u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1306_128x32_data_start); u8g_WriteByte(u8g, dev, 0x0b0 | (pb->p.page*2)); /* select current page (SSD1306) */ u8g_SetAddress(u8g, dev, 1); /* data mode */ u8g_WriteSequence(u8g, dev, pb->width, (uint8_t*)pb->buf); u8g_SetChipSelect(u8g, dev, 0); u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1306_128x32_data_start); u8g_WriteByte(u8g, dev, 0x0b0 | (pb->p.page*2+1)); /* select current page (SSD1306) */ u8g_SetAddress(u8g, dev, 1); /* data mode */ u8g_WriteSequence(u8g, dev, pb->width, (uint8_t *)(pb->buf)+pb->width); u8g_SetChipSelect(u8g, dev, 0); } break; case U8G_DEV_MSG_SLEEP_ON: u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_on); return 1; case U8G_DEV_MSG_SLEEP_OFF: u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_off); return 1; } return u8g_dev_pb16v1_base_fn(u8g, dev, msg, arg); }
uint8_t u8g_dev_lc7981_160x80_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) { switch(msg) { case U8G_DEV_MSG_INIT: u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_NONE); u8g_WriteEscSeqP(u8g, dev, u8g_dev_lc7981_160x80_init_seq); break; case U8G_DEV_MSG_STOP: break; case U8G_DEV_MSG_PAGE_NEXT: { uint8_t y, i; uint16_t disp_ram_adr; uint8_t *ptr; u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); u8g_SetAddress(u8g, dev, 1); /* cmd mode */ u8g_SetChipSelect(u8g, dev, 1); y = pb->p.page_y0; ptr = (uint8_t *)(pb->buf); //Spark, modified from ptr = pb->buf disp_ram_adr = WIDTH/8; disp_ram_adr *= y; for( i = 0; i < 8; i ++ ) { u8g_SetAddress(u8g, dev, 1); /* cmd mode */ u8g_WriteByte(u8g, dev, 0x00a ); /* display ram (cursor) address low byte */ u8g_SetAddress(u8g, dev, 0); /* data mode */ u8g_WriteByte(u8g, dev, disp_ram_adr & 0x0ff ); u8g_SetAddress(u8g, dev, 1); /* cmd mode */ u8g_WriteByte(u8g, dev, 0x00b ); /* display ram (cursor) address hight byte */ u8g_SetAddress(u8g, dev, 0); /* data mode */ u8g_WriteByte(u8g, dev, disp_ram_adr >> 8 ); u8g_SetAddress(u8g, dev, 1); /* cmd mode */ u8g_WriteByte(u8g, dev, 0x00c ); /* write data */ u8g_SetAddress(u8g, dev, 0); /* data mode */ u8g_WriteSequence(u8g, dev, WIDTH/8, ptr); ptr += WIDTH/8; disp_ram_adr += WIDTH/8; } u8g_SetChipSelect(u8g, dev, 0); } break; } return u8g_dev_pb8h1f_base_fn(u8g, dev, msg, arg); }
uint8_t u8g_dev_ssd1351_128x128gh_hicolor_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) { switch(msg) { case U8G_DEV_MSG_INIT: u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_50NS); u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1351_128x128gh_init_seq); break; case U8G_DEV_MSG_STOP: break; case U8G_DEV_MSG_PAGE_FIRST: u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1351_128x128_column_seq); break; case U8G_DEV_MSG_PAGE_NEXT: { u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); uint8_t i, j; uint8_t page_height; uint8_t *ptr = (uint8_t *)pb->buf; u8g_SetChipSelect(u8g, dev, 1); page_height = pb->p.page_y1; page_height -= pb->p.page_y0; page_height++; for( j = 0; j < page_height; j++ ) { for (i = 0; i < pb->width; i+=RGB332_STREAM_BYTES) { u8g_ssd1351_hicolor_to_stream(ptr); u8g_WriteSequence(u8g, dev, RGB332_STREAM_BYTES*3, u8g_ssd1351_stream_bytes); ptr += RGB332_STREAM_BYTES*2; } } u8g_SetChipSelect(u8g, dev, 0); } break; /* continue to base fn */ case U8G_DEV_MSG_GET_MODE: return U8G_MODE_HICOLOR; } return u8g_dev_pbxh16_base_fn(u8g, dev, msg, arg); }
uint8_t u8g_dev_t6963_240x128_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) { switch(msg) { case U8G_DEV_MSG_INIT: u8g_InitCom(u8g, dev); u8g_WriteEscSeqP(u8g, dev, u8g_dev_t6963_240x128_init_seq); break; case U8G_DEV_MSG_STOP: break; case U8G_DEV_MSG_PAGE_NEXT: { uint8_t y, i; uint16_t disp_ram_adr; uint8_t *ptr; u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); u8g_SetAddress(u8g, dev, 0); /* data mode */ u8g_SetChipSelect(u8g, dev, 1); y = pb->p.page_y0; ptr = pb->buf; disp_ram_adr = WIDTH/8; disp_ram_adr *= y; for( i = 0; i < PAGE_HEIGHT; i ++ ) { u8g_SetAddress(u8g, dev, 0); /* data mode */ u8g_WriteByte(u8g, dev, disp_ram_adr&255 ); /* address low byte */ u8g_WriteByte(u8g, dev, disp_ram_adr>>8 ); /* address hight byte */ u8g_SetAddress(u8g, dev, 1); /* cmd mode */ u8g_WriteByte(u8g, dev, 0x024 ); /* set adr ptr */ u8g_WriteSequence(u8g, dev, WIDTH/8, ptr); ptr += WIDTH/8; disp_ram_adr += WIDTH/8; } u8g_SetAddress(u8g, dev, 0); /* data mode */ u8g_SetChipSelect(u8g, dev, 0); } break; } return u8g_dev_pb16h1_base_fn(u8g, dev, msg, arg); }
static void u8g_dev_ssd1325_1bit_write_16_pixel(u8g_t *u8g, u8g_dev_t *dev, uint8_t left, uint8_t right) { uint8_t d, cnt; static uint8_t buf[8]; cnt = 8; do { d = 0; if ( left & 128 ) d |= 0x0f0; if ( right & 128 ) d |= 0x00f; cnt--; buf[cnt] = d; left <<= 1; right <<= 1; }while ( cnt > 0 ); u8g_WriteSequence(u8g, dev, 8, buf); }
uint8_t u8g_pb_WriteBuffer(u8g_pb_t *b, u8g_t *u8g, u8g_dev_t *dev) { return u8g_WriteSequence(u8g, dev, b->width, b->buf); }
uint8_t u8g_dev_ssd1351_128x128_18bpp_fn(u8g_t *u8g, u8g_dev_t *dev, uint8_t msg, void *arg) { switch(msg) { case U8G_DEV_MSG_INIT: u8g_InitCom(u8g, dev, U8G_SPI_CLK_CYCLE_50NS); u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1351_128x128_18bpp_init_seq); break; case U8G_DEV_MSG_SLEEP_ON: u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_on); return 1; case U8G_DEV_MSG_SLEEP_OFF: u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd13xx_sleep_off); return 1; case U8G_DEV_MSG_STOP: break; case U8G_DEV_MSG_PAGE_FIRST: u8g_WriteEscSeqP(u8g, dev, u8g_dev_ssd1351_128x128_column_seq); break; case U8G_DEV_MSG_PAGE_NEXT: { u8g_pb_t *pb = (u8g_pb_t *)(dev->dev_mem); uint8_t i, j, k; uint8_t page_height; uint8_t *ptr = pb->buf; u8g_SetChipSelect(u8g, dev, 1); page_height = pb->p.page_y1; page_height -= pb->p.page_y0; page_height++; for( j = 0; j < page_height; j++ ) { /* for each line in the page... */ for (i = 0; i < pb->width; i+= RGB332_STREAM_BYTES ) { /* for each stream in the line... */ /* Convert the pixel data from 24bpp to 18bpp. This discards the * lower two bits of source data for each color channel, so any * 18-bpp source data must be left-shifted to accommodate. */ uint8_t *dest = u8g_ssd1351_stream_bytes; for ( k = 0; k < RGB332_STREAM_BYTES*3; k++ ) { /* for each pixel in the stream... */ *dest++ = *ptr++ >> 2; } /* Write the stream out to the display: */ u8g_WriteSequence( u8g, dev, RGB332_STREAM_BYTES*3, u8g_ssd1351_stream_bytes ); } } u8g_SetChipSelect(u8g, dev, 0); break; /* continue to base fn */ } case U8G_DEV_MSG_GET_MODE: return U8G_MODE_18BPP; } return u8g_dev_pbxh24_base_fn(u8g, dev, msg, arg); }