void uart_init(int idx) { void *base = uart_platform_baseptr(idx); if (!base) return; unsigned int div; div = uart_baudrate_divisor(default_baudrate(), uart_platform_refclk(), 16); uart8250_mem_init(base, div); }
void uart_init(int idx) { void *base = uart_platform_baseptr(idx); if (!base) return; unsigned int div; div = uart_baudrate_divisor(get_uart_baudrate(), uart_platform_refclk(), uart_input_clock_divider()); uart8250_mem_init(base, div); }
u32 uart_mem_init(void) { unsigned uart_baud = CONFIG_TTYS0_BAUD; u32 uart_bar = 0; unsigned div; /* find out the correct baud rate */ #if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE static const unsigned baud[8] = { 115200, 57600, 38400, 19200, 9600, 4800, 2400, 1200 }; unsigned b_index = 0; #if defined(__PRE_RAM__) b_index = read_option(baud_rate, 0); b_index &= 7; uart_baud = baud[b_index]; #else if (get_option(&b_index, "baud_rate") == CB_SUCCESS) uart_baud = baud[b_index]; #endif #endif /* Now find the UART base address and calculate the divisor */ #if CONFIG_DRIVERS_OXFORD_OXPCIE #if defined(MORE_TESTING) && !defined(__SIMPLE_DEVICE__) device_t dev = dev_find_device(0x1415, 0xc158, NULL); if (!dev) dev = dev_find_device(0x1415, 0xc11b, NULL); if (dev) { struct resource *res = find_resource(dev, 0x10); if (res) { uart_bar = res->base + 0x1000; // for 1st UART // uart_bar = res->base + 0x2000; // for 2nd UART } } if (!uart_bar) #endif uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000; // 1st UART // uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x2000; // 2nd UART div = 4000000 / uart_baud; #endif if (uart_bar) uart8250_mem_init(uart_bar, div); return uart_bar; }
void pch_uart_init(void) { /* Program IOBP CB000154h[12,9:8,4:0] = 1001100011111b */ u32 gpiodf = 0x131f; #if defined(__SIMPLE_DEVICE__) pci_devfn_t dev; #else struct device *dev; #endif /* Put UART in byte access mode for 16550 compatibility */ switch (CONFIG_INTEL_PCH_UART_CONSOLE_NUMBER) { case 0: dev = PCH_DEV_UART0; gpiodf |= SIO_IOBP_GPIODF_UART0_BYTE_ACCESS; break; case 1: dev = PCH_DEV_UART1; gpiodf |= SIO_IOBP_GPIODF_UART1_BYTE_ACCESS; break; default: return; } /* Program IOBP GPIODF */ pch_iobp_update(SIO_IOBP_GPIODF, ~gpiodf, gpiodf); /* Program IOBP CB000180h[5:0] = 111111b (undefined register) */ pch_iobp_update(0xcb000180, ~0x0000003f, 0x0000003f); /* Initialize chipset uart interface */ reg_script_run_on_dev(dev, uart_init); /* * Perform standard UART initialization * Divisor 1 is 115200 BAUD */ uart8250_mem_init(CONFIG_TTYS0_BASE, 1); }