static void cadence_uart_reset(UartState *s) { s->r[R_CR] = 0x00000128; s->r[R_IMR] = 0; s->r[R_CISR] = 0; s->r[R_RTRIG] = 0x00000020; s->r[R_BRGR] = 0x0000000F; s->r[R_TTRIG] = 0x00000020; uart_rx_reset(s); uart_tx_reset(s); s->rx_count = 0; s->rx_wpos = 0; }
static void cadence_uart_reset(DeviceState *dev) { UartState *s = CADENCE_UART(dev); s->r[R_CR] = 0x00000128; s->r[R_IMR] = 0; s->r[R_CISR] = 0; s->r[R_RTRIG] = 0x00000020; s->r[R_BRGR] = 0x0000000F; s->r[R_TTRIG] = 0x00000020; uart_rx_reset(s); uart_tx_reset(s); uart_update_status(s); }
static void uart_ctrl_update(UartState *s) { if (s->r[R_CR] & UART_CR_TXRST) { uart_tx_reset(s); } if (s->r[R_CR] & UART_CR_RXRST) { uart_rx_reset(s); } s->r[R_CR] &= ~(UART_CR_TXRST | UART_CR_RXRST); if (s->r[R_CR] & UART_CR_STARTBRK && !(s->r[R_CR] & UART_CR_STOPBRK)) { uart_send_breaks(s); } }