static void
dl_attach (struct device *parent, struct device *self, void *aux)
{
struct dl_softc *sc = device_private(self);
struct uba_attach_args *ua = aux;
sc->sc_iot = ua->ua_iot;
sc->sc_ioh = ua->ua_ioh;
/* Tidy up the device */
DL_WRITE_WORD(DL_UBA_RCSR, DL_RCSR_RXIE);
DL_WRITE_WORD(DL_UBA_XCSR, DL_XCSR_TXIE);
/* Initialize our softc structure. Should be done in open? */
sc->sc_tty = ttymalloc();
tty_attach(sc->sc_tty);
/* Now register the TX & RX interrupt handlers */
uba_intr_establish(ua->ua_icookie, ua->ua_cvec,
dlxint, sc, &sc->sc_tintrcnt);
uba_intr_establish(ua->ua_icookie, ua->ua_cvec - 4,
dlrint, sc, &sc->sc_rintrcnt);
evcnt_attach_dynamic(&sc->sc_rintrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
device_xname(&sc->sc_dev), "rintr");
evcnt_attach_dynamic(&sc->sc_tintrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
device_xname(&sc->sc_dev), "tintr");
printf("\n");
}
/*
* Interface exists: make available by filling in network interface
* record. System will initialize the interface when it is ready
* to accept packets. A STATUS command is done to get the ethernet
* address and other interesting data.
*/
void
ilattach(device_t parent, device_t self, void *aux)
{
struct uba_attach_args *ua = aux;
struct il_softc *sc = device_private(self);
struct ifnet *ifp = &sc->sc_if;
int error;
sc->sc_dev = self;
sc->sc_iot = ua->ua_iot;
sc->sc_ioh = ua->ua_ioh;
sc->sc_dmat = ua->ua_dmat;
/*
* Map interrupt vectors and reset function.
*/
uba_intr_establish(ua->ua_icookie, ua->ua_cvec, ilcint,
sc, &sc->sc_cintrcnt);
evcnt_attach_dynamic(&sc->sc_cintrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
device_xname(sc->sc_dev), "intr");
uba_intr_establish(ua->ua_icookie, ua->ua_cvec-4, ilrint,
sc, &sc->sc_rintrcnt);
evcnt_attach_dynamic(&sc->sc_rintrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
device_xname(sc->sc_dev), "intr");
uba_reset_establish(ilreset, sc->sc_dev);
/*
* Reset the board and map the statistics
* buffer onto the Unibus.
*/
IL_WCSR(IL_CSR, ILC_RESET);
(void)ilwait(sc, "reset");
sc->sc_ui.ui_size = sizeof(struct il_stats);
sc->sc_ui.ui_vaddr = (void *)&sc->sc_stats;
if ((error = uballoc(device_private(parent), &sc->sc_ui, 0)))
return printf(": failed uballoc, error = %d\n", error);
IL_WCSR(IL_BAR, LOWORD(sc->sc_ui.ui_baddr));
IL_WCSR(IL_BCR, sizeof(struct il_stats));
IL_WCSR(IL_CSR, ((sc->sc_ui.ui_baddr >> 2) & IL_EUA)|ILC_STAT);
(void)ilwait(sc, "status");
ubfree(device_private(parent), &sc->sc_ui);
printf("%s: module=%s firmware=%s\n", device_xname(sc->sc_dev),
sc->sc_stats.ils_module, sc->sc_stats.ils_firmware);
printf("%s: hardware address %s\n", device_xname(sc->sc_dev),
ether_sprintf(sc->sc_stats.ils_addr));
strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
ifp->if_softc = sc;
ifp->if_flags = IFF_BROADCAST;
ifp->if_init = ilinit;
ifp->if_stop = ilstop;
ifp->if_ioctl = ether_ioctl;
ifp->if_start = ilstart;
ifp->if_watchdog = ilwatch;
IFQ_SET_READY(&ifp->if_snd);
if_attach(ifp);
ether_ifattach(ifp, sc->sc_stats.ils_addr);
}
/*
* Interface exists: make available by filling in network interface
* record. System will initialize the interface when it is ready
* to accept packets.
*/
void
dmcattach(device_t parent, device_t self, void *aux)
{
struct uba_attach_args *ua = aux;
struct dmc_softc *sc = device_private(self);
sc->sc_dev = self;
sc->sc_iot = ua->ua_iot;
sc->sc_ioh = ua->ua_ioh;
sc->sc_dmat = ua->ua_dmat;
strlcpy(sc->sc_if.if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
sc->sc_if.if_mtu = DMCMTU;
sc->sc_if.if_init = dmcinit;
sc->sc_if.if_output = dmcoutput;
sc->sc_if.if_ioctl = dmcioctl;
sc->sc_if.if_watchdog = dmctimeout;
sc->sc_if.if_flags = IFF_POINTOPOINT;
sc->sc_if.if_softc = sc;
IFQ_SET_READY(&sc->sc_if.if_snd);
uba_intr_establish(ua->ua_icookie, ua->ua_cvec, dmcrint, sc,
&sc->sc_rintrcnt);
uba_intr_establish(ua->ua_icookie, ua->ua_cvec+4, dmcxint, sc,
&sc->sc_tintrcnt);
uba_reset_establish(dmcreset, sc->sc_dev);
evcnt_attach_dynamic(&sc->sc_rintrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
device_xname(sc->sc_dev), "intr");
evcnt_attach_dynamic(&sc->sc_tintrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
device_xname(sc->sc_dev), "intr");
if_attach(&sc->sc_if);
}
void
rlcattach(device_t parent, device_t self, void *aux)
{
struct rlc_softc *sc = device_private(self);
struct uba_attach_args *ua = aux;
struct rlc_attach_args ra;
int i, error;
sc->sc_dev = self;
sc->sc_uh = device_private(parent);
sc->sc_iot = ua->ua_iot;
sc->sc_ioh = ua->ua_ioh;
sc->sc_dmat = ua->ua_dmat;
uba_intr_establish(ua->ua_icookie, ua->ua_cvec,
rlcintr, sc, &sc->sc_intrcnt);
evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
device_xname(sc->sc_dev), "intr");
uba_reset_establish(rlcreset, self);
printf("\n");
/*
* The RL11 can only have one transfer going at a time,
* and max transfer size is one track, so only one dmamap
* is needed.
*/
error = bus_dmamap_create(sc->sc_dmat, MAXRLXFER, 1, MAXRLXFER, 0,
BUS_DMA_ALLOCNOW, &sc->sc_dmam);
if (error) {
aprint_error(": Failed to allocate DMA map, error %d\n", error);
return;
}
bufq_alloc(&sc->sc_q, "disksort", BUFQ_SORT_CYLINDER);
for (i = 0; i < RL_MAXDPC; i++) {
waitcrdy(sc);
RL_WREG(RL_DA, RLDA_GS|RLDA_RST);
RL_WREG(RL_CS, RLCS_GS|(i << RLCS_USHFT));
waitcrdy(sc);
ra.type = RL_RREG(RL_MP);
ra.hwid = i;
if ((RL_RREG(RL_CS) & RLCS_ERR) == 0)
config_found(sc->sc_dev, &ra, rlcprint);
}
}
/*
* Interface exists: make available by filling in network interface
* record. System will initialize the interface when it is ready
* to accept packets. We get the ethernet address here.
*/
void
deattach(struct device *parent, struct device *self, void *aux)
{
struct uba_attach_args *ua = aux;
struct de_softc *sc = (struct de_softc *)self;
struct ifnet *ifp = &sc->sc_if;
u_int8_t myaddr[ETHER_ADDR_LEN];
int csr1, error;
char *c;
sc->sc_iot = ua->ua_iot;
sc->sc_ioh = ua->ua_ioh;
sc->sc_dmat = ua->ua_dmat;
/*
* What kind of a board is this?
* The error bits 4-6 in pcsr1 are a device id as long as
* the high byte is zero.
*/
csr1 = DE_RCSR(DE_PCSR1);
if (csr1 & 0xff60)
c = "broken";
else if (csr1 & 0x10)
c = "delua";
else
c = "deuna";
/*
* Reset the board and temporarily map
* the pcbb buffer onto the Unibus.
*/
DE_WCSR(DE_PCSR0, 0); /* reset INTE */
DELAY(100);
DE_WCSR(DE_PCSR0, PCSR0_RSET);
dewait(sc, "reset");
sc->sc_ui.ui_size = sizeof(struct de_cdata);
if ((error = ubmemalloc((struct uba_softc *)parent, &sc->sc_ui, 0)))
return printf(": failed ubmemalloc(), error = %d\n", error);
sc->sc_dedata = (struct de_cdata *)sc->sc_ui.ui_vaddr;
/*
* Tell the DEUNA about our PCB
*/
DE_WCSR(DE_PCSR2, LOWORD(sc->sc_ui.ui_baddr));
DE_WCSR(DE_PCSR3, HIWORD(sc->sc_ui.ui_baddr));
DE_WLOW(CMD_GETPCBB);
dewait(sc, "pcbb");
sc->sc_dedata->dc_pcbb.pcbb0 = FC_RDPHYAD;
DE_WLOW(CMD_GETCMD);
dewait(sc, "read addr ");
bcopy((caddr_t)&sc->sc_dedata->dc_pcbb.pcbb2, myaddr, sizeof (myaddr));
printf(": %s, address %s\n", c, ether_sprintf(myaddr));
uba_intr_establish(ua->ua_icookie, ua->ua_cvec, deintr, sc,
&sc->sc_intrcnt);
uba_reset_establish(dereset, &sc->sc_dev);
evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
sc->sc_dev.dv_xname, "intr");
strlcpy(ifp->if_xname, sc->sc_dev.dv_xname, sizeof ifp->if_xname);
ifp->if_softc = sc;
ifp->if_flags = IFF_BROADCAST|IFF_SIMPLEX|IFF_MULTICAST|IFF_ALLMULTI;
ifp->if_ioctl = deioctl;
ifp->if_start = destart;
ifp->if_init = deinit;
ifp->if_stop = destop;
IFQ_SET_READY(&ifp->if_snd);
if_attach(ifp);
ether_ifattach(ifp, myaddr);
ubmemfree((struct uba_softc *)parent, &sc->sc_ui);
sc->sc_sh = shutdownhook_establish(deshutdown, sc);
}
/*
* Interface exists: make available by filling in network interface
* record. System will initialize the interface when it is ready
* to accept packets.
*/
void
qeattach(device_t parent, device_t self, void *aux)
{
struct uba_attach_args *ua = aux;
struct qe_softc *sc = device_private(self);
struct ifnet *ifp = &sc->sc_if;
struct qe_ring *rp;
u_int8_t enaddr[ETHER_ADDR_LEN];
int i, error;
char *nullbuf;
sc->sc_dev = self;
sc->sc_uh = device_private(parent);
sc->sc_iot = ua->ua_iot;
sc->sc_ioh = ua->ua_ioh;
sc->sc_dmat = ua->ua_dmat;
/*
* Allocate DMA safe memory for descriptors and setup memory.
*/
sc->sc_ui.ui_size = sizeof(struct qe_cdata) + ETHER_PAD_LEN;
if ((error = ubmemalloc(sc->sc_uh, &sc->sc_ui, 0))) {
aprint_error(": unable to ubmemalloc(), error = %d\n", error);
return;
}
sc->sc_pqedata = (struct qe_cdata *)sc->sc_ui.ui_baddr;
sc->sc_qedata = (struct qe_cdata *)sc->sc_ui.ui_vaddr;
/*
* Zero the newly allocated memory.
*/
memset(sc->sc_qedata, 0, sizeof(struct qe_cdata) + ETHER_PAD_LEN);
nullbuf = ((char*)sc->sc_qedata) + sizeof(struct qe_cdata);
/*
* Create the transmit descriptor DMA maps. We take advantage
* of the fact that the Qbus address space is big, and therefore
* allocate map registers for all transmit descriptors also,
* so that we can avoid this each time we send a packet.
*/
for (i = 0; i < TXDESCS; i++) {
if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
1, MCLBYTES, 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW,
&sc->sc_xmtmap[i]))) {
aprint_error(
": unable to create tx DMA map %d, error = %d\n",
i, error);
goto fail_4;
}
}
/*
* Create receive buffer DMA maps.
*/
for (i = 0; i < RXDESCS; i++) {
if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
MCLBYTES, 0, BUS_DMA_NOWAIT,
&sc->sc_rcvmap[i]))) {
aprint_error(
": unable to create rx DMA map %d, error = %d\n",
i, error);
goto fail_5;
}
}
/*
* Pre-allocate the receive buffers.
*/
for (i = 0; i < RXDESCS; i++) {
if ((error = qe_add_rxbuf(sc, i)) != 0) {
aprint_error(
": unable to allocate or map rx buffer %d,"
" error = %d\n", i, error);
goto fail_6;
}
}
if ((error = bus_dmamap_create(sc->sc_dmat, ETHER_PAD_LEN, 1,
ETHER_PAD_LEN, 0, BUS_DMA_NOWAIT,&sc->sc_nulldmamap)) != 0) {
aprint_error(
": unable to create pad buffer DMA map, error = %d\n",
error);
goto fail_6;
}
if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_nulldmamap,
nullbuf, ETHER_PAD_LEN, NULL, BUS_DMA_NOWAIT)) != 0) {
aprint_error(
": unable to load pad buffer DMA map, error = %d\n",
error);
goto fail_7;
}
bus_dmamap_sync(sc->sc_dmat, sc->sc_nulldmamap, 0, ETHER_PAD_LEN,
BUS_DMASYNC_PREWRITE);
/*
* Create ring loops of the buffer chains.
* This is only done once.
*/
rp = sc->sc_qedata->qc_recv;
rp[RXDESCS].qe_addr_lo = LOWORD(&sc->sc_pqedata->qc_recv[0]);
rp[RXDESCS].qe_addr_hi = HIWORD(&sc->sc_pqedata->qc_recv[0]) |
QE_VALID | QE_CHAIN;
rp[RXDESCS].qe_flag = rp[RXDESCS].qe_status1 = QE_NOTYET;
rp = sc->sc_qedata->qc_xmit;
rp[TXDESCS].qe_addr_lo = LOWORD(&sc->sc_pqedata->qc_xmit[0]);
rp[TXDESCS].qe_addr_hi = HIWORD(&sc->sc_pqedata->qc_xmit[0]) |
QE_VALID | QE_CHAIN;
rp[TXDESCS].qe_flag = rp[TXDESCS].qe_status1 = QE_NOTYET;
/*
* Get the vector that were set at match time, and remember it.
*/
sc->sc_intvec = sc->sc_uh->uh_lastiv;
QE_WCSR(QE_CSR_CSR, QE_RESET);
DELAY(1000);
QE_WCSR(QE_CSR_CSR, QE_RCSR(QE_CSR_CSR) & ~QE_RESET);
/*
* Read out ethernet address and tell which type this card is.
*/
for (i = 0; i < 6; i++)
enaddr[i] = QE_RCSR(i * 2) & 0xff;
QE_WCSR(QE_CSR_VECTOR, sc->sc_intvec | 1);
aprint_normal(": %s, hardware address %s\n",
QE_RCSR(QE_CSR_VECTOR) & 1 ? "delqa":"deqna",
ether_sprintf(enaddr));
QE_WCSR(QE_CSR_VECTOR, QE_RCSR(QE_CSR_VECTOR) & ~1); /* ??? */
uba_intr_establish(ua->ua_icookie, ua->ua_cvec, qeintr,
sc, &sc->sc_intrcnt);
evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
device_xname(sc->sc_dev), "intr");
strcpy(ifp->if_xname, device_xname(sc->sc_dev));
ifp->if_softc = sc;
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
ifp->if_start = qestart;
ifp->if_ioctl = qeioctl;
ifp->if_watchdog = qetimeout;
IFQ_SET_READY(&ifp->if_snd);
/*
* Attach the interface.
*/
if_attach(ifp);
ether_ifattach(ifp, enaddr);
return;
/*
* Free any resources we've allocated during the failed attach
* attempt. Do this in reverse order and fall through.
*/
fail_7:
bus_dmamap_destroy(sc->sc_dmat, sc->sc_nulldmamap);
fail_6:
for (i = 0; i < RXDESCS; i++) {
if (sc->sc_rxmbuf[i] != NULL) {
bus_dmamap_unload(sc->sc_dmat, sc->sc_rcvmap[i]);
m_freem(sc->sc_rxmbuf[i]);
}
}
fail_5:
for (i = 0; i < RXDESCS; i++) {
if (sc->sc_rcvmap[i] != NULL)
bus_dmamap_destroy(sc->sc_dmat, sc->sc_rcvmap[i]);
}
fail_4:
for (i = 0; i < TXDESCS; i++) {
if (sc->sc_xmtmap[i] != NULL)
bus_dmamap_destroy(sc->sc_dmat, sc->sc_xmtmap[i]);
}
}
void
tsattach(device_t parent, device_t self, void *aux)
{
struct ts_softc *sc = device_private(self);
struct uba_attach_args *ua = aux;
int error;
const char *t;
sc->sc_dev = self;
sc->sc_uh = device_private(parent);
sc->sc_iot = ua->ua_iot;
sc->sc_ioh = ua->ua_ioh;
sc->sc_dmat = ua->ua_dmat;
sc->sc_uu.uu_dev = self;
sc->sc_uu.uu_ready = tsready;
tsinit(sc); /* reset and map */
error = bus_dmamap_create(sc->sc_dmat, (64*1024), 16, (64*1024),
0, BUS_DMA_NOWAIT, &sc->sc_dmam);
if (error) {
aprint_error(": failed create DMA map %d\n", error);
return;
}
bufq_alloc(&sc->sc_bufq, "fcfs", 0);
/*
* write the characteristics (again)
*/
sc->sc_state = TS_INIT; /* tsintr() checks this ... */
tswchar(sc);
if (tsleep(sc, PRIBIO, "tsattach", 100)) {
aprint_error(": failed SET CHARACTERISTICS\n");
return;
}
sc->sc_state = TS_RUNNING;
if (sc->sc_uh->uh_type == UBA_UBA) {
if (sc->sc_vts->status.xst2 & TS_SF_TU80) {
sc->sc_type = TYPE_TU80;
t = "TU80";
} else {
sc->sc_type = TYPE_TS11;
t = "TS11";
}
} else {
sc->sc_type = TYPE_TS05;
t = "TS05";
}
aprint_normal(": %s\n", t);
aprint_normal_dev(sc->sc_dev,
"rev %d, extended features %s, transport %s\n",
(sc->sc_vts->status.xst2 & TS_SF_MCRL) >> 2,
(sc->sc_vts->status.xst2 & TS_SF_EFES ? "enabled" : "disabled"),
(TS_RCSR(TSSR) & TS_OFL ? "offline" : "online"));
uba_intr_establish(ua->ua_icookie, ua->ua_cvec, tsintr,
sc, &sc->sc_intrcnt);
evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, ua->ua_evcnt,
device_xname(sc->sc_dev), "intr");
}
/*
* Interface exists: make available by filling in network interface
* record. System will initialize the interface when it is ready
* to accept packets.
*/
void
qeattach(struct device *parent, struct device *self, void *aux)
{
struct uba_attach_args *ua = aux;
struct uba_softc *ubasc = (struct uba_softc *)parent;
struct qe_softc *sc = (struct qe_softc *)self;
struct ifnet *ifp = (struct ifnet *)&sc->sc_if;
struct qe_ring *rp;
int i, error;
sc->sc_iot = ua->ua_iot;
sc->sc_ioh = ua->ua_ioh;
sc->sc_dmat = ua->ua_dmat;
/*
* Allocate DMA safe memory for descriptors and setup memory.
*/
sc->sc_ui.ui_size = sizeof(struct qe_cdata);
if ((error = ubmemalloc((struct uba_softc *)parent, &sc->sc_ui, 0))) {
printf(": unable to ubmemalloc(), error = %d\n", error);
return;
}
sc->sc_pqedata = (struct qe_cdata *)sc->sc_ui.ui_baddr;
sc->sc_qedata = (struct qe_cdata *)sc->sc_ui.ui_vaddr;
/*
* Zero the newly allocated memory.
*/
bzero(sc->sc_qedata, sizeof(struct qe_cdata));
/*
* Create the transmit descriptor DMA maps. We take advantage
* of the fact that the Qbus address space is big, and therefore
* allocate map registers for all transmit descriptors also,
* so that we can avoid this each time we send a packet.
*/
for (i = 0; i < TXDESCS; i++) {
if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
1, MCLBYTES, 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW,
&sc->sc_xmtmap[i]))) {
printf(": unable to create tx DMA map %d, error = %d\n",
i, error);
goto fail_4;
}
}
/*
* Create receive buffer DMA maps.
*/
for (i = 0; i < RXDESCS; i++) {
if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
MCLBYTES, 0, BUS_DMA_NOWAIT,
&sc->sc_rcvmap[i]))) {
printf(": unable to create rx DMA map %d, error = %d\n",
i, error);
goto fail_5;
}
}
/*
* Pre-allocate the receive buffers.
*/
for (i = 0; i < RXDESCS; i++) {
if ((error = qe_add_rxbuf(sc, i)) != 0) {
printf(": unable to allocate or map rx buffer %d\n,"
" error = %d\n", i, error);
goto fail_6;
}
}
/*
* Create ring loops of the buffer chains.
* This is only done once.
*/
rp = sc->sc_qedata->qc_recv;
rp[RXDESCS].qe_addr_lo = LOWORD(&sc->sc_pqedata->qc_recv[0]);
rp[RXDESCS].qe_addr_hi = HIWORD(&sc->sc_pqedata->qc_recv[0]) |
QE_VALID | QE_CHAIN;
rp[RXDESCS].qe_flag = rp[RXDESCS].qe_status1 = QE_NOTYET;
rp = sc->sc_qedata->qc_xmit;
rp[TXDESCS].qe_addr_lo = LOWORD(&sc->sc_pqedata->qc_xmit[0]);
rp[TXDESCS].qe_addr_hi = HIWORD(&sc->sc_pqedata->qc_xmit[0]) |
QE_VALID | QE_CHAIN;
rp[TXDESCS].qe_flag = rp[TXDESCS].qe_status1 = QE_NOTYET;
/*
* Get the vector that were set at match time, and remember it.
*/
sc->sc_intvec = ubasc->uh_lastiv;
QE_WCSR(QE_CSR_CSR, QE_RESET);
DELAY(1000);
QE_WCSR(QE_CSR_CSR, QE_RCSR(QE_CSR_CSR) & ~QE_RESET);
/*
* Read out ethernet address and tell which type this card is.
*/
for (i = 0; i < 6; i++)
sc->sc_ac.ac_enaddr[i] = QE_RCSR(i * 2) & 0xff;
QE_WCSR(QE_CSR_VECTOR, sc->sc_intvec | 1);
printf(": %s, address %s\n",
QE_RCSR(QE_CSR_VECTOR) & 1 ? "delqa" : "deqna",
ether_sprintf(sc->sc_ac.ac_enaddr));
QE_WCSR(QE_CSR_VECTOR, QE_RCSR(QE_CSR_VECTOR) & ~1); /* ??? */
uba_intr_establish(ua->ua_icookie, ua->ua_cvec, qeintr,
sc, &sc->sc_intrcnt);
sc->sc_cvec = ua->ua_cvec;
evcount_attach(&sc->sc_intrcnt, sc->sc_dev.dv_xname, &sc->sc_cvec);
strlcpy(ifp->if_xname, sc->sc_dev.dv_xname, sizeof ifp->if_xname);
ifp->if_softc = sc;
ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
ifp->if_start = qestart;
ifp->if_ioctl = qeioctl;
ifp->if_watchdog = qetimeout;
IFQ_SET_READY(&ifp->if_snd);
/*
* Attach the interface.
*/
if_attach(ifp);
ether_ifattach(ifp);
return;
/*
* Free any resources we've allocated during the failed attach
* attempt. Do this in reverse order and fall through.
*/
fail_6:
for (i = 0; i < RXDESCS; i++) {
if (sc->sc_rxmbuf[i] != NULL) {
bus_dmamap_unload(sc->sc_dmat, sc->sc_xmtmap[i]);
m_freem(sc->sc_rxmbuf[i]);
}
}
fail_5:
for (i = 0; i < RXDESCS; i++) {
if (sc->sc_xmtmap[i] != NULL)
bus_dmamap_destroy(sc->sc_dmat, sc->sc_xmtmap[i]);
}
fail_4:
for (i = 0; i < TXDESCS; i++) {
if (sc->sc_rcvmap[i] != NULL)
bus_dmamap_destroy(sc->sc_dmat, sc->sc_rcvmap[i]);
}
}
