sint32_type
__divsi3 (sint32_type a, sint32_type b)
{
  word_type neg = 0;
  sint32_type res;

  if (a < 0)
    {
      a = -a;
      neg = !neg;
    }

  if (b < 0)
    {
      b = -b;
      neg = !neg;
    }

  res = udivmodsi4 (a, b, 0);

  if (neg)
    res = -res;

  return res;
}
Example #2
0
__int64 __cdecl __divdi3(
     __int64 a, 
     __int64 b
)
{
    int neg = 0;
    __int64 res;

    if (a < 0) {
        a = -a;
        neg = !neg;
    }

    if (b < 0) {
        b = -b;
        neg = !neg;
    }

    res = udivmodsi4(a, b, 0);

    if (neg)
        res = -res;

    return res;
}
Example #3
0
unsigned __int64 __cdecl __umoddi3(
     unsigned __int64 a, 
     unsigned __int64 b
)
{
    return udivmodsi4 (a, b, 1);
}
Example #4
0
static void trap_dispatch(struct trapframe *tf)
{
	int i;
	int code = GET_CAUSE_EXCODE(tf->tf_cause);
	switch (code) {
	case EX_IRQ:
		interrupt_handler(tf);
		break;
	case EX_MOD:
		handle_tlbmiss(tf, 1, 1);
		break;
	case EX_TLBL:
		handle_tlbmiss(tf, 0, 0);
		break;
	case EX_TLBS:
		handle_tlbmiss(tf, 1, 0);
		break;
  case EX_RI: {
    if(tf->tf_cause & (1 << 31)) {
      print_trapframe(tf);
      panic("Cannot fix unimplemented instruction in branch delay slot.");
    }
    const uint32_t DIV_OPCODE_MASK = 0xFC00FFFF;
    const uint32_t DIV_OPCODE = 0x0000001A;
    const uint32_t DIVU_OPCODE = 0x0000001B;
    const uint32_t MULTU_OPCODE = 0x00000019;
    uint32_t instruction = *(uint32_t*)tf->tf_epc;
    if((instruction & DIV_OPCODE_MASK) == DIV_OPCODE) {
      int rt = (instruction >> 16) & 0x1F;
      int rs = (instruction >> 21) & 0x1F;
      int dividend = rs == 0 ? 0 : tf->tf_regs.reg_r[rs - 1];
      int division = rt == 0 ? 0 : tf->tf_regs.reg_r[rt - 1];
      tf->tf_lo = __divsi3(dividend, division);
      tf->tf_hi = __modsi3(dividend, division);
      tf->tf_epc = (void*)((uint32_t)tf->tf_epc + 4);
      break;
    }
    else if((instruction & DIV_OPCODE_MASK) == DIVU_OPCODE) {
      int rt = (instruction >> 16) & 0x1F;
      int rs = (instruction >> 21) & 0x1F;
      int dividend = rs == 0 ? 0 : tf->tf_regs.reg_r[rs - 1];
      int division = rt == 0 ? 0 : tf->tf_regs.reg_r[rt - 1];
      tf->tf_lo = udivmodsi4(dividend, division, 0);
      tf->tf_hi = udivmodsi4(dividend, division, 1);
      tf->tf_epc = (void*)((uint32_t)tf->tf_epc + 4);
      break;
    }
SItype __modsi3 (SItype a, SItype b)
{
	word_type neg = 0;
	SItype res;

	if (a < 0) {
		a = -a;
		neg = 1;
	}

	if (b < 0)
		b = -b;

	res = udivmodsi4 (a, b, 1);

	if (neg)
		res = -res;

	return res;
}
Example #6
0
__int64 __cdecl __moddi3(
     __int64 a, 
     __int64 b
)
{
    int neg = 0;
    __int64 res;

    if (a < 0) {
        a = -a;
        neg = 1;
    }

    if (b < 0)
        b = -b;

    res = udivmodsi4(a, b, 1);

    if (neg)
        res = -res;

    return res;
}
Example #7
0
long
__umodsi3 (long a, long b)
{
  return udivmodsi4 (a, b, 1);
}
Example #8
0
long
__udivsi3 (long a, long b)
{
  return udivmodsi4 (a, b, 0);
}
uint32_type
__umoddi3 (uint32_type a, uint32_type b)
{
  return udivmodsi4 (a, b, 1);
}
uint32_type
__udivsi3 (uint32_type a, uint32_type b)
{
  return udivmodsi4 (a, b, 0);
}
SItype __umodsi3 (SItype a, SItype b)
{
	return udivmodsi4 (a, b, 1);
}
SItype __udivsi3 (SItype a, SItype b)
{
	return udivmodsi4 (a, b, 0);
}