/*
* Make sure the controller is completely inactive, unable to
* generate interrupts or do DMA.
*/
static void uhci_generic_reset_hc(struct uhci_hcd *uhci)
{
/* Reset the HC - this will force us to get a
* new notification of any already connected
* ports due to the virtual disconnect that it
* implies.
*/
uhci_writew(uhci, USBCMD_HCRESET, USBCMD);
mb();
udelay(5);
if (uhci_readw(uhci, USBCMD) & USBCMD_HCRESET)
dev_warn(uhci_dev(uhci), "HCRESET not completed yet!\n");
/* Just to be safe, disable interrupt requests and
* make sure the controller is stopped.
*/
uhci_writew(uhci, 0, USBINTR);
uhci_writew(uhci, 0, USBCMD);
}
static void uhci_generic_reset_hc(struct uhci_hcd *uhci)
{
/*
*/
uhci_writew(uhci, USBCMD_HCRESET, USBCMD);
mb();
udelay(5);
if (uhci_readw(uhci, USBCMD) & USBCMD_HCRESET)
dev_warn(uhci_dev(uhci), "HCRESET not completed yet!\n");
/*
*/
uhci_writew(uhci, 0, USBINTR);
uhci_writew(uhci, 0, USBCMD);
}
/*
* Store the basic register settings needed by the controller.
*/
static void configure_hc(struct uhci_hcd *uhci)
{
/* Set the frame length to the default: 1 ms exactly */
uhci_writeb(uhci, USBSOF_DEFAULT, USBSOF);
/* Store the frame list base address */
uhci_writel(uhci, uhci->frame_dma_handle, USBFLBASEADD);
/* Set the current frame number */
uhci_writew(uhci, uhci->frame_number & UHCI_MAX_SOF_NUMBER,
USBFRNUM);
/* perform any arch/bus specific configuration */
if (uhci->configure_hc)
uhci->configure_hc(uhci);
}
/*
* Finish up a host controller reset and update the recorded state.
*/
static void finish_reset(struct uhci_hcd *uhci)
{
int port;
/* HCRESET doesn't affect the Suspend, Reset, and Resume Detect
* bits in the port status and control registers.
* We have to clear them by hand.
*/
for (port = 0; port < uhci->rh_numports; ++port)
uhci_writew(uhci, 0, USBPORTSC1 + (port * 2));
uhci->port_c_suspend = uhci->resuming_ports = 0;
uhci->rh_state = UHCI_RH_RESET;
uhci->is_stopped = UHCI_IS_STOPPED;
clear_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
}
static void configure_hc(struct uhci_hcd *uhci)
{
/* */
uhci_writeb(uhci, USBSOF_DEFAULT, USBSOF);
/* */
uhci_writel(uhci, uhci->frame_dma_handle, USBFLBASEADD);
/* */
uhci_writew(uhci, uhci->frame_number & UHCI_MAX_SOF_NUMBER,
USBFRNUM);
/* */
if (uhci->configure_hc)
uhci->configure_hc(uhci);
}
static void finish_reset(struct uhci_hcd *uhci)
{
int port;
/*
*/
for (port = 0; port < uhci->rh_numports; ++port)
uhci_writew(uhci, 0, USBPORTSC1 + (port * 2));
uhci->port_c_suspend = uhci->resuming_ports = 0;
uhci->rh_state = UHCI_RH_RESET;
uhci->is_stopped = UHCI_IS_STOPPED;
clear_bit(HCD_FLAG_POLL_RH, &uhci_to_hcd(uhci)->flags);
}
