static int uvd_v6_0_early_init(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; uvd_v6_0_set_ring_funcs(adev); uvd_v6_0_set_irq_funcs(adev); return 0; }
static int uvd_v6_0_early_init(void *handle) { struct amdgpu_device *adev = (struct amdgpu_device *)handle; adev->uvd.num_uvd_inst = 1; if (!(adev->flags & AMD_IS_APU) && (RREG32_SMC(ixCC_HARVEST_FUSES) & CC_HARVEST_FUSES__UVD_DISABLE_MASK)) return -ENOENT; uvd_v6_0_set_ring_funcs(adev); if (uvd_v6_0_enc_support(adev)) { adev->uvd.num_enc_rings = 2; uvd_v6_0_set_enc_ring_funcs(adev); } uvd_v6_0_set_irq_funcs(adev); return 0; }