static void startup()
{
vhpi_printf("hello, world!");
vhpiCbDataT cb_data1 = {
.reason = vhpiCbStartOfSimulation,
.cb_rtn = start_of_sim,
.user_data = (char *)"some user data",
};
handle_sos = vhpi_register_cb(&cb_data1, vhpiReturnCb);
check_error();
fail_unless(vhpi_get(vhpiStateP, handle_sos) == vhpiEnable);
vhpiCbDataT cb_data2 = {
.reason = vhpiCbEndOfSimulation,
.cb_rtn = end_of_sim
};
vhpi_register_cb(&cb_data2, 0);
check_error();
vhpi_printf("tool is %s", vhpi_get_str(vhpiNameP, NULL));
vhpiHandleT root = vhpi_handle(vhpiRootInst, NULL);
check_error();
fail_if(root == NULL);
vhpi_printf("root handle %p", root);
handle_x = vhpi_handle_by_name("x", root);
check_error();
fail_if(handle_x == NULL);
vhpi_printf("x handle %p", handle_x);
handle_y = vhpi_handle_by_name("y", root);
check_error();
fail_if(handle_y == NULL);
vhpi_printf("y handle %p", handle_y);
vhpi_release_handle(root);
}
void (*vhpi_startup_routines[])() = {
startup,
NULL
};
// this function gets handle to signal of specified hierarchical name
vhpiHandleT getHandle( char* _szSigName )
{
vhpiHandleT hSigHdl,hHdl,hSubItr,hSubHdl;
// get handle to root instance
if ( ( hHdl = vhpi_handle( vhpiRootInst, NULL ) ) )
{
// get handle to signal - try root instance first
if ( !( hSigHdl = vhpi_handle_by_name( _szSigName, hHdl ) ) )
{
// if failed, iterate internal regions
if (( hSubItr = vhpi_iterator( vhpiInternalRegions, hHdl ) ))
{
while (( hSubHdl = vhpi_scan( hSubItr ) ))
if ( !( hSigHdl = vhpi_handle_by_name( _szSigName, hSubHdl ) ) )
{
// if failed, print info
vhpi_printf( "getHandle(): No signals found searching root and internal regions or ambiguous signal name\n" );
return NULL;
}
}
else
{
vhpi_printf( "getHandle(): No internal regions found\n" );
return NULL;
}
}
// if getting handle succeeded, print information on console...
if ( strcmp( vhpi_get_str( vhpiKindStrP, hSigHdl ), "vhpiPortDeclK" ) == 0 )
// ...with mode in case of port
vhpi_printf( "getHandle(): Port %s found: kind %s, mode %s\n",vhpi_get_str( vhpiFullNameP, hSigHdl ), vhpi_get_str( vhpiKindStrP, hSigHdl ), conv_mode( vhpi_get( vhpiModeP, hSigHdl ) ) );
else
// ...without mode in case of other object
vhpi_printf( "getHandle(): Object %s found: kind %s\n", vhpi_get_str( vhpiFullNameP, hSigHdl ), vhpi_get_str( vhpiKindStrP, hSigHdl ) );
return hSigHdl;
}
else
{
vhpi_printf( "getHandle(): No root instance found\n" );
return NULL;
}
}
static void start_of_sim(const vhpiCbDataT *cb_data)
{
vhpi_printf("start_of_sim");
fail_unless(phys_to_i64(vhpiFS) == 1ll);
fail_unless(phys_to_i64(vhpiPS) == 1000ll);
fail_unless(phys_to_i64(vhpiNS) == 1000000ll);
fail_unless(phys_to_i64(vhpiUS) == 1000000000ll);
fail_unless(phys_to_i64(vhpiMS) == 1000000000000ll);
fail_unless(phys_to_i64(vhpiS) == 1000000000000000ll);
fail_unless(phys_to_i64(vhpiMN) == 1000000000000000ll * 60);
fail_unless(phys_to_i64(vhpiHR) == 1000000000000000ll * 60 * 60);
vhpiPhysT res_limit = vhpi_get_phys(vhpiResolutionLimitP, NULL);
check_error();
fail_unless(phys_to_i64(res_limit) == phys_to_i64(vhpiFS));
vhpiHandleT root = vhpi_handle(vhpiRootInst, NULL);
check_error();
fail_if(root == NULL);
vhpiHandleT handle_x = vhpi_handle_by_name("x", root);
check_error();
fail_if(handle_x == NULL);
vhpi_printf("x handle %p", handle_x);
vhpiPhysT x_val = vhpi_get_phys(vhpiPhysValP, handle_x);
check_error();
fail_unless(phys_to_i64(x_val) == 2);
vhpiHandleT handle_weight_type = vhpi_handle(vhpiType, handle_x);
check_error();
fail_if(handle_weight_type == NULL);
vhpiHandleT handle_weight_cons =
vhpi_handle_by_index(vhpiConstraints, handle_weight_type, 0);
check_error();
fail_if(handle_weight_cons == NULL);
vhpiPhysT weight_left = vhpi_get_phys(vhpiPhysLeftBoundP,
handle_weight_cons);
check_error();
fail_unless(phys_to_i64(weight_left) == -100);
vhpiPhysT weight_right = vhpi_get_phys(vhpiPhysRightBoundP,
handle_weight_cons);
check_error();
fail_unless(phys_to_i64(weight_right) == 4000);
vhpi_release_handle(handle_weight_cons);
vhpi_release_handle(handle_weight_type);
vhpi_release_handle(handle_x);
vhpi_release_handle(root);
}
static void test_bin_str(void)
{
vhpiHandleT root = vhpi_handle(vhpiRootInst, NULL);
check_error();
vhpiHandleT hb = vhpi_handle_by_name("b", root);
check_error();
vhpiHandleT hv = vhpi_handle_by_name("v", root);
check_error();
char b_str[2] = { 0xff, 0xff };
vhpiValueT b_value = {
.format = vhpiBinStrVal,
.bufSize = sizeof(b_str),
.value.str = (vhpiCharT *)b_str
};
vhpi_get_value(hb, &b_value);
check_error();
vhpi_printf("b bit string '%s' %x", b_str);
fail_unless(strcmp(b_str, "0") == 0);
vhpiValueT v_value = {
.format = vhpiBinStrVal,
.bufSize = 0,
.value.str = NULL
};
const int need = vhpi_get_value(hv, &v_value);
check_error();
vhpi_printf("need %d bytes for v string", need);
v_value.value.str = malloc(need);
v_value.bufSize = need;
fail_if(v_value.value.str == NULL);
fail_unless(vhpi_get_value(hv, &v_value) == 0);
check_error();
vhpi_printf("v bit string '%s'", v_value.value.str);
fail_unless(strcmp((char *)v_value.value.str, "0011") == 0);
free(v_value.value.str);
vhpi_release_handle(root);
vhpi_release_handle(hb);
vhpi_release_handle(hv);
}
static void y_value_change(const vhpiCbDataT *cb_data)
{
vhpiValueT value = {
.format = vhpiObjTypeVal
};
vhpi_get_value(handle_y, &value);
check_error();
fail_unless(value.format == vhpiIntVal);
vhpi_printf("y value changed to %d", value.value.intg);
if (value.value.intg == 75) {
test_bin_str();
vhpi_control(vhpiFinish);
check_error();
}
else {
value.value.intg++;
vhpi_put_value(handle_x, &value, vhpiForcePropagate);
check_error();
}
}
static void after_5ns(const vhpiCbDataT *cb_data)
{
vhpi_printf("after_5ns callback!");
long cycles;
vhpiTimeT now;
vhpi_get_time(&now, &cycles);
fail_unless(now.low == 5000000);
fail_unless(now.high == 0);
fail_unless(cycles == 0);
vhpiValueT value = {
.format = vhpiObjTypeVal
};
vhpi_get_value(handle_y, &value);
check_error();
fail_unless(value.format == vhpiIntVal);
fail_unless(value.value.intg == 6);
value.value.intg = 70;
vhpi_put_value(handle_x, &value, vhpiForcePropagate);
check_error();
vhpiCbDataT cb_data2 = {
.reason = vhpiCbValueChange,
.cb_rtn = y_value_change,
.obj = handle_y
};
vhpi_register_cb(&cb_data2, 0);
check_error();
}
//----------------------------------------------------------------------------
// Callback for signal value changing event
//----------------------------------------------------------------------------
PLI_VOID SignalChangedEvent (const struct vhpiCbDataS * cbDatap)
{
int signalValue = 0;
vhpiHandleT SigHdl;
vhpiValueT *value;
value = (vhpiValueT*) malloc(sizeof(vhpiValueT));
value->format = vhpiEnumVal;
if (cbDatap->obj){
// display information about current signal
vhpi_printf("E V E N T : signal %s has value %c at time : %u\n",
vhpi_get_str(vhpiNameP,cbDatap->obj),
cbDatap->value->value.ch,
cbDatap->time->low);
if(cbDatap->value->value.ch == '1')
signalValue = 0;
else
signalValue = 1;
if(!strcmp(vhpi_get_str(vhpiNameP,cbDatap->obj),"CLK"))
{
invec_data.clock = signalValue;
vhpi_printf("invec_data.clock = %d\n", signalValue);
}
else
{
signalValue = !signalValue;
vhpi_printf("invec_data.clear = %d\n", signalValue);
invec_data.clear = signalValue;
}
//-------------------------------------------------------------------------
if ((invec_data.clock_prev == 0 && invec_data.clock == 1) || (invec_data.clock_prev == 1 && invec_data.clock == 0))
{
vhpi_printf("***********************************\n");
vhpi_printf("Simulation time : %u\n",cbDatap->time->low);
vhpi_printf("Module : OSCIL : Read inputs\n");
vhpi_printf("Port CLK=%d Port CLR=%d\n", invec_data.clock, invec_data.clear);
vhpi_printf("Current Q %d\n", Q);
//CLK'event and CLK = '1'
if (invec_data.clock_prev == 0 && invec_data.clock == 1)
{
vhpi_printf("CLK - Rising edge occured _|¯\n");
if (!invec_data.clear)
Q = Q + 1;
}
else
//CLK'event and CLK = '0'
if (invec_data.clock_prev == 1 && invec_data.clock == 0)
{
vhpi_printf("CLK - Falling edge occured ¯|_\n");
if (!invec_data.clear)
Q = Q + 1;
}
vhpi_printf("Current Q %d\n", Q);
switch (Q)
{
case 3 : outvec_data.f0 = 1;
value->value.enumv = 3;
if( (SigHdl = vhpi_handle_by_name(":UUT:U1:F0",0) ) )
{
if(vhpi_put_value(SigHdl,value,vhpiForcePropagate))
vhpi_printf("E R R O R : Cannot update F0 port\n");
}
else
vhpi_printf("E R R O R : Cannot get handler for F0 port\n");
break;
case 4 : outvec_data.f0 = 0;
value->value.enumv = 2;
if( (SigHdl = vhpi_handle_by_name(":UUT:U1:F0",0) ) )
{
if(vhpi_put_value(SigHdl,value,vhpiForcePropagate))
vhpi_printf("E R R O R : Cannot update F0 port\n");
}
else
vhpi_printf("E R R O R : Cannot get handler for F0 port\n");
break;
case 7 : outvec_data.f1 = 1;
value->value.enumv = 3;
if( (SigHdl = vhpi_handle_by_name(":UUT:U1:F1",0) ) )
{
if(vhpi_put_value(SigHdl,value,vhpiForcePropagate))
vhpi_printf("E R R O R : Cannot update F1 port\n");
}
else
vhpi_printf("E R R O R : Cannot get handler for F1 port\n");
break;
case 8 : outvec_data.f1 = 0;
value->value.enumv = 2;
if( (SigHdl = vhpi_handle_by_name(":UUT:U1:F1",0) ) )
{
if(vhpi_put_value(SigHdl,value,vhpiForcePropagate))
vhpi_printf("E R R O R : Cannot update F1 port\n");
}
else
vhpi_printf("E R R O R : Cannot get handler for F1 port\n");
Q = 0;
break;
default :
break;
}
invec_data.clock_prev = invec_data.clock;
invec_data.clear_prev = invec_data.clear;
vhpi_printf("Module : OSCIL : Update outputs\n");
vhpi_printf("Port F0=%d Port F1=%d\n", outvec_data.f0, outvec_data.f1);
vhpi_printf("***********************************\n");
}
//-------------------------------------------------------------------
}
}
PLI_VOID oscil_c_vhpi_proc(const struct vhpiCbDataS *cb_data_p)
{
vhpiCbDataT cbDataAction;
vhpiHandleT SigHdl;
vhpiHandleT CallbackHdl;
vhpiValueT value;
vhpiTimeT time;
vhpiValueT *initValue;
vhpi_printf( "Registering signals CLK & CLR for event changes\n");
vhpi_printf( "invec_data.clear = %d\n", invec_data.clear);
vhpi_printf( "invec_data.clock = %d\n", invec_data.clock);
//Entity: oscil_c_vhpi
//port CLK : in STD_LOGIC;
//port CLR : in STD_LOGIC;
//port F0 : out STD_LOGIC;
//port F1 : out STD_LOGIC;
value.format = vhpiCharVal; //signals are BIT
cbDataAction.value = &value;
cbDataAction.reason = vhpiCbValueChange; //on signal value change event
cbDataAction.time = &time;
cbDataAction.cb_rtn = SignalChangedEvent;
//get signal by name
if ( (SigHdl = vhpi_handle_by_name(":UUT:U1:CLK",0) ) )
{
cbDataAction.obj = SigHdl; //connect callback to the signal
//register
if ( (CallbackHdl = vhpi_register_cb(&cbDataAction, vhpiReturnCb) ) )
{
vhpi_printf("callback on signal %s registered \n",vhpi_get_str(vhpiNameP,SigHdl));
registration = 1;
}
else
{
vhpi_printf("callback on signal %s NOT registered \n",vhpi_get_str(vhpiNameP,SigHdl));
registration = 0;
}
}
//get signal by name
if ( (SigHdl = vhpi_handle_by_name(":UUT:U1:CLR",0) ) )
{
cbDataAction.obj = SigHdl; //connect callback to the signal
//register
if ( (CallbackHdl = vhpi_register_cb(&cbDataAction, vhpiReturnCb) ) )
{
vhpi_printf("callback on signal %s registered \n",vhpi_get_str(vhpiNameP,SigHdl));
registration = 1;
}
else
{
vhpi_printf("callback on signal %s NOT registered \n",vhpi_get_str(vhpiNameP,SigHdl));
registration = 0;
}
}
if(registration)
{
vhpi_printf("**********************************************************************\n");
vhpi_printf("* Active-HDL - SystemC/VHDL/Verilog/EDIF/C/C++ interface initialized *\n");
vhpi_printf("* -----------------------VHPI VERSION------------------------------- *\n");
vhpi_printf("**********************************************************************\n");
invec_data.clock = 0;
invec_data.clear = 0;
invec_data.clock_prev = invec_data.clock;
invec_data.clear_prev = invec_data.clear;
Q = 0;
initValue = (vhpiValueT*) malloc(sizeof(vhpiValueT));
initValue->format = vhpiEnumVal;
initValue->value.enumv = 2;
//Initialize out port F0
if( (SigHdl = vhpi_handle_by_name(":UUT:U1:F0",0) ) )
{
if(vhpi_put_value(SigHdl,initValue,vhpiForcePropagate))
vhpi_printf("E R R O R : Cannot update F0 port\n");
}
else
vhpi_printf("E R R O R : Cannot get handler for F0 port\n");
//Initialize out port F1
if( (SigHdl = vhpi_handle_by_name(":UUT:U1:F1",0) ) )
{
if(vhpi_put_value(SigHdl,initValue,vhpiForcePropagate))
vhpi_printf("E R R O R : Cannot update F1 port\n");
}
else
vhpi_printf("E R R O R : Cannot get handler for F1 port\n");
}
else
{
vhpi_printf("**************************************************************************\n");
vhpi_printf("* Active-HDL - SystemC/VHDL/Verilog/EDIF/C/C++ interface not initialized *\n");
vhpi_printf("* -----------------------VHPI VERSION----------------------------------- *\n");
vhpi_printf("**************************************************************************\n");
}
}
