static u32 ddl_eos_frame_done_callback(struct ddl_context *ddl_context)
{
struct ddl_client_context *ddl = ddl_context->current_ddl;
struct ddl_decoder_data *decoder = &(ddl->codec_data.decoder);
struct vidc_720p_dec_disp_info *dec_disp_info =
&(decoder->dec_disp_info);
if (!DDLCLIENT_STATE_IS(ddl, DDL_CLIENT_WAIT_FOR_EOS_DONE)) {
VIDC_LOGERR_STRING("STATE-CRITICAL-EOSFRMRUN");
ddl_client_fatal_cb(ddl_context);
return true;
}
VIDC_LOG_STRING("EOS_FRM_RUN_DONE");
ddl_move_command_state(ddl_context, DDL_CMD_INVALID);
vidc_720p_decode_display_info(dec_disp_info);
ddl_decode_dynamic_property(ddl, false);
if (dec_disp_info->disp_status == VIDC_720P_DISPLAY_ONLY) {
if (ddl_decoder_output_done_callback(ddl, false)
!= VCD_S_SUCCESS)
return true;
} else
VIDC_LOG_STRING("STATE-CRITICAL-WRONG-DISP-STATUS");
ddl_decoder_dpb_transact(decoder, NULL, DDL_DPB_OP_SET_MASK);
ddl_move_command_state(ddl_context, DDL_CMD_EOS);
vidc_720p_submit_command(ddl->channel_id,
VIDC_720P_CMD_FRAMERUN);
return false;
}
void vidc_720p_decode_bitstream_header(u32 ch_id,
u32 dec_unit_size,
u32 start_byte_num,
u32 ext_buffer_start,
u32 ext_buffer_end,
enum
vidc_720p_memory_access_method
memory_access_model,
u32 decode_order)
{
VIDC_IO_OUT(REG_965480, decode_order);
VIDC_IO_OUT(REG_639999, 0x8080);
VIDC_IO_OUT(REG_275113_ADDR, ext_buffer_start);
VIDC_IO_OUT(REG_988007_ADDR, ext_buffer_end);
VIDC_IO_OUT(REG_87912, ext_buffer_end);
VIDC_IO_OUT(REG_761892, dec_unit_size);
VIDC_IO_OUT(REG_66693, start_byte_num);
VIDC_IO_OUT(REG_841539, memory_access_model);
vidc_720p_submit_command(ch_id, VIDC_720P_CMD_INITCODEC);
}
void vidc_720p_decode_bitstream_header(u32 n_ch_id,
u32 n_dec_unit_size,
u32 n_start_byte_num,
u32 n_ext_buffer_start,
u32 n_ext_buffer_end,
enum
vidc_720p_memory_access_method_type
e_memory_access_model)
{
VIDC_IO_OUT(REG_965480, 0x0);
VIDC_IO_OUT(REG_275113_ADDR, n_ext_buffer_start);
VIDC_IO_OUT(REG_988007_ADDR, n_ext_buffer_end);
VIDC_IO_OUT(REG_87912, n_ext_buffer_end);
VIDC_IO_OUT(REG_761892, n_dec_unit_size);
VIDC_IO_OUT(REG_66693, n_start_byte_num);
VIDC_IO_OUT(REG_841539, e_memory_access_model);
vidc_720p_submit_command(n_ch_id, VIDC_720P_CMD_INITCODEC);
}
void vidc_720p_issue_eos(u32 i_ch_id)
{
VIDC_IO_OUT(REG_896825, 0x1);
VIDC_IO_OUT(REG_761892, 0);
vidc_720p_submit_command(i_ch_id, VIDC_720P_CMD_FRAMERUN);
}
void vidc_720p_encode_init_codec(u32 i_ch_id,
enum vidc_720p_memory_access_method
memory_access_model)
{
VIDC_IO_OUT(REG_841539, memory_access_model);
vidc_720p_submit_command(i_ch_id, VIDC_720P_CMD_INITCODEC);
}
void vidc_720p_set_channel(u32 i_ch_id,
enum vidc_720p_enc_dec_selection
enc_dec_sel, enum vidc_720p_codec codec,
u32 *pi_fw, u32 i_firmware_size)
{
u32 std_sel = 0;
VIDC_IO_OUT(REG_661565, 0);
if (enc_dec_sel)
std_sel = VIDC_REG_713080_ENC_ON_BMSK;
std_sel |= (u32) codec;
VIDC_IO_OUT(REG_713080, std_sel);
switch (codec) {
default:
case VIDC_720P_DIVX:
case VIDC_720P_XVID:
case VIDC_720P_MPEG4:
{
if (enc_dec_sel == VIDC_720P_ENCODER)
VIDC_IO_OUT(REG_765787, pi_fw);
else
VIDC_IO_OUT(REG_225040, pi_fw);
break;
}
case VIDC_720P_H264:
{
if (enc_dec_sel == VIDC_720P_ENCODER)
VIDC_IO_OUT(REG_942456, pi_fw);
else
VIDC_IO_OUT(REG_942170_ADDR_3, pi_fw);
break;
}
case VIDC_720P_H263:
{
if (enc_dec_sel == VIDC_720P_ENCODER)
VIDC_IO_OUT(REG_765787, pi_fw);
else
VIDC_IO_OUT(REG_942170_ADDR_6, pi_fw);
break;
}
case VIDC_720P_VC1:
{
VIDC_IO_OUT(REG_880188, pi_fw);
break;
}
case VIDC_720P_MPEG2:
{
VIDC_IO_OUT(REG_40293, pi_fw);
break;
}
}
VIDC_IO_OUT(REG_591577, i_firmware_size);
vidc_720p_submit_command(i_ch_id, VIDC_720P_CMD_CHSET);
}
u32 vidc_720p_engine_reset(u32 ch_id,
enum vidc_720p_endian dma_endian,
enum vidc_720p_interrupt_level_selection interrupt_sel,
u32 interrupt_mask
)
{
u32 op_done = 0;
u32 counter = 0;
VIDC_LOGERR_STRING("ENG-RESET!!");
/* issue the engine reset command */
vidc_720p_submit_command(ch_id, VIDC_720P_CMD_MFC_ENGINE_RESET);
do {
VIDC_BUSY_WAIT(20);
VIDC_IO_IN(REG_982553, &op_done);
counter++;
} while (!op_done && counter < 10);
if (!op_done) {
/* Reset fails */
return false ;
}
/* write invalid channel id */
VIDC_IO_OUT(REG_97293, 4);
/* Set INT_PULSE_SEL */
if (interrupt_sel == VIDC_720P_INTERRUPT_LEVEL_SEL)
VIDC_IO_OUT(REG_491082, 0);
else
VIDC_IO_OUT(REG_491082, 1);
if (!interrupt_mask) {
/* Disable interrupt */
VIDC_IO_OUT(REG_609676, 1);
} else {
/* Enable interrupt */
VIDC_IO_OUT(REG_609676, 0);
}
/* Clear any pending interrupt */
VIDC_IO_OUT(REG_614776, 1);
/* Set INT_ENABLE_REG */
VIDC_IO_OUT(REG_418173, interrupt_mask);
/*Sets the DMA endianness */
VIDC_IO_OUT(REG_736316, dma_endian);
/*Restore ARM endianness */
VIDC_IO_OUT(REG_215724, 0);
/* retun engine reset success */
return true ;
}
void vidc_720p_decode_frame(u32 ch_id, u32 ext_buffer_start,
u32 ext_buffer_end, u32 dec_unit_size,
u32 start_byte_num, u32 input_frame_tag)
{
VIDC_IO_OUT(REG_275113_ADDR, ext_buffer_start);
VIDC_IO_OUT(REG_988007_ADDR, ext_buffer_end);
VIDC_IO_OUT(REG_87912, ext_buffer_end);
VIDC_IO_OUT(REG_66693, start_byte_num);
VIDC_IO_OUT(REG_94750, input_frame_tag);
VIDC_IO_OUT(REG_761892, dec_unit_size);
vidc_720p_submit_command(ch_id, VIDC_720P_CMD_FRAMERUN);
}
void vidc_720p_encode_frame(u32 ch_id,
u32 ext_buffer_start,
u32 ext_buffer_end,
u32 start_byte_number, u32 y_addr,
u32 c_addr)
{
VIDC_IO_OUT(REG_275113_ADDR, ext_buffer_start);
VIDC_IO_OUT(REG_988007_ADDR, ext_buffer_end);
VIDC_IO_OUT(REG_87912, ext_buffer_start);
VIDC_IO_OUT(REG_66693, start_byte_number);
VIDC_IO_OUT(REG_99105, y_addr);
VIDC_IO_OUT(REG_777113_ADDR, c_addr);
vidc_720p_submit_command(ch_id, VIDC_720P_CMD_FRAMERUN);
}
static u32 ddl_decoder_frame_run_callback(struct ddl_context
*ddl_context)
{
struct ddl_client_context *ddl = ddl_context->current_ddl;
struct vidc_720p_dec_disp_info *dec_disp_info =
&(ddl->codec_data.decoder.dec_disp_info);
u32 callback_end = false;
u32 status = true, eos_present = false;;
if (!DDLCLIENT_STATE_IS(ddl, DDL_CLIENT_WAIT_FOR_FRAME_DONE)) {
VIDC_LOG_STRING("STATE-CRITICAL-DECFRMRUN");
ddl_client_fatal_cb(ddl_context);
return true;
}
VIDC_LOG_STRING("DEC_FRM_RUN_DONE");
ddl_move_command_state(ddl_context, DDL_CMD_INVALID);
vidc_720p_decode_display_info(dec_disp_info);
ddl_decode_dynamic_property(ddl, false);
if (dec_disp_info->resl_change) {
VIDC_LOG_STRING
("DEC_FRM_RUN_DONE: RECONFIG");
ddl_move_client_state(ddl, DDL_CLIENT_WAIT_FOR_EOS_DONE);
ddl_move_command_state(ddl_context, DDL_CMD_EOS);
vidc_720p_submit_command(ddl->channel_id,
VIDC_720P_CMD_FRAMERUN_REALLOCATE);
return false;
}
if ((VCD_FRAME_FLAG_EOS & ddl->input_frame.vcd_frm.flags)) {
callback_end = false;
eos_present = true;
}
if (dec_disp_info->disp_status == VIDC_720P_DECODE_ONLY ||
dec_disp_info->disp_status
== VIDC_720P_DECODE_AND_DISPLAY) {
if (!eos_present)
callback_end = (dec_disp_info->disp_status
== VIDC_720P_DECODE_ONLY);
ddl_decoder_input_done_callback(ddl, callback_end);
}
if (dec_disp_info->disp_status == VIDC_720P_DECODE_AND_DISPLAY
|| dec_disp_info->disp_status == VIDC_720P_DISPLAY_ONLY) {
if (!eos_present)
callback_end =
(dec_disp_info->disp_status
== VIDC_720P_DECODE_AND_DISPLAY);
if (ddl_decoder_output_done_callback(ddl, callback_end)
!= VCD_S_SUCCESS)
return true;
}
if (dec_disp_info->disp_status == VIDC_720P_DISPLAY_ONLY ||
dec_disp_info->disp_status == VIDC_720P_EMPTY_BUFFER) {
/* send the same input once again for decoding */
ddl_decode_frame_run(ddl);
/* client need to ignore the interrupt */
status = false;
} else if (eos_present) {
/* send EOS command to HW */
ddl_decode_eos_run(ddl);
/* client need to ignore the interrupt */
status = false;
} else {
ddl_move_client_state(ddl, DDL_CLIENT_WAIT_FOR_FRAME);
/* move to Idle */
DDL_IDLE(ddl_context);
}
return status;
}
