BOOT_CODE void map_kernel_devices(void) { /* map kernel device: GIC controller and private timers */ map_kernel_frame( ARM_MP_PADDR, ARM_MP_PPTR1, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); /* map kernel device: GIC distributor */ map_kernel_frame( ARM_MP_PADDR + BIT(PAGE_BITS), ARM_MP_PPTR2, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); /* map kernel device: L2CC */ map_kernel_frame( L2CC_PL310_PADDR, L2CC_PL310_PPTR, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); #ifdef CONFIG_PRINTING /* map kernel device: UART */ map_kernel_frame( UART_PADDR, UART_PPTR, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); #endif /* CONFIG_PRINTING */ }
BOOT_CODE void map_kernel_devices(void) { /* map kernel device: Watch dog timer used as PIT */ map_kernel_frame( MCT_PADDR, MCT_PPTR, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); /* map kernel device: GIC */ map_kernel_frame( GIC_CONTROLLER0_PADDR, GIC_CONTROLLER_PPTR, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); map_kernel_frame( GIC_DISTRIBUTOR_PADDR, GIC_DISTRIBUTOR_PPTR, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); #if defined(DEBUG) /* map kernel device: UART */ map_kernel_frame( UART2_PADDR, UART_PPTR, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); #endif /* DEBUG */ }
BOOT_CODE void map_kernel_devices(void) { /* map kernel device: GP Timer 11 */ map_kernel_frame( TIMER0_PADDR, TIMER0_PPTR, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); /* map kernel device: GIC */ map_kernel_frame( GIC_CONTROLLER0_PADDR, GIC_CONTROLLER_PPTR, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); map_kernel_frame( GIC_DISTRIBUTOR_PADDR, GIC_DISTRIBUTOR_PPTR, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); #ifdef DEBUG /* map kernel device: UART */ map_kernel_frame( UART0_PADDR, UART0_PPTR, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); #endif }
BOOT_CODE void map_kernel_devices(void) { for (int i = 0; i < ARRAY_SIZE(kernel_devices); i++) { map_kernel_frame(kernel_devices[i].paddr, kernel_devices[i].pptr, VMKernelOnly, vm_attributes_new(kernel_devices[i].armExecuteNever, false, false)); } }
BOOT_CODE void map_kernel_devices(void) { /* map kernel device: GP Timer 9 */ map_kernel_frame( GPTIMER9_PADDR, GPTIMER9_PPTR, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); /* map kernel device: INTC */ map_kernel_frame( INTC_PADDR, INTC_PPTR, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); #if defined DEBUG || defined RELEASE_PRINTF /* map kernel device: UART */ map_kernel_frame( UART3_PADDR, UART3_PPTR, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); #endif }
BOOT_CODE void map_kernel_devices(void) { /* map kernel device: DM Timer 0 */ map_kernel_frame( DMTIMER0_PADDR, DMTIMER0_PPTR, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); /* map kernel device: INTC */ map_kernel_frame( INTC_PADDR, INTC_PPTR, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); /* map kernel device: WDT1 */ map_kernel_frame( WDT1_PADDR, WDT1_PPTR, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); /* map kernel device: CMPER */ map_kernel_frame( CMPER_PADDR, CMPER_PPTR, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); #ifdef CONFIG_PRINTING /* map kernel device: UART */ map_kernel_frame( UART0_PADDR, UART0_PPTR, VMKernelOnly, vm_attributes_new( true, /* armExecuteNever */ false, /* armParityEnabled */ false /* armPageCacheable */ ) ); #endif }