static int gic_set_affinity(struct vmm_host_irq *irq, const struct vmm_cpumask *mask_val, bool force) { virtual_addr_t reg; u32 shift = (irq->num % 4) * 8; u32 cpu = vmm_cpumask_first(mask_val); u32 val, mask, bit; if (cpu >= 8) return VMM_EINVALID; reg = gic_dist_base(irq) + GIC_DIST_TARGET + (gic_irq(irq) & ~3); mask = 0xff << shift; bit = 1 << (cpu + shift); val = gic_read(reg) & ~mask; gic_write(val | bit, reg); return 0; }
static int gic_set_affinity(struct vmm_host_irq *d, const struct vmm_cpumask *mask_val, bool force) { virtual_addr_t reg; u32 shift = (d->hwirq % 4) * 8; u32 cpu = vmm_cpumask_first(mask_val); u32 val, mask, bit; struct gic_chip_data *gic = vmm_host_irq_get_chip_data(d); if (cpu >= 8) return VMM_EINVALID; reg = gic->dist_base + GICD_TARGET + (d->hwirq & ~3); mask = 0xff << shift; bit = 1 << (cpu + shift); val = gic_read(reg) & ~mask; gic_write(val | bit, reg); return 0; }