/* Read a TX descriptor */ static void txdesc_read(struct pos_oc3_data *d,m_uint32_t txd_addr, struct tx_desc *txd) { /* get the next descriptor from VM physical RAM */ physmem_copy_from_vm(d->vm,txd,txd_addr,sizeof(struct tx_desc)); /* byte-swapping */ txd->tdes[0] = vmtoh32(txd->tdes[0]); txd->tdes[1] = vmtoh32(txd->tdes[1]); }
/* Read a SDMA descriptor from memory */ static void mv64460_sdma_desc_read(struct mv64460_data *d,m_uint32_t addr, struct sdma_desc *desc) { physmem_copy_from_vm(d->vm,desc,addr,sizeof(struct sdma_desc)); /* byte-swapping */ desc->buf_size = vmtoh32(desc->buf_size); desc->cmd_stat = vmtoh32(desc->cmd_stat); desc->next_ptr = vmtoh32(desc->next_ptr); desc->buf_ptr = vmtoh32(desc->buf_ptr); }
/* Write a SDMA descriptor to memory */ static void mv64460_sdma_desc_write(struct mv64460_data *d,m_uint32_t addr, struct sdma_desc *desc) { struct sdma_desc tmp; /* byte-swapping */ tmp.cmd_stat = vmtoh32(desc->cmd_stat); tmp.buf_size = vmtoh32(desc->buf_size); tmp.next_ptr = vmtoh32(desc->next_ptr); tmp.buf_ptr = vmtoh32(desc->buf_ptr); physmem_copy_to_vm(d->vm,&tmp,addr,sizeof(struct sdma_desc)); }
/* Read an RX descriptor */ static void rxdesc_read(struct pos_oc3_data *d,m_uint32_t rxd_addr, struct rx_desc *rxd) { #if DEBUG_RECEIVE POS_LOG(d,"reading RX descriptor at address 0x%x\n",rxd_addr); #endif /* get the next descriptor from VM physical RAM */ physmem_copy_from_vm(d->vm,rxd,rxd_addr,sizeof(struct rx_desc)); /* byte-swapping */ rxd->rdes[0] = vmtoh32(rxd->rdes[0]); rxd->rdes[1] = vmtoh32(rxd->rdes[1]); }
/* Update the data obtained by a read access */ void memlog_update_read(cpu_gen_t *cpu,m_iptr_t raddr) { memlog_access_t *acc; acc = &cpu->memlog_array[(cpu->memlog_pos-1) & (MEMLOG_COUNT-1)]; if (acc->op_type == MTS_READ) { switch(acc->op_size) { case 1: acc->data = *(m_uint8_t *)raddr; break; case 2: acc->data = vmtoh16(*(m_uint16_t *)raddr); break; case 4: acc->data = vmtoh32(*(m_uint32_t *)raddr); break; case 8: acc->data = vmtoh64(*(m_uint64_t *)raddr); break; } acc->data_valid = TRUE; } }
/* LWU: Load Word Unsigned */ fastcall void MTS_PROTO(lwu)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg) { m_uint64_t data; void *haddr; haddr = MTS_PROTO(access)(cpu,vaddr,MIPS_MEMOP_LWU,4,MTS_READ,&data); if (likely(haddr != NULL)) data = vmtoh32(*(m_uint32_t *)haddr); cpu->gpr[reg] = data & 0xffffffff; }
/* Copy a 32-bit word from the VM physical RAM to real host */ m_uint32_t physmem_copy_u32_from_vm(vm_instance_t *vm,m_uint64_t paddr) { m_uint64_t tmp = 0; m_uint32_t *ptr; if ((ptr = physmem_get_hptr(vm,paddr,4,MTS_READ,&tmp)) != NULL) return(vmtoh32(*ptr)); return(tmp); }
/* LL: Load Linked */ fastcall void MTS_PROTO(ll)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg) { m_uint64_t data; void *haddr; haddr = MTS_PROTO(access)(cpu,vaddr,MIPS_MEMOP_LL,4,MTS_READ,&data); if (likely(haddr != NULL)) data = vmtoh32(*(m_uint32_t *)haddr); cpu->gpr[reg] = sign_extend(data,32); cpu->ll_bit = 1; }
/* Fetch an instruction */ int mips_fetch_instruction (cpu_mips_t * cpu, m_va_t pc, mips_insn_t * insn) { m_va_t exec_page; m_uint32_t offset; exec_page = pc & ~(m_va_t) MIPS_MIN_PAGE_IMASK; if (unlikely (exec_page != cpu->njm_exec_page)) { cpu->njm_exec_ptr = cpu->mem_op_lookup (cpu, exec_page); } if (cpu->njm_exec_ptr == NULL) { //exception when fetching instruction return (1); } cpu->njm_exec_page = exec_page; offset = (pc & MIPS_MIN_PAGE_IMASK) >> 2; *insn = vmtoh32 (cpu->njm_exec_ptr[offset]); // printf ("(%08x) %08x\n", pc, *insn); return (0); }
/* LWL: Load Word Left */ fastcall void MTS_PROTO(lwl)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg) { m_uint64_t r_mask,naddr; m_uint64_t data; u_int m_shift; void *haddr; naddr = vaddr & ~(0x03); haddr = MTS_PROTO(access)(cpu,naddr,MIPS_MEMOP_LWL,4,MTS_READ,&data); if (likely(haddr != NULL)) data = vmtoh32(*(m_uint32_t *)haddr); m_shift = (vaddr & 0x03) << 3; r_mask = (1ULL << m_shift) - 1; data <<= m_shift; cpu->gpr[reg] &= r_mask; cpu->gpr[reg] |= data; cpu->gpr[reg] = sign_extend(cpu->gpr[reg],32); }
/* SWR: Store Word Right */ fastcall void MTS_PROTO(swr)(cpu_mips_t *cpu,m_uint64_t vaddr,u_int reg) { m_uint64_t d_mask,naddr; m_uint64_t data; u_int r_shift; void *haddr; naddr = vaddr & ~(0x03); haddr = MTS_PROTO(access)(cpu,naddr,MIPS_MEMOP_SWR,4,MTS_READ,&data); if (likely(haddr != NULL)) data = vmtoh32(*(m_uint32_t *)haddr); r_shift = ((vaddr & 0x03) + 1) << 3; d_mask = 0xffffffff >> r_shift; data &= d_mask; data |= (cpu->gpr[reg] << (32 - r_shift)) & 0xffffffff; haddr = MTS_PROTO(access)(cpu,naddr,MIPS_MEMOP_SWR,4,MTS_WRITE,&data); if (likely(haddr != NULL)) *(m_uint32_t *)haddr = htovm32(data); }