static irqreturn_t fnic_isr_legacy(int irq, void *data) { struct fnic *fnic = data; u32 pba; unsigned long work_done = 0; pba = vnic_intr_legacy_pba(fnic->legacy_pba); if (!pba) return IRQ_NONE; if (pba & (1 << FNIC_INTX_NOTIFY)) { vnic_intr_return_all_credits(&fnic->intr[FNIC_INTX_NOTIFY]); fnic_handle_link_event(fnic); } if (pba & (1 << FNIC_INTX_ERR)) { vnic_intr_return_all_credits(&fnic->intr[FNIC_INTX_ERR]); fnic_log_q_error(fnic); } if (pba & (1 << FNIC_INTX_WQ_RQ_COPYWQ)) { work_done += fnic_wq_copy_cmpl_handler(fnic, -1); work_done += fnic_wq_cmpl_handler(fnic, -1); work_done += fnic_rq_cmpl_handler(fnic, -1); vnic_intr_return_credits(&fnic->intr[FNIC_INTX_WQ_RQ_COPYWQ], work_done, 1 /* unmask intr */, 1 /* reset intr timer */); } return IRQ_HANDLED; }
static irqreturn_t enic_isr_legacy(int irq, void *data) { struct net_device *netdev = data; struct enic *enic = netdev_priv(netdev); u32 pba; vnic_intr_mask(&enic->intr[ENIC_INTX_WQ_RQ]); pba = vnic_intr_legacy_pba(enic->legacy_pba); if (!pba) { vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]); return IRQ_NONE; /* not our interrupt */ } if (ENIC_TEST_INTR(pba, ENIC_INTX_NOTIFY)) enic_notify_check(enic); if (ENIC_TEST_INTR(pba, ENIC_INTX_ERR)) { enic_log_q_error(enic); /* schedule recovery from WQ/RQ error */ schedule_work(&enic->reset); return IRQ_HANDLED; } if (ENIC_TEST_INTR(pba, ENIC_INTX_WQ_RQ)) { if (netif_rx_schedule_prep(&enic->napi)) __netif_rx_schedule(&enic->napi); } else { vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]); } return IRQ_HANDLED; }
static irqreturn_t enic_isr_legacy(int irq, void *data) { struct net_device *netdev = data; struct enic *enic = netdev_priv(netdev); u32 pba; vnic_intr_mask(&enic->intr[ENIC_INTX_WQ_RQ]); pba = vnic_intr_legacy_pba(enic->legacy_pba); if (!pba) { vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]); return IRQ_NONE; } if (ENIC_TEST_INTR(pba, ENIC_INTX_NOTIFY)) { vnic_intr_return_all_credits(&enic->intr[ENIC_INTX_NOTIFY]); enic_notify_check(enic); } if (ENIC_TEST_INTR(pba, ENIC_INTX_ERR)) { vnic_intr_return_all_credits(&enic->intr[ENIC_INTX_ERR]); enic_log_q_error(enic); schedule_work(&enic->reset); return IRQ_HANDLED; } if (ENIC_TEST_INTR(pba, ENIC_INTX_WQ_RQ)) { if (napi_schedule_prep(&enic->napi)) __napi_schedule(&enic->napi); } else { vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]); } return IRQ_HANDLED; }