void vs_reset(int unit)
{
unsigned long i;
//ssi speed down
vs_ssi_wait(); //wait for transfer complete
vs_ssi_speed(2000000); //2 MHz
//hard reset
VS_CS_DISABLE(unit);
VS_DCS_DISABLE(unit);
VS_RST_ENABLE(unit);
delay_ms(5);
VS_RST_DISABLE(unit);
delay_ms(10);
//set registers
vs_write_reg(unit, VS_MODE, SM_SDINEW);
//set clock multiplier and load patch - VS1033
vs_write_reg(unit, VS_CLOCKF, 0x1800|VS1033_SC_MUL_4X);
//Load Patch disabled
//vs_write_plugin(vs1033d_patch, VS1033D_PATCHLEN);
//ssi speed up
vs_ssi_speed(0); //0 = default speed
return;
}
void vs_reset(void)
{
unsigned long i;
DEBUGOUT("VS: reset\n");
//ssi speed down
vs_ssi_wait(); //wait for transfer complete
vs_ssi_speed(2000000); //2 MHz
//hard reset
VS_CS_DISABLE();
VS_DCS_DISABLE();
VS_RST_ENABLE();
delay_ms(5);
VS_RST_DISABLE();
delay_ms(10);
//set registers
vs_write_reg(VS_MODE, SM_SDINEW);
//get VS version, set clock multiplier and load patch
i = (vs_read_reg(VS_STATUS)&0xF0)>>4;
if(i == 4) //VS1053
{
DEBUGOUT("VS: VS1053\n");
vs_write_reg(VS_CLOCKF, 0x1800|VS1053_SC_MUL_4X);
DEBUGOUT("VS: load VS1053B patch\n"); //VS1053B
vs_write_plugin(vs1053b_patch, VS1053B_PATCHLEN);
}
else if(i == 5) //VS1033
{
DEBUGOUT("VS: VS1033\n");
vs_write_reg(VS_CLOCKF, 0x1800|VS1033_SC_MUL_4X);
i = vs_read_ram(0x1942); //extra parameter (0x1940) -> version (0x1942)
if(i < 3) //VS1033C
{
DEBUGOUT("VS: load VS1033C patch\n");
vs_write_plugin(vs1033c_patch, VS1033C_PATCHLEN);
}
else //VS1033D
{
DEBUGOUT("VS: load VS1033D patch\n");
vs_write_plugin(vs1033d_patch, VS1033D_PATCHLEN);
}
}
//ssi speed up
vs_ssi_speed(0); //0 = default speed
return;
}
