void
do_console(void)
{
char line[256];
unsigned long len;
wrkgp();
wrent(entInt, 0);
set_console_alarm();
swpipl(0);
if (have_vga)
{
unsigned short *vga, attr;
vga = pci_mem_base + SEG_CTEXT *16;
attr = 0x2000;
vga[0] = 'H' + attr;
vga[1] = 'e' + attr;
vga[2] = 'l' + attr;
vga[3] = 'l' + attr;
vga[4] = 'o' + attr;
}
while (1)
{
crb_puts(0, ">>> ", 4);
len = getline(line, sizeof(line));
crb_puts(0, "got: ", 5);
crb_puts(0, line, len);
output_crnl();
}
}
void __init
init_IRQ(void)
{
/* Just in case the platform init_irq() causes interrupts/mchecks
(as is the case with RAWHIDE, at least). */
wrent(entInt, 0);
alpha_mv.init_irq();
}
void init_IRQ(void)
{
wrent(entInt, 0);
dma_outb(0, DMA1_RESET_REG);
dma_outb(0, DMA2_RESET_REG);
dma_outb(0, DMA1_CLR_MASK_REG);
dma_outb(0, DMA2_CLR_MASK_REG);
#if NR_IRQS == 48
*(unsigned int *)GRU_INT_MASK = ~(irq_mask >> 16); mb();/* invert */
enable_irq(16 + 31); /* enable (E)ISA PIC cascade */
#elif NR_IRQS == 33
outl(irq_mask >> 16, 0x804);
enable_irq(16 + 4); /* enable SIO cascade */
#elif defined(CONFIG_ALPHA_MIKASA)
outw(~(irq_mask >> 16), 0x536); /* note invert */
#elif NR_IRQS == 32
outb(irq_mask >> 16, 0x26);
outb(irq_mask >> 24, 0x27);
enable_irq(16 + 5); /* enable SIO cascade */
#endif
enable_irq(2); /* enable cascade */
}