void writeCommand(int* dramAddress, int busNumber, int chipNumber, int pageNumber, int offset, int operationCode, int length, int tag)
{
writeToRegister(WRITE_ADDR_OFFSET_CMD_0, (int)dramAddress);
writeToRegister(WRITE_ADDR_OFFSET_CMD_1, (int)(((busNumber & 0xF) << 28) | ((chipNumber & 0xF) << 24) | (pageNumber & 0xFFFFFF)));
writeToRegister(WRITE_ADDR_OFFSET_CMD_2, (int)(((offset & 0xFFFF) << 16) | ((operationCode & CMD_OP_CODE_MASK) << CMD_OP_CODE_LEFT_SHIFT) | (length & CMD_LENGTH_MASK)));
writeToRegister(WRITE_ADDR_OFFSET_CMD_3, (int)((tag & 0x3F) << 26));
}
void setForceMode(){
uchar command[2];
// MEAS_RATE set to force mode
command[0] = 0x00;
command[1] = 0x00;
writeToRegister(MEAS_RATE0, command, 2);
readFromRegister(MEAS_RATE0, command, 2);
/********* I2C regs: Set interrupt enable *********/
// interrupt output pin enable
command[0] = 0x01;
writeToRegister(INT_CFG, command, 1);
readFromRegister(INT_CFG, command, 1);
// interrupt enable
command[0] = 0x01;
writeToRegister(IRQ_ENABLE, command, 1);
readFromRegister(IRQ_ENABLE, command, 1);
// Reset the Interrupt
//readFromRegister(IRQ_STATUS, command, 1);
//writeToRegister(IRQ_STATUS, command, 1);
// Send ALS_FORCE command for each measurement
}
void MCP23018::begin(void)
{
Serial.print("\nBeginning\n");
// Set all pins to outputs
writeToRegister(IODIRA,B11111111);
writeToRegister(IODIRB,B00000000);
SetPullups(B11111111, B00000000);
}
boolean MFRC522::digitalSelfTestPass() {
int i;
byte n;
byte selfTestResultV1[] = {0x00, 0xC6, 0x37, 0xD5, 0x32, 0xB7, 0x57, 0x5C,
0xC2, 0xD8, 0x7C, 0x4D, 0xD9, 0x70, 0xC7, 0x73,
0x10, 0xE6, 0xD2, 0xAA, 0x5E, 0xA1, 0x3E, 0x5A,
0x14, 0xAF, 0x30, 0x61, 0xC9, 0x70, 0xDB, 0x2E,
0x64, 0x22, 0x72, 0xB5, 0xBD, 0x65, 0xF4, 0xEC,
0x22, 0xBC, 0xD3, 0x72, 0x35, 0xCD, 0xAA, 0x41,
0x1F, 0xA7, 0xF3, 0x53, 0x14, 0xDE, 0x7E, 0x02,
0xD9, 0x0F, 0xB5, 0x5E, 0x25, 0x1D, 0x29, 0x79};
byte selfTestResultV2[] = {0x00, 0xEB, 0x66, 0xBA, 0x57, 0xBF, 0x23, 0x95,
0xD0, 0xE3, 0x0D, 0x3D, 0x27, 0x89, 0x5C, 0xDE,
0x9D, 0x3B, 0xA7, 0x00, 0x21, 0x5B, 0x89, 0x82,
0x51, 0x3A, 0xEB, 0x02, 0x0C, 0xA5, 0x00, 0x49,
0x7C, 0x84, 0x4D, 0xB3, 0xCC, 0xD2, 0x1B, 0x81,
0x5D, 0x48, 0x76, 0xD5, 0x71, 0x61, 0x21, 0xA9,
0x86, 0x96, 0x83, 0x38, 0xCF, 0x9D, 0x5B, 0x6D,
0xDC, 0x15, 0xBA, 0x3E, 0x7D, 0x95, 0x3B, 0x2F};
byte *selfTestResult;
switch(getFirmwareVersion()) {
case 0x91 :
selfTestResult = selfTestResultV1;
break;
case 0x92 :
selfTestResult = selfTestResultV2;
break;
default:
return false;
}
reset();
writeToRegister(FIFODataReg, 0x00);
writeToRegister(CommandReg, MFRC522_MEM);
writeToRegister(AutoTestReg, 0x09);
writeToRegister(FIFODataReg, 0x00);
writeToRegister(CommandReg, MFRC522_CALCCRC);
// Wait for the self test to complete.
i = 0xFF;
do {
n = readFromRegister(DivIrqReg);
i--;
} while ((i != 0) && !(n & 0x04));
for (i=0; i < 64; i++) {
if (readFromRegister(FIFODataReg) != selfTestResult[i]) {
Serial.println(i);
return false;
}
}
return true;
}
void uvReset(){
uchar command[2];
// send software reset command
command[0] = SOFTWARE_RESET;
writeToRegister(COMMAND, command, 1);
readFromRegister(COMMAND, command, 1);
}
int disableADCRecording(int bus)
{
int oldParams = readFromRegister(READ_ADDR_OFFSET_ADC_SETTINGS);
int clearMask = 0xFFFFFFFF ^ (0x1 << bus);
int clearedOldParams = oldParams & clearMask;
writeToRegister(WRITE_ADDR_OFFSET_ADC_SETTINGS, clearedOldParams);
return 0;
}
int setADCGain(int gain)
{
int oldParams = readFromRegister(READ_ADDR_OFFSET_ADC_SETTINGS);
int clearedOldParams = oldParams & 0xFFFFFF0F;
int newParams = clearedOldParams | ((gain & 0xF) << 4);
writeToRegister(WRITE_ADDR_OFFSET_ADC_SETTINGS, newParams);
return 0;
}
void startForceMeas(){
uchar command[2];
// Send ALS_FORCE Command (Need to be at standby-mode)
command[0] = ALS_FORCE;
writeToRegister(COMMAND, command,1);
readFromRegister(COMMAND, command, 1);
}
int setCCParams(int bus, int startParam, int endParam)
{
int oldParams = readFromRegister(READ_ADDR_OFFSET_CC_PARAMS);
int clearMask = 0xFFFFFFFF ^ (0xFF << (bus * 8));
int clearedOldParams = oldParams & clearMask;
int newParams = clearedOldParams | ((startParam & 0xF) << ((bus*8)+4)) | ((endParam & 0xF) << (bus*8));
xil_printf("Setting CC Params: 0x%08X\n", newParams);
writeToRegister(WRITE_ADDR_OFFSET_CC_PARAMS, newParams);
return 0;
}
int sendADCCommand(int chip, int rnw, int command)
{
int adcCommand = ((chip & 0x1) << 17) | ((rnw & 0x1) << 16) | (command & 0xFFFF);
xil_printf("Sending ADC Command: 0x%08X\n", adcCommand);
writeToRegister(WRITE_ADDR_OFFSET_ADC_CMD, adcCommand);
if (rnw) {
return readFromRegister(READ_ADDR_OFFSET_ADC_RESP);
} else {
return 0;
}
}
void uvPre(){
uchar command[2];
I2C_rst();
I2C_initial();
DelayMS(100); // wait from init to standby
// prepare UV Meter/Send hardware key
command[0] = 0x17;
writeToRegister(HW_KEY, command, 1);
readFromRegister(HW_KEY, command, 1);
}
int MFRC522::requestTag(byte mode, byte *data) {
int status, len;
writeToRegister(BitFramingReg, 0x07); // TxLastBists = BitFramingReg[2..0]
data[0] = mode;
status = commandTag(MFRC522_TRANSCEIVE, data, 1, data, &len);
if ((status != MI_OK) || (len != 0x10)) {
status = MI_ERR;
}
return status;
}
void MCP23018::setBitInRegister(const uint8_t address_bit[], bool bitState)
{
uint8_t temp;
uint8_t address = address_bit[0];
uint8_t bit = address_bit[1];
// Use bitState to decide which masking to use (to 1 or to 0)
if(bitState)
temp = readFromRegister(address) | (1 << bit);
else
temp = readFromRegister(address) & ~(1 << bit);
writeToRegister(address, temp);
}
void MCP23018::setBitGroupInRegister(const uint8_t address, const uint8_t data, const uint8_t mask)
{
#ifdef DEBUG
Serial.print("()setBitGroupInRegister(");
Serial.print(address,HEX);
Serial.print(",");
Serial.print(data,HEX);
Serial.print(",");
Serial.print(mask,HEX);
Serial.println(")");
#endif
uint8_t temp = readFromRegister(address) & ( mask ^ 0xff) | ( data & mask );
writeToRegister(address, temp);
}
void MFRC522::calculateCRC(byte *data, int len, byte *result) {
int i;
byte n;
clearBitMask(DivIrqReg, 0x04); // CRCIrq = 0
setBitMask(FIFOLevelReg, 0x80); // Clear the FIFO pointer
//Writing data to the FIFO.
for (i = 0; i < len; i++) {
writeToRegister(FIFODataReg, data[i]);
}
writeToRegister(CommandReg, MFRC522_CALCCRC);
// Wait for the CRC calculation to complete.
i = 0xFF;
do {
n = readFromRegister(DivIrqReg);
i--;
} while ((i != 0) && !(n & 0x04)); //CRCIrq = 1
// Read the result from the CRC calculation.
result[0] = readFromRegister(CRCResultRegL);
result[1] = readFromRegister(CRCResultRegM);
}
void MFRC522::begin() {
digitalWrite(_sad, HIGH);
reset();
//Timer: TPrescaler*TreloadVal/6.78MHz = 24ms
writeToRegister(TModeReg, 0x8D); // Tauto=1; f(Timer) = 6.78MHz/TPreScaler
writeToRegister(TPrescalerReg, 0x3E); // TModeReg[3..0] + TPrescalerReg
writeToRegister(TReloadRegL, 30);
writeToRegister(TReloadRegH, 0);
writeToRegister(TxAutoReg, 0x40); // 100%ASK
writeToRegister(ModeReg, 0x3D); // CRC initial value 0x6363
setBitMask(TxControlReg, 0x03); // Turn antenna on.
}
int MFRC522::antiCollision(byte *serial) {
int status, i, len;
byte check = 0x00;
writeToRegister(BitFramingReg, 0x00); // TxLastBits = BitFramingReg[2..0]
serial[0] = MF1_ANTICOLL;
serial[1] = 0x20;
status = commandTag(MFRC522_TRANSCEIVE, serial, 2, serial, &len);
len = len / 8; // len is in bits, and we want each byte.
if (status == MI_OK) {
// The checksum of the tag is the ^ of all the values.
for (i = 0; i < len-1; i++) {
check ^= serial[i];
}
// The checksum should be the same as the one provided from the
// tag (serial[4]).
if (check != serial[i]) {
status = MI_ERR;
}
}
return status;
}
void MFRC522::setBitMask(byte addr, byte mask) {
byte current;
current = readFromRegister(addr);
writeToRegister(addr, current | mask);
}
void MCP23018::SetPortB(uint8_t _data)
{
writeToRegister(GPIOB,_data);
}
int MFRC522::commandTag(byte cmd, byte *data, int dlen, byte *result, int *rlen) {
int status = MI_ERR;
byte irqEn = 0x00;
byte waitIRq = 0x00;
byte lastBits, n;
int i;
switch (cmd) {
case MFRC522_AUTHENT:
irqEn = 0x12;
waitIRq = 0x10;
break;
case MFRC522_TRANSCEIVE:
irqEn = 0x77;
waitIRq = 0x30;
break;
default:
break;
}
writeToRegister(CommIEnReg, irqEn|0x80); // interrupt request
clearBitMask(CommIrqReg, 0x80); // Clear all interrupt requests bits.
setBitMask(FIFOLevelReg, 0x80); // FlushBuffer=1, FIFO initialization.
writeToRegister(CommandReg, MFRC522_IDLE); // No action, cancel the current command.
// Write to FIFO
for (i=0; i < dlen; i++) {
writeToRegister(FIFODataReg, data[i]);
}
// Execute the command.
writeToRegister(CommandReg, cmd);
if (cmd == MFRC522_TRANSCEIVE) {
setBitMask(BitFramingReg, 0x80); // StartSend=1, transmission of data starts
}
// Waiting for the command to complete so we can receive data.
i = 25; // Max wait time is 25ms.
do {
delay(1);
// CommIRqReg[7..0]
// Set1 TxIRq RxIRq IdleIRq HiAlerIRq LoAlertIRq ErrIRq TimerIRq
n = readFromRegister(CommIrqReg);
i--;
} while ((i!=0) && !(n&0x01) && !(n&waitIRq));
clearBitMask(BitFramingReg, 0x80); // StartSend=0
if (i != 0) { // Request did not time out.
if(!(readFromRegister(ErrorReg) & 0x1D)) { // BufferOvfl Collerr CRCErr ProtocolErr
status = MI_OK;
if (n & irqEn & 0x01) {
status = MI_NOTAGERR;
}
if (cmd == MFRC522_TRANSCEIVE) {
n = readFromRegister(FIFOLevelReg);
lastBits = readFromRegister(ControlReg) & 0x07;
if (lastBits) {
*rlen = (n-1)*8 + lastBits;
} else {
*rlen = n*8;
}
if (n == 0) {
n = 1;
}
if (n > MAX_LEN) {
n = MAX_LEN;
}
// Reading the recieved data from FIFO.
for (i=0; i<n; i++) {
result[i] = readFromRegister(FIFODataReg);
}
}
} else {
status = MI_ERR;
}
}
return status;
}
int resetCCSum(int bus)
{
writeToRegister(WRITE_ADDR_OFFSET_CC_RESET,(0x1 << bus));
return 0;
}
void MFRC522::reset() {
writeToRegister(CommandReg, MFRC522_SOFTRESET);
}
void MFRC522::clearBitMask(byte addr, byte mask) {
byte current;
current = readFromRegister(addr);
writeToRegister(addr, current & (~mask));
}
void issueCommand()
{
writeToRegister(WRITE_ADDR_OFFSET_ISSUE_CMD, 0x1);
}
void reset()
{
xil_printf("Reseting the Flash Controller\n");
writeToRegister(WRITE_ADDR_OFFSET_RESET, 0xA);
}
