static int erase(u32_t addr, u32_t size)
{
struct flash_context context = {
.flash_addr = addr,
.len = size,
#if defined(CONFIG_SOC_FLASH_NRF_RADIO_SYNC)
.enable_time_limit = 0 /* disable time limit */
#endif /* CONFIG_SOC_FLASH_NRF_RADIO_SYNC */
};
return erase_op(&context);
}
static int write(off_t addr, const void *data, size_t len)
{
struct flash_context context = {
.data_addr = (u32_t) data,
.flash_addr = addr,
.len = len,
#if defined(CONFIG_SOC_FLASH_NRF_RADIO_SYNC)
.enable_time_limit = 0 /* disable time limit */
#endif /* CONFIG_SOC_FLASH_NRF_RADIO_SYNC */
};
return write_op(&context);
}
/*---------------------------------------------------------------------------*/
static void
setregbank(uint8_t address)
{
/* set the bank (if needed) */
if((address & BANK_MASK) != Enc28j60Bank) {
write_op(ENC28J60_BIT_FIELD_CLR, ECON1, (ECON1_BSEL1 | ECON1_BSEL0));
write_op(ENC28J60_BIT_FIELD_SET, ECON1, (address & BANK_MASK) >> 5);
Enc28j60Bank = (address & BANK_MASK);
}
void *dev_pic32_spi_access (cpu_mips_t * cpu, struct vdevice *dev,
m_uint32_t offset, u_int op_size, u_int op_type,
m_reg_t * data, m_uint8_t * has_set_value)
{
struct pic32_spi_data *d = dev->priv_data;
unsigned newval;
if (offset >= SPI_REG_SIZE) {
*data = 0;
return NULL;
}
if (op_type == MTS_READ)
*data = 0;
switch (offset & 0x1f0) {
case PIC32_SPI1CON & 0x1f0: /* SPIx Control */
if (op_type == MTS_READ) {
*data = d->con;
} else {
d->con = write_op (d->con, *data, offset);
if (! (d->con & PIC32_SPICON_ON)) {
d->vm->clear_irq (d->vm, d->irq + IRQ_FAULT);
d->vm->clear_irq (d->vm, d->irq + IRQ_RX);
d->vm->clear_irq (d->vm, d->irq + IRQ_TX);
d->stat = PIC32_SPISTAT_SPITBE;
} else if (! (d->con & PIC32_SPICON_ENHBUF)) {
d->rfifo = 0;
d->wfifo = 0;
}
}
break;
case PIC32_SPI1STAT & 0x1f0: /* SPIx Status */
if (op_type == MTS_READ) {
*data = d->stat;
} else {
/* Only ROV bit is writable. */
newval = write_op (d->stat, *data, offset);
d->stat = (d->stat & ~PIC32_SPISTAT_SPIROV) |
(newval & PIC32_SPISTAT_SPIROV);
}
break;
case PIC32_SPI1BUF & 0x1ff: /* SPIx SPIx Buffer */
if (op_type == MTS_READ) {
*data = d->buf [d->rfifo];
if (d->con & PIC32_SPICON_ENHBUF) {
d->rfifo++;
d->rfifo &= 3;
}
if (d->stat & PIC32_SPISTAT_SPIRBF) {
d->stat &= ~PIC32_SPISTAT_SPIRBF;
//d->vm->clear_irq (d->vm, d->irq + IRQ_RX);
}
} else {
unsigned sdcard_port = d->pic32->sdcard_port;
/* Perform SD card i/o on configured SPI port. */
if ((dev->phys_addr == PIC32_SPI1CON && sdcard_port == 1) ||
(dev->phys_addr == PIC32_SPI2CON && sdcard_port == 2) ||
(dev->phys_addr == PIC32_SPI3CON && sdcard_port == 3) ||
(dev->phys_addr == PIC32_SPI4CON && sdcard_port == 4))
{
unsigned val = *data;
if (d->con & PIC32_SPICON_MODE32) {
/* 32-bit data width */
d->buf [d->wfifo] = (unsigned char) dev_sdcard_io (cpu, val >> 24) << 24;
d->buf [d->wfifo] |= (unsigned char) dev_sdcard_io (cpu, val >> 16) << 16;
d->buf [d->wfifo] |= (unsigned char) dev_sdcard_io (cpu, val >> 8) << 8;
d->buf [d->wfifo] |= (unsigned char) dev_sdcard_io (cpu, val);
} else if (d->con & PIC32_SPICON_MODE16) {
/* 16-bit data width */
d->buf [d->wfifo] = (unsigned char) dev_sdcard_io (cpu, val >> 8) << 8;
d->buf [d->wfifo] |= (unsigned char) dev_sdcard_io (cpu, val);
} else {
void *dev_pic32_rtcc_access (cpu_mips_t *cpu, struct vdevice *dev,
m_uint32_t offset, u_int op_size, u_int op_type, m_reg_t *data,
m_uint8_t *has_set_value)
{
pic32_t *pic32 = dev->priv_data;
if (offset >= RTCC_REG_SIZE) {
*data = 0;
return NULL;
}
if (op_type == MTS_READ)
*data = 0;
switch (offset & 0x1f0) {
case PIC32_RTCCON & 0x1f0: /* RTC Control */
if (op_type == MTS_READ) {
*data = pic32->rtccon;
if (cpu->vm->debug_level > 2)
printf (" read RTCCON -> %08x\n", *data);
} else {
pic32->rtccon = write_op (pic32->rtccon, *data, offset);
if (cpu->vm->debug_level > 2)
printf (" RTCCON := %08x\n", pic32->rtccon);
}
break;
case PIC32_RTCALRM & 0x1f0: /* RTC alarm control */
if (op_type == MTS_READ) {
*data = 0;
} else {
//pic32->rtcalrm = write_op (pic32->rtcalrm, *data, offset);
}
break;
case PIC32_RTCTIME & 0x1f0: /* RTC time value */
if (op_type == MTS_READ) {
*data = 0;
} else {
//pic32->rtctime = write_op (pic32->rtctime, *data, offset);
}
break;
case PIC32_RTCDATE & 0x1f0: /* RTC date value */
if (op_type == MTS_READ) {
*data = 0;
} else {
//pic32->rtcdate = write_op (pic32->rtcdate, *data, offset);
}
break;
case PIC32_ALRMTIME & 0x1f0: /* Alarm time value */
if (op_type == MTS_READ) {
*data = 0;
} else {
//pic32->alrmtime = write_op (pic32->alrmtime, *data, offset);
}
break;
case PIC32_ALRMDATE & 0x1f0: /* Alarm date value */
if (op_type == MTS_READ) {
*data = 0;
} else {
//pic32->alrmdate = write_op (pic32->alrmdate, *data, offset);
}
break;
default:
ASSERT (0, "unknown rtcc offset %x\n", offset);
}
*has_set_value = TRUE;
return NULL;
}
int main(int argc, char **argv)
{
int err;
struct capfs_upcall up;
struct capfs_downcall down;
struct capfs_dirent *dent = NULL;
char *link_name = NULL;
int opt = 0;
int capfsd_log_level = CRITICAL_MSG | WARNING_MSG;
char options[256];
struct cas_options cas_options = {
doInstrumentation:0,
use_sockets:0,
};
#ifdef DEBUG
capfsd_log_level |= INFO_MSG;
capfsd_log_level |= DEBUG_MSG;
#endif
set_log_level(capfsd_log_level);
/* capfsd must register a callback with the meta-data server at the time of mount */
check_for_registration = 1;
while((opt = getopt(argc, argv, "dhsn:p:")) != EOF) {
switch(opt){
case 's':
cas_options.use_sockets = 1;
break;
case 'd':
is_daemon = 0;
break;
case 'p':
err = sscanf(optarg, "%x", &capfs_debug);
if(err != 1){
usage();
exiterror("bad arguments");
exit(1);
}
break;
case 'n':
num_threads = atoi(optarg);
break;
case 'h':
usage();
exit(0);
case '?':
default:
usage();
exiterror("bad arguments");
exit(1);
}
}
if (getuid() != 0 && geteuid() != 0) {
exiterror("must be run as root");
exit(1);
}
if (setup_capfsdev() < 0) {
exiterror("setup_capfsdev() failed");
exit(1);
}
if ((dev_fd = open_capfsdev()) < 0) {
exiterror("open_capfsdev() failed");
exit(1);
}
startup(argc, argv);
/* Initialize the plugin interface */
capfsd_plugin_init();
capfs_comm_init();
/* allocate a 64K, page-aligned buffer for small operations */
capfs_opt_io_size = ROUND_UP(CAPFS_OPT_IO_SIZE);
if ((orig_iobuf = (char *) valloc(capfs_opt_io_size)) == NULL) {
exiterror("calloc failed");
capfsd_plugin_cleanup();
exit(1);
}
memset(orig_iobuf, 0, capfs_opt_io_size);
capfs_dent_size = ROUND_UP((FETCH_DENTRY_COUNT * sizeof(struct capfs_dirent)));
/* allocate a suitably large dent buffer for getdents speed up */
if ((dent = (struct capfs_dirent *) valloc(capfs_dent_size)) == NULL) {
exiterror("calloc failed");
capfsd_plugin_cleanup();
exit(1);
}
memset(dent, 0, capfs_dent_size);
/* maximum size of a link target cannot be > 4096 */
capfs_link_size = ROUND_UP(4096);
link_name = (char *) valloc(capfs_link_size);
if(!link_name) {
exiterror("calloc failed");
capfsd_plugin_cleanup();
exit(1);
}
memset(link_name, 0, capfs_link_size);
fprintf(stderr, "------------ Starting client daemon servicing VFS requests using a thread pool [%d threads] ----------\n",
num_threads);
/*
* Start up the local RPC service on both TCP/UDP
* for callbacks.
*/
pmap_unset(CAPFS_CAPFSD, clientv1);
if (setup_service(CAPFS_CAPFSD /* program number */,
clientv1 /* version */,
-1 /* both tcp/udp */,
-1 /* any available port */,
CAPFS_DISPATCH_FN(clientv1) /* dispatch routine */,
&info) < 0) {
exiterror("Could not setup local RPC service!\n");
capfsd_plugin_cleanup();
exit(1);
}
/*
* Initialize the hash cache.
* Note that we are using default values of cache sizes,
* and this should probably be an exposed knob to the user.
* CMGR_BSIZE is == CAPFS_MAXHASHLENGTH for SHA1-hash. So we dont need to set
* that. We use environment variables to communicate the parameters
* to the caches.
*/
snprintf(options, 256, "%d", CAPFS_CHUNK_SIZE);
setenv("CMGR_CHUNK_SIZE", options, 1);
snprintf(options, 256, "%d", CAPFS_HCACHE_COUNT);
setenv("CMGR_BCOUNT", options, 1);
init_hashes();
#if 0
/*
* Initialize the client-side data cache.
* Note that we are not using this layer
* right now. It is getting fairly complicated already.
*/
snprintf(options, 256, "%d", CAPFS_DCACHE_BSIZE);
setenv("CMGR_BSIZE", options, 1);
snprintf(options, 256, "%d", CAPFS_DCACHE_COUNT);
setenv("CMGR_BCOUNT", options, 1);
#endif
/*
* Initialize the client-side data server communication
* stuff.
*/
clnt_init(&cas_options, num_threads, CAPFS_CHUNK_SIZE);
/* loop forever, doing:
* - read from device
* - service request
* - write back response
*/
for (;;) {
struct timeval begin, end;
err = read_capfsdev(dev_fd, &up, 30);
if (err < 0) {
/* cleanup the hash cache */
cleanup_hashes();
/* Cleanup the RPC service */
cleanup_service(&info);
capfs_comm_shutdown();
close_capfsdev(dev_fd);
/* cleanup the plugins */
capfsd_plugin_cleanup();
/* cleanup the client-side stuff */
clnt_finalize();
exiterror("read failed\n");
exit(1);
}
if (err == 0) {
/* timed out */
capfs_comm_idle();
continue;
}
gettimeofday(&begin, NULL);
/* the do_capfs_op() call does this already; can probably remove */
init_downcall(&down, &up);
err = 0;
switch (up.type) {
/* all the easy operations */
case GETMETA_OP:
case SETMETA_OP:
case LOOKUP_OP:
case CREATE_OP:
case REMOVE_OP:
case RENAME_OP:
case SYMLINK_OP:
case MKDIR_OP:
case RMDIR_OP:
case STATFS_OP:
case HINT_OP:
case FSYNC_OP:
case LINK_OP:
{
PDEBUG(D_UPCALL, "read upcall; type = %d, name = %s\n", up.type,
up.v1.fhname);
err = do_capfs_op(&up, &down);
if (err < 0) {
PDEBUG(D_LIB, "do_capfs_op failed for type %d\n", up.type);
}
break;
/* the more interesting ones */
}
case GETDENTS_OP:
/* need to pass location and size of buffer to do_capfs_op() */
up.xfer.ptr = dent;
up.xfer.size = capfs_dent_size;
err = do_capfs_op(&up, &down);
if (err < 0) {
PDEBUG(D_LIB, "do_capfs_op failed for getdents\n");
}
break;
case READLINK_OP:
/* need to pass location and size of buffer to hold the target name */
up.xfer.ptr = link_name;
up.xfer.size = capfs_link_size;
err = do_capfs_op(&up, &down);
if(err < 0) {
PDEBUG(D_LIB, "do_capfs_op failed for readlink\n");
}
break;
case READ_OP:
err = read_op(&up, &down);
if (err < 0) {
PDEBUG(D_LIB, "read_op failed\n");
}
break;
case WRITE_OP:
err = write_op(&up, &down);
if (err < 0) {
PDEBUG(D_LIB, "do_capfs_op failed\n");
}
break;
/* things that aren't done yet */
default:
err = -ENOSYS;
break;
}
gettimeofday(&end, NULL);
/* calculate the total time spent servicing this call */
if (end.tv_usec < begin.tv_usec) {
end.tv_usec += 1000000;
end.tv_sec--;
}
end.tv_sec -= begin.tv_sec;
end.tv_usec -= begin.tv_usec;
down.total_time = (end.tv_sec * 1000000 + end.tv_usec);
down.error = err;
switch(up.type)
{
case HINT_OP:
/* this is a one shot hint, we don't want a response in case of HINT_OPEN/HINT_CLOSE */
if (up.u.hint.hint == HINT_CLOSE || up.u.hint.hint == HINT_OPEN) {
err = 0;
break;
}
/* fall through */
default:
/* the default behavior is to write a response to the device */
err = write_capfsdev(dev_fd, &down, -1);
if (err < 0) {
/* cleanup the hash cache */
cleanup_hashes();
/* Cleanup the RPC service */
cleanup_service(&info);
capfs_comm_shutdown();
close_capfsdev(dev_fd);
/* Cleanup the plugins */
capfsd_plugin_cleanup();
/* cleanup the client-side stuff */
clnt_finalize();
exiterror("write failed");
exit(1);
}
break;
}
/* If we used a big I/O buffer, free it after we have successfully
* returned the downcall.
*/
if (big_iobuf != NULL) {
free(big_iobuf);
big_iobuf = NULL;
}
}
/* Not reached */
/* cleanup the hash cache */
cleanup_hashes();
/* Cleanup the RPC service */
cleanup_service(&info);
capfs_comm_shutdown();
close_capfsdev(dev_fd);
/* cleanup the plugins */
capfsd_plugin_cleanup();
/* cleanup the client-side stuff */
clnt_finalize();
exit(1);
}
void *dev_pic32_adc_access (cpu_mips_t *cpu, struct vdevice *dev,
m_uint32_t offset, u_int op_size, u_int op_type, m_reg_t *data,
m_uint8_t *has_set_value)
{
pic32_t *pic32 = dev->priv_data;
if (offset >= ADC_REG_SIZE) {
*data = 0;
return NULL;
}
if (op_type == MTS_READ)
*data = 0;
switch (offset & 0xff0) {
case PIC32_AD1CON1 & 0xff0: /* Control register 1 */
if (op_type == MTS_READ) {
*data = pic32->ad1con1;
} else {
pic32->ad1con1 = write_op (pic32->ad1con1, *data, offset);
}
break;
case PIC32_AD1CON2 & 0xff0: /* Control register 2 */
if (op_type == MTS_READ) {
*data = pic32->ad1con2;
} else {
pic32->ad1con2 = write_op (pic32->ad1con2, *data, offset);
}
break;
case PIC32_AD1CON3 & 0xff0: /* Control register 3 */
if (op_type == MTS_READ) {
*data = pic32->ad1con3;
} else {
pic32->ad1con3 = write_op (pic32->ad1con3, *data, offset);
}
break;
case PIC32_AD1CHS & 0xff0: /* Channel select */
if (op_type == MTS_READ) {
*data = pic32->ad1chs;
} else {
pic32->ad1chs = write_op (pic32->ad1chs, *data, offset);
}
break;
case PIC32_AD1CSSL & 0xff0: /* Input scan selection */
if (op_type == MTS_READ) {
*data = pic32->ad1cssl;
} else {
pic32->ad1cssl = write_op (pic32->ad1cssl, *data, offset);
}
break;
case PIC32_AD1PCFG & 0xff0: /* Port configuration */
if (op_type == MTS_READ) {
*data = pic32->ad1pcfg;
} else {
pic32->ad1pcfg = write_op (pic32->ad1pcfg, *data, offset);
}
break;
case PIC32_ADC1BUF0 & 0xff0: case PIC32_ADC1BUF1 & 0xff0:
case PIC32_ADC1BUF2 & 0xff0: case PIC32_ADC1BUF3 & 0xff0:
case PIC32_ADC1BUF4 & 0xff0: case PIC32_ADC1BUF5 & 0xff0:
case PIC32_ADC1BUF6 & 0xff0: case PIC32_ADC1BUF7 & 0xff0:
case PIC32_ADC1BUF8 & 0xff0: case PIC32_ADC1BUF9 & 0xff0:
case PIC32_ADC1BUFA & 0xff0: case PIC32_ADC1BUFB & 0xff0:
case PIC32_ADC1BUFC & 0xff0: case PIC32_ADC1BUFD & 0xff0:
case PIC32_ADC1BUFE & 0xff0: case PIC32_ADC1BUFF & 0xff0:
if (op_type == MTS_READ) { /* Result words */
*data = 0; // TODO
}
break;
default:
ASSERT (0, "unknown adc offset %x\n", offset);
}
*has_set_value = TRUE;
return NULL;
}
