void __init xics_init(void) { int rc = -1; /* Fist locate ICP */ if (firmware_has_feature(FW_FEATURE_LPAR)) rc = icp_hv_init(); if (rc < 0) rc = icp_native_init(); if (rc < 0) { pr_warning("XICS: Cannot find a Presentation Controller !\n"); return; } /* Copy get_irq callback over to ppc_md */ ppc_md.get_irq = icp_ops->get_irq; /* Patch up IPI chip EOI */ xics_ipi_chip.irq_eoi = icp_ops->eoi; /* Now locate ICS */ rc = ics_rtas_init(); if (rc < 0) rc = ics_opal_init(); if (rc < 0) pr_warning("XICS: Cannot find a Source Controller !\n"); /* Initialize common bits */ xics_get_server_size(); xics_update_irq_servers(); xics_init_host(); xics_setup_cpu(); }
static void __devinit smp_a2_setup_cpu(int cpu) { doorbell_setup_this_cpu(); if (cpu != boot_cpuid) xics_setup_cpu(); }
void __init xics_init(void) { int rc = -1; if (firmware_has_feature(FW_FEATURE_LPAR)) rc = icp_hv_init(); if (rc < 0) rc = icp_native_init(); if (rc < 0) { pr_warning("XICS: Cannot find a Presentation Controller !\n"); return; } ppc_md.get_irq = icp_ops->get_irq; xics_ipi_chip.irq_eoi = icp_ops->eoi; rc = ics_rtas_init(); if (rc < 0) rc = ics_opal_init(); if (rc < 0) pr_warning("XICS: Cannot find a Source Controller !\n"); xics_get_server_size(); xics_update_irq_servers(); xics_init_host(); xics_setup_cpu(); }
static void smp_chrp_setup_cpu(int cpu_nr) { static atomic_t ready = ATOMIC_INIT(1); static volatile int frozen = 0; if (systemcfg->platform == PLATFORM_PSERIES_LPAR) { /* timebases already synced under the hypervisor. */ paca[cpu_nr].next_jiffy_update_tb = tb_last_stamp = get_tb(); if (cpu_nr == 0) { systemcfg->tb_orig_stamp = tb_last_stamp; /* Should update naca->stamp_xsec. * For now we leave it which means the time can be some * number of msecs off until someone does a settimeofday() */ } smp_tb_synchronized = 1; } else { if (cpu_nr == 0) { /* wait for all the others */ while (atomic_read(&ready) < smp_num_cpus) barrier(); atomic_set(&ready, 1); /* freeze the timebase */ rtas_call(rtas_token("freeze-time-base"), 0, 1, NULL); mb(); frozen = 1; set_tb(0, 0); paca[0].next_jiffy_update_tb = 0; smp_space_timers(smp_num_cpus); while (atomic_read(&ready) < smp_num_cpus) barrier(); /* thaw the timebase again */ rtas_call(rtas_token("thaw-time-base"), 0, 1, NULL); mb(); frozen = 0; tb_last_stamp = get_tb(); systemcfg->tb_orig_stamp = tb_last_stamp; smp_tb_synchronized = 1; } else { atomic_inc(&ready); while (!frozen) barrier(); set_tb(0, 0); mb(); atomic_inc(&ready); while (frozen) barrier(); } } if (OpenPIC_Addr) { do_openpic_setup_cpu(); } else { if (cpu_nr > 0) xics_setup_cpu(); } }
static void pnv_smp_setup_cpu(int cpu) { if (cpu != boot_cpuid) xics_setup_cpu(); #ifdef CONFIG_PPC_DOORBELL if (cpu_has_feature(CPU_FTR_DBELL)) doorbell_setup_this_cpu(); #endif }
static void __devinit smp_xics_setup_cpu(int cpu) { if (cpu != boot_cpuid) xics_setup_cpu(); if (firmware_has_feature(FW_FEATURE_SPLPAR)) vpa_init(cpu); cpu_clear(cpu, of_spin_map); }
static void __devinit smp_xics_setup_cpu(int cpu) { if (cpu != boot_cpuid) xics_setup_cpu(); if (firmware_has_feature(FW_FEATURE_SPLPAR)) vpa_init(cpu); cpumask_clear_cpu(cpu, of_spin_mask); set_cpu_current_state(cpu, CPU_STATE_ONLINE); set_default_offline_state(cpu); }
static void __devinit smp_xics_setup_cpu(int cpu) { if (cpu != boot_cpuid) xics_setup_cpu(); if (firmware_has_feature(FW_FEATURE_SPLPAR)) vpa_init(cpu); cpumask_clear_cpu(cpu, of_spin_mask); #ifdef CONFIG_HOTPLUG_CPU set_cpu_current_state(cpu, CPU_STATE_ONLINE); set_default_offline_state(cpu); #endif pseries_notify_cpuidle_add_cpu(cpu); }
static void smp_xics_setup_cpu(int cpu) { if (cpu != boot_cpuid) xics_setup_cpu(); if (cpu_has_feature(CPU_FTR_DBELL)) doorbell_setup_this_cpu(); if (firmware_has_feature(FW_FEATURE_SPLPAR)) vpa_init(cpu); cpumask_clear_cpu(cpu, of_spin_mask); #ifdef CONFIG_HOTPLUG_CPU set_cpu_current_state(cpu, CPU_STATE_ONLINE); set_default_offline_state(cpu); #endif }
static void smp_setup_cpu(int cpu) { if (xive_enabled()) xive_smp_setup_cpu(); else if (cpu != boot_cpuid) xics_setup_cpu(); if (firmware_has_feature(FW_FEATURE_SPLPAR)) vpa_init(cpu); cpumask_clear_cpu(cpu, of_spin_mask); #ifdef CONFIG_HOTPLUG_CPU set_cpu_current_state(cpu, CPU_STATE_ONLINE); set_default_offline_state(cpu); #endif }
static void __devinit smp_xics_setup_cpu(int cpu) { if (cpu != boot_cpuid) xics_setup_cpu(); }
static void __cpuinit pnv_smp_setup_cpu(int cpu) { if (cpu != boot_cpuid) xics_setup_cpu(); }
static void __chrp smp_xics_setup_cpu(int cpu_nr) { if (cpu_nr > 0) xics_setup_cpu(); }