Example #1
0
/* initialize a plane manager: num_planes, format, max_width */
static int
xilinx_drm_plane_init_manager(struct xilinx_drm_plane_manager *manager)
{
	unsigned int format;
	uint32_t drm_format;
	int ret = 0;

	if (manager->osd) {
		manager->num_planes = xilinx_osd_get_num_layers(manager->osd);
		manager->max_width = xilinx_osd_get_max_width(manager->osd);

		format = xilinx_osd_get_format(manager->osd);
		ret = xilinx_drm_format_by_code(format, &drm_format);
		if (drm_format != manager->format)
			ret = -EINVAL;
	} else if (manager->dp_sub) {
		manager->num_planes = XILINX_DRM_DP_SUB_NUM_LAYERS;
		manager->max_width = XILINX_DRM_DP_SUB_MAX_WIDTH;
	} else {
		/* without osd, only one plane is supported */
		manager->num_planes = 1;
		manager->max_width = 4096;
	}

	return ret;
}
Example #2
0
/* initialize a plane manager: num_planes, format, max_width */
static int
xilinx_drm_plane_init_manager(struct xilinx_drm_plane_manager *manager)
{
	unsigned int format;
	int ret = 0;

	if (manager->osd) {
		manager->num_planes = xilinx_osd_get_num_layers(manager->osd);
		manager->max_width = xilinx_osd_get_max_width(manager->osd);

		format = xilinx_osd_get_format(manager->osd);
		ret = xilinx_drm_format_by_code(format, &manager->format);
	} else {
		/* without osd, only one plane is supported */
		manager->num_planes = 1;
		/* YUV422 based on the current pipeline design without osd */
		manager->format = DRM_FORMAT_YUV422;
		manager->max_width = 4096;
	}

	return ret;
}