static int xilly_drv_probe(struct platform_device *op) { struct device *dev = &op->dev; struct xilly_endpoint *endpoint; int rc; int irq; struct resource res; struct xilly_endpoint_hardware *ephw = &of_hw; if (of_property_read_bool(dev->of_node, "dma-coherent")) ephw = &of_hw_coherent; endpoint = xillybus_init_endpoint(NULL, dev, ephw); if (!endpoint) return -ENOMEM; dev_set_drvdata(dev, endpoint); rc = of_address_to_resource(dev->of_node, 0, &res); endpoint->registers = devm_ioremap_resource(dev, &res); if (IS_ERR(endpoint->registers)) return PTR_ERR(endpoint->registers); irq = irq_of_parse_and_map(dev->of_node, 0); rc = devm_request_irq(dev, irq, xillybus_isr, 0, xillyname, endpoint); if (rc) { dev_err(endpoint->dev, "Failed to register IRQ handler. Aborting.\n"); return -ENODEV; } return xillybus_endpoint_discovery(endpoint); }
static int xilly_probe(struct pci_dev *pdev, const struct pci_device_id *ent) { struct xilly_endpoint *endpoint; int rc = 0; endpoint = xillybus_init_endpoint(pdev, &pdev->dev, &pci_hw); if (!endpoint) return -ENOMEM; pci_set_drvdata(pdev, endpoint); rc = pcim_enable_device(pdev); if (rc) { dev_err(endpoint->dev, "pcim_enable_device() failed. Aborting.\n"); return rc; } /* L0s has caused packet drops. No power saving, thank you. */ pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S); if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { dev_err(endpoint->dev, "Incorrect BAR configuration. Aborting.\n"); return -ENODEV; } rc = pcim_iomap_regions(pdev, 0x01, xillyname); if (rc) { dev_err(endpoint->dev, "pcim_iomap_regions() failed. Aborting.\n"); return rc; } endpoint->registers = pcim_iomap_table(pdev)[0]; pci_set_master(pdev); /* Set up a single MSI interrupt */ if (pci_enable_msi(pdev)) { dev_err(endpoint->dev, "Failed to enable MSI interrupts. Aborting.\n"); return -ENODEV; } rc = devm_request_irq(&pdev->dev, pdev->irq, xillybus_isr, 0, xillyname, endpoint); if (rc) { dev_err(endpoint->dev, "Failed to register MSI handler. Aborting.\n"); return -ENODEV; } /* * In theory, an attempt to set the DMA mask to 64 and dma_using_dac=1 * is the right thing. But some unclever PCIe drivers report it's OK * when the hardware drops those 64-bit PCIe packets. So trust * nobody and use 32 bits DMA addressing in any case. */ if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) endpoint->dma_using_dac = 0; else { dev_err(endpoint->dev, "Failed to set DMA mask. Aborting.\n"); return -ENODEV; } rc = xillybus_endpoint_discovery(endpoint); if (!rc) return 0; xillybus_do_cleanup(&endpoint->cleanup, endpoint); return rc; }
static int xilly_drv_probe(struct platform_device *op) { struct device *dev = &op->dev; struct xilly_endpoint *endpoint; int rc = 0; int irq; struct xilly_endpoint_hardware *ephw = &of_hw; if (of_property_read_bool(dev->of_node, "dma-coherent")) ephw = &of_hw_coherent; endpoint = xillybus_init_endpoint(NULL, dev, ephw); if (!endpoint) return -ENOMEM; dev_set_drvdata(dev, endpoint); rc = of_address_to_resource(dev->of_node, 0, &endpoint->res); if (rc) { dev_warn(endpoint->dev, "Failed to obtain device tree resource\n"); goto failed_request_regions; } if (!request_mem_region(endpoint->res.start, resource_size(&endpoint->res), xillyname)) { dev_err(endpoint->dev, "request_mem_region failed. Aborting.\n"); rc = -EBUSY; goto failed_request_regions; } endpoint->registers = of_iomap(dev->of_node, 0); if (!endpoint->registers) { dev_err(endpoint->dev, "Failed to map I/O memory. Aborting.\n"); rc = -EIO; goto failed_iomap0; } irq = irq_of_parse_and_map(dev->of_node, 0); rc = request_irq(irq, xillybus_isr, 0, xillyname, endpoint); if (rc) { dev_err(endpoint->dev, "Failed to register IRQ handler. Aborting.\n"); rc = -ENODEV; goto failed_register_irq; } rc = xillybus_endpoint_discovery(endpoint); if (!rc) return 0; free_irq(irq, endpoint); failed_register_irq: iounmap(endpoint->registers); failed_iomap0: release_mem_region(endpoint->res.start, resource_size(&endpoint->res)); failed_request_regions: xillybus_do_cleanup(&endpoint->cleanup, endpoint); kfree(endpoint); return rc; }
static int xilly_probe(struct pci_dev *pdev, const struct pci_device_id *ent) { struct xilly_endpoint *endpoint; int rc; endpoint = xillybus_init_endpoint(pdev, &pdev->dev, &pci_hw); if (!endpoint) return -ENOMEM; pci_set_drvdata(pdev, endpoint); rc = pcim_enable_device(pdev); if (rc) { dev_err(endpoint->dev, "pcim_enable_device() failed. Aborting.\n"); return rc; } /* L0s has caused packet drops. No power saving, thank you. */ pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S); if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { dev_err(endpoint->dev, "Incorrect BAR configuration. Aborting.\n"); return -ENODEV; } rc = pcim_iomap_regions(pdev, 0x01, xillyname); if (rc) { dev_err(endpoint->dev, "pcim_iomap_regions() failed. Aborting.\n"); return rc; } endpoint->registers = pcim_iomap_table(pdev)[0]; pci_set_master(pdev); /* Set up a single MSI interrupt */ if (pci_enable_msi(pdev)) { dev_err(endpoint->dev, "Failed to enable MSI interrupts. Aborting.\n"); return -ENODEV; } rc = devm_request_irq(&pdev->dev, pdev->irq, xillybus_isr, 0, xillyname, endpoint); if (rc) { dev_err(endpoint->dev, "Failed to register MSI handler. Aborting.\n"); return -ENODEV; } /* * Some (old and buggy?) hardware drops 64-bit addressed PCIe packets, * even when the PCIe driver claims that a 64-bit mask is OK. On the * other hand, on some architectures, 64-bit addressing is mandatory. * So go for the 64-bit mask only when failing is the other option. */ if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) { endpoint->dma_using_dac = 0; } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { endpoint->dma_using_dac = 1; } else { dev_err(endpoint->dev, "Failed to set DMA mask. Aborting.\n"); return -ENODEV; } return xillybus_endpoint_discovery(endpoint); }