VOID MemTDramInitHw ( IN OUT MEM_TECH_BLOCK *TechPtr ) { UINT8 Dct; MEM_NB_BLOCK *NBPtr; NBPtr = TechPtr->NBPtr; NBPtr->BrdcstSet (NBPtr, BFInitDram, 1); // Phy fence training AGESA_TESTPOINT (TpProcMemPhyFenceTraining, &(NBPtr->MemPtr->StdHeader)); for (Dct = 0; Dct < NBPtr->DctCount; Dct++) { NBPtr->SwitchDCT (NBPtr, Dct); if (NBPtr->DCTPtr->Timings.DctMemSize != 0) { IDS_HDT_CONSOLE (MEM_STATUS, "\tDct %d\n", Dct); NBPtr->PhyFenceTraining (NBPtr); } } }