static bool CC_Lanai32_VarArg(unsigned ValNo, MVT ValVT, MVT LocVT,
CCValAssign::LocInfo LocInfo,
ISD::ArgFlagsTy ArgFlags, CCState &State) {
// Handle fixed arguments with default CC.
// Note: Both the default and fast CC handle VarArg the same and hence the
// calling convention of the function is not considered here.
if (ValNo < NumFixedArgs) {
return CC_Lanai32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State);
}
// Promote i8/i16 args to i32
if (LocVT == MVT::i8 || LocVT == MVT::i16) {
LocVT = MVT::i32;
if (ArgFlags.isSExt())
LocInfo = CCValAssign::SExt;
else if (ArgFlags.isZExt())
LocInfo = CCValAssign::ZExt;
else
LocInfo = CCValAssign::AExt;
}
// VarArgs get passed on stack
unsigned Offset = State.AllocateStack(4, 4);
State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
return false;
}
std::string getFlagsString(const ISD::ArgFlagsTy &Flags) {
if (Flags.isZExt()) {
return "ZExt";
} else if (Flags.isSExt()) {
return "SExt";
} else if (Flags.isInReg()) {
return "Reg";
} else if (Flags.isSRet()) {
return "SRet";
} else if (Flags.isByVal()) {
return "ByVal";
} else if (Flags.isNest()) {
return "Nest";
} else {
return "No Flags";
}
}
static void AnalyzeArguments(CCState &State,
SmallVectorImpl<CCValAssign> &ArgLocs,
const SmallVectorImpl<ArgT> &Args) {
static const MCPhysReg RegList[] = {
MSP430::R15, MSP430::R14, MSP430::R13, MSP430::R12
};
static const unsigned NbRegs = array_lengthof(RegList);
if (State.isVarArg()) {
AnalyzeVarArgs(State, Args);
return;
}
SmallVector<unsigned, 4> ArgsParts;
ParseFunctionArgs(Args, ArgsParts);
unsigned RegsLeft = NbRegs;
bool UseStack = false;
unsigned ValNo = 0;
for (unsigned i = 0, e = ArgsParts.size(); i != e; i++) {
MVT ArgVT = Args[ValNo].VT;
ISD::ArgFlagsTy ArgFlags = Args[ValNo].Flags;
MVT LocVT = ArgVT;
CCValAssign::LocInfo LocInfo = CCValAssign::Full;
// Promote i8 to i16
if (LocVT == MVT::i8) {
LocVT = MVT::i16;
if (ArgFlags.isSExt())
LocInfo = CCValAssign::SExt;
else if (ArgFlags.isZExt())
LocInfo = CCValAssign::ZExt;
else
LocInfo = CCValAssign::AExt;
}
// Handle byval arguments
if (ArgFlags.isByVal()) {
State.HandleByVal(ValNo++, ArgVT, LocVT, LocInfo, 2, 2, ArgFlags);
continue;
}
unsigned Parts = ArgsParts[i];
if (!UseStack && Parts <= RegsLeft) {
unsigned FirstVal = ValNo;
for (unsigned j = 0; j < Parts; j++) {
unsigned Reg = State.AllocateReg(RegList);
State.addLoc(CCValAssign::getReg(ValNo++, ArgVT, Reg, LocVT, LocInfo));
RegsLeft--;
}
// Reverse the order of the pieces to agree with the "big endian" format
// required in the calling convention ABI.
SmallVectorImpl<CCValAssign>::iterator B = ArgLocs.begin() + FirstVal;
std::reverse(B, B + Parts);
} else {
UseStack = true;
for (unsigned j = 0; j < Parts; j++)
CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State);
}
}
}
static bool CC_MipsO32(unsigned ValNo, EVT ValVT,
EVT LocVT, CCValAssign::LocInfo LocInfo,
ISD::ArgFlagsTy ArgFlags, CCState &State) {
static const unsigned IntRegsSize=4, FloatRegsSize=2;
static const unsigned IntRegs[] = {
Mips::A0, Mips::A1, Mips::A2, Mips::A3
};
static const unsigned F32Regs[] = {
Mips::F12, Mips::F14
};
static const unsigned F64Regs[] = {
Mips::D6, Mips::D7
};
unsigned Reg=0;
unsigned UnallocIntReg = State.getFirstUnallocated(IntRegs, IntRegsSize);
bool IntRegUsed = (IntRegs[UnallocIntReg] != (unsigned (Mips::A0)));
// Promote i8 and i16
if (LocVT == MVT::i8 || LocVT == MVT::i16) {
LocVT = MVT::i32;
if (ArgFlags.isSExt())
LocInfo = CCValAssign::SExt;
else if (ArgFlags.isZExt())
LocInfo = CCValAssign::ZExt;
else
LocInfo = CCValAssign::AExt;
}
if (ValVT == MVT::i32 || (ValVT == MVT::f32 && IntRegUsed)) {
Reg = State.AllocateReg(IntRegs, IntRegsSize);
IntRegUsed = true;
LocVT = MVT::i32;
}
if (ValVT.isFloatingPoint() && !IntRegUsed) {
if (ValVT == MVT::f32)
Reg = State.AllocateReg(F32Regs, FloatRegsSize);
else
Reg = State.AllocateReg(F64Regs, FloatRegsSize);
}
if (ValVT == MVT::f64 && IntRegUsed) {
if (UnallocIntReg != IntRegsSize) {
// If we hit register A3 as the first not allocated, we must
// mark it as allocated (shadow) and use the stack instead.
if (IntRegs[UnallocIntReg] != (unsigned (Mips::A3)))
Reg = Mips::A2;
for (;UnallocIntReg < IntRegsSize; ++UnallocIntReg)
State.AllocateReg(UnallocIntReg);
}
LocVT = MVT::i32;
}
if (!Reg) {
unsigned SizeInBytes = ValVT.getSizeInBits() >> 3;
unsigned Offset = State.AllocateStack(SizeInBytes, SizeInBytes);
State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
} else