Type Type::get_array_to_with_region(Nodecl::NodeclBase lower_bound, Nodecl::NodeclBase upper_bound, Nodecl::NodeclBase region_lower_bound, Nodecl::NodeclBase region_upper_bound, Scope sc) { type_t* result_type = this->_type_info; const decl_context_t* decl_context = sc.get_decl_context(); // Make the range of the region Nodecl::NodeclBase range = Nodecl::Range::make( region_lower_bound, region_upper_bound, const_value_to_nodecl(const_value_get_one(4, 1)), region_lower_bound.get_type(), region_lower_bound.get_locus()); type_t* array_to = get_array_type_bounds_with_regions( result_type, lower_bound.get_internal_nodecl(), upper_bound.get_internal_nodecl(), decl_context, range.get_internal_nodecl(), decl_context); return array_to; }
Nodecl::NodeclVisitor<void>::Ret NeonVectorBackend::unhandled_node(const Nodecl::NodeclBase& n) { internal_error("NEON Backend: Unknown node %s at %s.", ast_print_node_type(n.get_kind()), locus_to_str(n.get_locus())); return Ret(); }
Nodecl::NodeclVisitor<void>::Ret VectorizerVisitorFunction::unhandled_node(const Nodecl::NodeclBase& n) { std::cerr << "Function Visitor: Unknown node " << ast_print_node_type(n.get_kind()) << " at " << n.get_locus() << std::endl; return Ret(); }
void DeviceFPGA::add_hls_pragmas( Nodecl::NodeclBase &task, TL::ObjectList<OutlineDataItem*> &data_items ) { /* * Insert hls pragmas in order to denerate input/output connections * Every parameter needs a directive: * scalar: create plain wire connections: * #pragma HLS INTERFACE ap_none port=VAR * #pragma AP resource core=AXI_SLAVE variable=VAR metadata="-bus_bundle AXIlite" * * Array; create fifo port to be handled by axi stream * #pragma HLS stream variable=VAR <-- NOT NEEDED * #pragma HLS resource core=AXI4Stream variable=VAR * #pragma HLS interface ap_fifo port=VAR * * For every task there is a control bus defined to kick the accelerator off: * * #pragma AP resource core=AXI_SLAVE variable=return metadata="-bus_bundle AXIlite" \ * port_map={{ap_start START} {ap_done DONE} {ap_idle IDLE} {ap_return RETURN}} * * All of this stuff must be inside the function body i.e. * * void foo(...) * { * pragma stuff * function body * } * */ //see what kind of ast it really is std::cerr << ast_node_type_name(task.get_kind()) << " in_list: " << task.is_in_list() << " locus: " << task.get_locus() << std::endl; //Dig into the tree and find where the function statements are ObjectList<Nodecl::NodeclBase> tchildren = task.children(); Nodecl::NodeclBase& context = tchildren.front(); ObjectList<Nodecl::NodeclBase> cchildren = context.children(); Nodecl::List list(cchildren.front().get_internal_nodecl()); Nodecl::List stlist(list.begin()->children().front().get_internal_nodecl()); Nodecl::UnknownPragma ctrl_bus = Nodecl::UnknownPragma::make( "AP resource core=AXI_SLAVE variable=return metadata=\"-bus_bundle AXIlite\" port_map={{ap_start START} {ap_done DONE} {ap_idle IDLE} {ap_return RETURN}}"); stlist.prepend(ctrl_bus); //since we are using prepend, everything is going to appar in reverse order //but this may not be a real issue // TL::ObjectList<OutlineDataItem*> data_items = outline_info.get_data_items(); for (TL::ObjectList<OutlineDataItem*>::iterator it = data_items.begin(); it != data_items.end(); it++) { std::string field_name = (*it)->get_field_name(); Nodecl::UnknownPragma pragma_node; if ((*it)->get_copies().empty()) { //set scalar argumenit pragmas pragma_node = Nodecl::UnknownPragma::make("HLS INTERFACE ap_none port=" + field_name); stlist.prepend(pragma_node); pragma_node = Nodecl::UnknownPragma::make("AP resource core=AXI_SLAVE variable=" + field_name + " metadata=\"-bus_bundle AXIlite\""); stlist.prepend(pragma_node); } else { //set array/stream pragmas pragma_node = Nodecl::UnknownPragma::make( "HLS resource core=AXI4Stream variable=" + field_name); stlist.prepend(pragma_node); pragma_node = Nodecl::UnknownPragma::make( "HLS interface ap_fifo port=" + field_name); stlist.prepend(pragma_node); } } }