/**Function*************************************************************
Synopsis []
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Wlc_NtkGetInv( Wlc_Ntk_t * pNtk, Vec_Int_t * vInv, Vec_Str_t * vSop, int fVerbose )
{
Wlc_Obj_t * pObj;
int i, k, nNum, nRange, nBits = 0;
Abc_Ntk_t * pMainNtk = NULL;
Abc_Obj_t * pMainObj, * pMainTemp;
char Buffer[5000];
// start the network
pMainNtk = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_SOP, 1 );
// duplicate the name and the spec
pMainNtk->pName = Extra_UtilStrsav(pNtk->pName);
// create primary inputs
Wlc_NtkForEachCi( pNtk, pObj, i )
{
if ( pObj->Type != WLC_OBJ_FO )
continue;
nRange = Wlc_ObjRange(pObj);
for ( k = 0; k < nRange; k++ )
{
nNum = Vec_IntEntry(vInv, nBits + k);
if ( nNum )
break;
}
if ( k == nRange )
{
nBits += nRange;
continue;
}
//printf( "%s[%d:%d] : ", Wlc_ObjName(pNtk, Wlc_ObjId(pNtk, pObj)), pObj->End, pObj->Beg );
for ( k = 0; k < nRange; k++ )
{
nNum = Vec_IntEntry( vInv, nBits + k );
if ( nNum == 0 )
continue;
//printf( " [%d] -> %d", k, nNum );
pMainObj = Abc_NtkCreatePi( pMainNtk );
sprintf( Buffer, "%s[%d]", Wlc_ObjName(pNtk, Wlc_ObjId(pNtk, pObj)), k );
Abc_ObjAssignName( pMainObj, Buffer, NULL );
}
//printf( "\n");
nBits += nRange;
}
//printf( "%d %d\n", Vec_IntSize(vInv), nBits );
assert( Vec_IntSize(vInv) == nBits );
// create node
pMainObj = Abc_NtkCreateNode( pMainNtk );
Abc_NtkForEachPi( pMainNtk, pMainTemp, i )
Abc_ObjAddFanin( pMainObj, pMainTemp );
pMainObj->pData = Abc_SopRegister( (Mem_Flex_t *)pMainNtk->pManFunc, Vec_StrArray(vSop) );
// create PO
pMainTemp = Abc_NtkCreatePo( pMainNtk );
Abc_ObjAddFanin( pMainTemp, pMainObj );
Abc_ObjAssignName( pMainTemp, "inv", NULL );
return pMainNtk;
}
/**Function*************************************************************
Synopsis [Constructs the network isomorphic to the given BDD.]
Description [Assumes that the BDD depends on the variables whose indexes
correspond to the names in the array (pNamesPi). Otherwise, returns NULL.
The resulting network comes with one node, whose functionality is
equal to the given BDD. To decompose this BDD into the network of
multiplexers use Abc_NtkBddToMuxes(). To decompose this BDD into
an And-Inverter Graph, use Abc_NtkStrash().]
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkDeriveFromBdd( void * dd0, void * bFunc, char * pNamePo, Vec_Ptr_t * vNamesPi )
{
DdManager * dd = (DdManager *)dd0;
Abc_Ntk_t * pNtk;
Vec_Ptr_t * vNamesPiFake = NULL;
Abc_Obj_t * pNode, * pNodePi, * pNodePo;
DdNode * bSupp, * bTemp;
char * pName;
int i;
// supply fake names if real names are not given
if ( pNamePo == NULL )
pNamePo = "F";
if ( vNamesPi == NULL )
{
vNamesPiFake = Abc_NodeGetFakeNames( dd->size );
vNamesPi = vNamesPiFake;
}
// make sure BDD depends on the variables whose index
// does not exceed the size of the array with PI names
bSupp = Cudd_Support( dd, (DdNode *)bFunc ); Cudd_Ref( bSupp );
for ( bTemp = bSupp; bTemp != Cudd_ReadOne(dd); bTemp = cuddT(bTemp) )
if ( (int)Cudd_NodeReadIndex(bTemp) >= Vec_PtrSize(vNamesPi) )
break;
Cudd_RecursiveDeref( dd, bSupp );
if ( bTemp != Cudd_ReadOne(dd) )
return NULL;
// start the network
pNtk = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_BDD, 1 );
pNtk->pName = Extra_UtilStrsav(pNamePo);
// make sure the new manager has enough inputs
Cudd_bddIthVar( (DdManager *)pNtk->pManFunc, Vec_PtrSize(vNamesPi) );
// add the PIs corresponding to the names
Vec_PtrForEachEntry( char *, vNamesPi, pName, i )
Abc_ObjAssignName( Abc_NtkCreatePi(pNtk), pName, NULL );
// create the node
pNode = Abc_NtkCreateNode( pNtk );
pNode->pData = (DdNode *)Cudd_bddTransfer( dd, (DdManager *)pNtk->pManFunc, (DdNode *)bFunc ); Cudd_Ref((DdNode *)pNode->pData);
Abc_NtkForEachPi( pNtk, pNodePi, i )
Abc_ObjAddFanin( pNode, pNodePi );
// create the only PO
pNodePo = Abc_NtkCreatePo( pNtk );
Abc_ObjAddFanin( pNodePo, pNode );
Abc_ObjAssignName( pNodePo, pNamePo, NULL );
// make the network minimum base
Abc_NtkMinimumBase( pNtk );
if ( vNamesPiFake )
Abc_NodeFreeNames( vNamesPiFake );
if ( !Abc_NtkCheck( pNtk ) )
fprintf( stdout, "Abc_NtkDeriveFromBdd(): Network check has failed.\n" );
return pNtk;
}
/**Function*************************************************************
Synopsis [Creates PI terminal and net.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Obj_t * Io_ReadCreatePi( Abc_Ntk_t * pNtk, char * pName )
{
Abc_Obj_t * pNet, * pTerm;
// get the PI net
pNet = Abc_NtkFindNet( pNtk, pName );
if ( pNet )
printf( "Warning: PI \"%s\" appears twice in the list.\n", pName );
pNet = Abc_NtkFindOrCreateNet( pNtk, pName );
// add the PI node
pTerm = Abc_NtkCreatePi( pNtk );
Abc_ObjAddFanin( pNet, pTerm );
return pTerm;
}
/**Fnction*************************************************************
Synopsis [Constructs AIG in ABC from the manager.]
Description [The ABC network is started, as well as the array vCopy,
which will map the new ID of each object in the BBLIF manager into
the ponter ot the corresponding AIG object in the ABC. For each internal
node in a topological oder the AIG representation is created
by factoring the SOP representation of the BBLIF object. Finally,
the CO objects are created, and the dummy names are assigned because
ABC requires each CI/CO to have a name.]
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Bbl_ManToAig( Bbl_Man_t * p )
{
extern int Bbl_ManFncSize( Bbl_Man_t * p );
extern int Bbl_ObjFncHandle( Bbl_Obj_t * p );
extern Abc_Obj_t * Dec_GraphToAig( Abc_Ntk_t * pNtk, Dec_Graph_t * pFForm, Vec_Ptr_t * vFaninAigs );
int fVerbose = 0;
Abc_Ntk_t * pNtk;
Abc_Obj_t * pObjNew;
Bbl_Obj_t * pObj, * pFanin;
Vec_Ptr_t * vCopy, * vNodes, * vFaninAigs;
Dec_Graph_t ** pFForms;
int i;
clock_t clk;
clk = clock();
// map SOP handles into factored forms
pFForms = ABC_CALLOC( Dec_Graph_t *, Bbl_ManFncSize(p) );
Bbl_ManForEachObj( p, pObj )
if ( pFForms[Bbl_ObjFncHandle(pObj)] == NULL )
pFForms[Bbl_ObjFncHandle(pObj)] = Dec_Factor( Bbl_ObjSop(p, pObj) );
if ( fVerbose )
ABC_PRT( "Fct", clock() - clk );
// start the network
pNtk = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG, 1 );
pNtk->pName = Extra_UtilStrsav( Bbl_ManName(p) );
vCopy = Vec_PtrStart( 1000 );
// create CIs
Bbl_ManForEachObj( p, pObj )
{
if ( !Bbl_ObjIsInput(pObj) )
continue;
Vec_PtrSetEntry( vCopy, Bbl_ObjId(pObj), Abc_NtkCreatePi(pNtk) );
}
clk = clock();
// create internal nodes
vNodes = Bbl_ManDfs( p );
vFaninAigs = Vec_PtrAlloc( 100 );
Vec_PtrForEachEntry( Bbl_Obj_t *, vNodes, pObj, i )
{
// collect fanin AIGs
Vec_PtrClear( vFaninAigs );
Bbl_ObjForEachFanin( pObj, pFanin )
Vec_PtrPush( vFaninAigs, Vec_PtrEntry( vCopy, Bbl_ObjId(pFanin) ) );
// create the new node
pObjNew = Dec_GraphToAig( pNtk, pFForms[Bbl_ObjFncHandle(pObj)], vFaninAigs );
Vec_PtrSetEntry( vCopy, Bbl_ObjId(pObj), pObjNew );
}
Abc_Ntk_t * Abc_NtkFromMiniAig( Mini_Aig_t * p )
{
Abc_Ntk_t * pNtk;
Abc_Obj_t * pObj;
Vec_Int_t * vCopies;
int i, nNodes;
// get the number of nodes
nNodes = Mini_AigNodeNum(p);
// create ABC network
pNtk = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG, 1 );
pNtk->pName = Abc_UtilStrsav( "MiniAig" );
// create mapping from MiniAIG objects into ABC objects
vCopies = Vec_IntAlloc( nNodes );
Vec_IntPush( vCopies, Abc_LitNot(Abc_ObjToLit(Abc_AigConst1(pNtk))) );
// iterate through the objects
for ( i = 1; i < nNodes; i++ )
{
if ( Mini_AigNodeIsPi( p, i ) )
pObj = Abc_NtkCreatePi(pNtk);
else if ( Mini_AigNodeIsPo( p, i ) )
Abc_ObjAddFanin( (pObj = Abc_NtkCreatePo(pNtk)), Abc_NodeFanin0Copy(pNtk, vCopies, p, i) );
else if ( Mini_AigNodeIsAnd( p, i ) )
pObj = Abc_AigAnd((Abc_Aig_t *)pNtk->pManFunc, Abc_NodeFanin0Copy(pNtk, vCopies, p, i), Abc_NodeFanin1Copy(pNtk, vCopies, p, i));
else assert( 0 );
Vec_IntPush( vCopies, Abc_ObjToLit(pObj) );
}
assert( Vec_IntSize(vCopies) == nNodes );
Abc_AigCleanup( (Abc_Aig_t *)pNtk->pManFunc );
Vec_IntFree( vCopies );
Abc_NtkAddDummyPiNames( pNtk );
Abc_NtkAddDummyPoNames( pNtk );
if ( !Abc_NtkCheck( pNtk ) )
fprintf( stdout, "Abc_NtkFromMini(): Network check has failed.\n" );
// add latches
if ( Mini_AigRegNum(p) > 0 )
{
extern Abc_Ntk_t * Abc_NtkRestrashWithLatches( Abc_Ntk_t * pNtk, int nLatches );
Abc_Ntk_t * pTemp;
pNtk = Abc_NtkRestrashWithLatches( pTemp = pNtk, Mini_AigRegNum(p) );
Abc_NtkDelete( pTemp );
}
return pNtk;
}
/**Function*************************************************************
Synopsis [Creates miter for the sensitivity analysis.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Abc_NtkSensitivityMiter( Abc_Ntk_t * pNtk, int iVar )
{
Abc_Ntk_t * pMiter;
Vec_Ptr_t * vNodes;
Abc_Obj_t * pObj, * pNext, * pFanin, * pOutput, * pObjNew;
int i;
assert( Abc_NtkIsStrash(pNtk) );
assert( iVar < Abc_NtkCiNum(pNtk) );
// duplicate the network
pMiter = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG, 1 );
pMiter->pName = Extra_UtilStrsav(pNtk->pName);
pMiter->pSpec = Extra_UtilStrsav(pNtk->pSpec);
// assign the PIs
Abc_NtkCleanCopy( pNtk );
Abc_AigConst1(pNtk)->pCopy = Abc_AigConst1(pMiter);
Abc_AigConst1(pNtk)->pData = Abc_AigConst1(pMiter);
Abc_NtkForEachCi( pNtk, pObj, i )
{
pObj->pCopy = Abc_NtkCreatePi( pMiter );
pObj->pData = pObj->pCopy;
}
/**Function*************************************************************
Synopsis [Prepares the network for mitering.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkMiterPrepare( Abc_Ntk_t * pNtk1, Abc_Ntk_t * pNtk2, Abc_Ntk_t * pNtkMiter, int fComb, int nPartSize, int fMulti )
{
Abc_Obj_t * pObj, * pObjNew;
int i;
// clean the copy field in all objects
// Abc_NtkCleanCopy( pNtk1 );
// Abc_NtkCleanCopy( pNtk2 );
Abc_AigConst1(pNtk1)->pCopy = Abc_AigConst1(pNtkMiter);
Abc_AigConst1(pNtk2)->pCopy = Abc_AigConst1(pNtkMiter);
if ( fComb )
{
// create new PIs and remember them in the old PIs
Abc_NtkForEachCi( pNtk1, pObj, i )
{
pObjNew = Abc_NtkCreatePi( pNtkMiter );
// remember this PI in the old PIs
pObj->pCopy = pObjNew;
pObj = Abc_NtkCi(pNtk2, i);
pObj->pCopy = pObjNew;
// add name
Abc_ObjAssignName( pObjNew, Abc_ObjName(pObj), NULL );
}
if ( nPartSize <= 0 )
{
// create POs
if ( fMulti )
{
Abc_NtkForEachCo( pNtk1, pObj, i )
{
pObjNew = Abc_NtkCreatePo( pNtkMiter );
Abc_ObjAssignName( pObjNew, "miter", Abc_ObjName(pObjNew) );
}
}
else
{
/**Function*************************************************************
Synopsis [Structurally hashes the given window.]
Description [The first PO is the observability condition. The second
is the node's function. The remaining POs are the candidate divisors.]
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Res_WndStrash( Res_Win_t * p )
{
Vec_Ptr_t * vPairs;
Abc_Ntk_t * pAig;
Abc_Obj_t * pObj, * pMiter;
int i;
assert( Abc_NtkHasAig(p->pNode->pNtk) );
// Abc_NtkCleanCopy( p->pNode->pNtk );
// create the network
pAig = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG, 1 );
pAig->pName = Extra_UtilStrsav( "window" );
// create the inputs
Vec_PtrForEachEntry( Abc_Obj_t *, p->vLeaves, pObj, i )
pObj->pCopy = Abc_NtkCreatePi( pAig );
Vec_PtrForEachEntry( Abc_Obj_t *, p->vBranches, pObj, i )
pObj->pCopy = Abc_NtkCreatePi( pAig );
// go through the nodes in the topological order
Vec_PtrForEachEntry( Abc_Obj_t *, p->vNodes, pObj, i )
{
pObj->pCopy = Abc_ConvertAigToAig( pAig, pObj );
if ( pObj == p->pNode )
pObj->pCopy = Abc_ObjNot( pObj->pCopy );
}
// collect the POs
vPairs = Vec_PtrAlloc( 2 * Vec_PtrSize(p->vRoots) );
Vec_PtrForEachEntry( Abc_Obj_t *, p->vRoots, pObj, i )
{
Vec_PtrPush( vPairs, pObj->pCopy );
Vec_PtrPush( vPairs, NULL );
}
// mark the TFO of the node
Abc_NtkIncrementTravId( p->pNode->pNtk );
Res_WinSweepLeafTfo_rec( p->pNode, (int)p->pNode->Level + p->nWinTfoMax );
// update strashing of the node
p->pNode->pCopy = Abc_ObjNot( p->pNode->pCopy );
Abc_NodeSetTravIdPrevious( p->pNode );
// redo strashing in the TFO
Vec_PtrForEachEntry( Abc_Obj_t *, p->vNodes, pObj, i )
{
if ( Abc_NodeIsTravIdCurrent(pObj) )
pObj->pCopy = Abc_ConvertAigToAig( pAig, pObj );
}
// collect the POs
Vec_PtrForEachEntry( Abc_Obj_t *, p->vRoots, pObj, i )
Vec_PtrWriteEntry( vPairs, 2 * i + 1, pObj->pCopy );
// add the miter
pMiter = Abc_AigMiter( (Abc_Aig_t *)pAig->pManFunc, vPairs, 0 );
Abc_ObjAddFanin( Abc_NtkCreatePo(pAig), pMiter );
Vec_PtrFree( vPairs );
// add the node
Abc_ObjAddFanin( Abc_NtkCreatePo(pAig), p->pNode->pCopy );
// add the fanins
Abc_ObjForEachFanin( p->pNode, pObj, i )
Abc_ObjAddFanin( Abc_NtkCreatePo(pAig), pObj->pCopy );
// add the divisors
Vec_PtrForEachEntry( Abc_Obj_t *, p->vDivs, pObj, i )
Abc_ObjAddFanin( Abc_NtkCreatePo(pAig), pObj->pCopy );
// add the names
Abc_NtkAddDummyPiNames( pAig );
Abc_NtkAddDummyPoNames( pAig );
// check the resulting network
if ( !Abc_NtkCheck( pAig ) )
fprintf( stdout, "Res_WndStrash(): Network check has failed.\n" );
return pAig;
}
/**Function*************************************************************
Synopsis [Strashes one node in the BLIF-MV netlist.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
int Abc_NodeStrashBlifMv( Abc_Ntk_t * pNtkNew, Abc_Obj_t * pObj )
{
int fAddFreeVars = 1;
char * pSop;
Abc_Obj_t ** pValues, ** pValuesF, ** pValuesF2;
Abc_Obj_t * pTemp, * pTemp2, * pFanin, * pFanin2, * pNet;
int k, v, Def, DefIndex, Index, nValues, nValuesF, nValuesF2;
// start the output values
assert( Abc_ObjIsNode(pObj) );
pNet = Abc_ObjFanout0(pObj);
nValues = Abc_ObjMvVarNum(pNet);
pValues = ABC_ALLOC( Abc_Obj_t *, nValues );
for ( k = 0; k < nValues; k++ )
pValues[k] = Abc_ObjNot( Abc_AigConst1(pNtkNew) );
// get the BLIF-MV formula
pSop = (char *)pObj->pData;
// skip the value line
// while ( *pSop++ != '\n' );
// handle the constant
if ( Abc_ObjFaninNum(pObj) == 0 )
{
// skip the default if present
if ( *pSop == 'd' )
while ( *pSop++ != '\n' );
// skip space if present
if ( *pSop == ' ' )
pSop++;
// assume don't-care constant to be zero
if ( *pSop == '-' )
Index = 0;
else
Index = Abc_StringGetNumber( &pSop );
assert( Index < nValues );
////////////////////////////////////////////
// adding free variables for binary ND-constants
if ( fAddFreeVars && nValues == 2 && *pSop == '-' )
{
pValues[1] = Abc_NtkCreatePi(pNtkNew);
pValues[0] = Abc_ObjNot( pValues[1] );
Abc_ObjAssignName( pValues[1], "free_var_", Abc_ObjName(pValues[1]) );
}
else
pValues[Index] = Abc_AigConst1(pNtkNew);
////////////////////////////////////////////
// save the values in the fanout net
pNet->pCopy = (Abc_Obj_t *)pValues;
return 1;
}
// parse the default line
Def = DefIndex = -1;
if ( *pSop == 'd' )
{
pSop++;
if ( *pSop == '=' )
{
pSop++;
DefIndex = Abc_StringGetNumber( &pSop );
assert( DefIndex < Abc_ObjFaninNum(pObj) );
}
else if ( *pSop == '-' )
{
pSop++;
Def = 0;
}
else
{
Def = Abc_StringGetNumber( &pSop );
assert( Def < nValues );
}
assert( *pSop == '\n' );
pSop++;
}
// convert the values
while ( *pSop )
{
// extract the values for each cube
pTemp = Abc_AigConst1(pNtkNew);
Abc_ObjForEachFanin( pObj, pFanin, k )
{
if ( *pSop == '-' )
{
pSop += 2;
continue;
}
if ( *pSop == '!' )
{
ABC_FREE( pValues );
printf( "Abc_NodeStrashBlifMv(): Cannot handle complement in the MV function of node %s.\n", Abc_ObjName(Abc_ObjFanout0(pObj)) );
return 0;
}
if ( *pSop == '{' )
{
ABC_FREE( pValues );
printf( "Abc_NodeStrashBlifMv(): Cannot handle braces in the MV function of node %s.\n", Abc_ObjName(Abc_ObjFanout0(pObj)) );
return 0;
}
// get the value set
nValuesF = Abc_ObjMvVarNum(pFanin);
pValuesF = (Abc_Obj_t **)pFanin->pCopy;
if ( *pSop == '(' )
{
pSop++;
pTemp2 = Abc_ObjNot( Abc_AigConst1(pNtkNew) );
while ( *pSop != ')' )
{
Index = Abc_StringGetNumber( &pSop );
assert( Index < nValuesF );
pTemp2 = Abc_AigOr( (Abc_Aig_t *)pNtkNew->pManFunc, pTemp2, pValuesF[Index] );
assert( *pSop == ')' || *pSop == ',' );
if ( *pSop == ',' )
pSop++;
}
assert( *pSop == ')' );
pSop++;
}
else if ( *pSop == '=' )
{
pSop++;
// get the fanin index
Index = Abc_StringGetNumber( &pSop );
assert( Index < Abc_ObjFaninNum(pObj) );
assert( Index != k );
// get the fanin
pFanin2 = Abc_ObjFanin( pObj, Index );
nValuesF2 = Abc_ObjMvVarNum(pFanin2);
pValuesF2 = (Abc_Obj_t **)pFanin2->pCopy;
// create the sum of products of values
assert( nValuesF == nValuesF2 );
pTemp2 = Abc_ObjNot( Abc_AigConst1(pNtkNew) );
for ( v = 0; v < nValues; v++ )
pTemp2 = Abc_AigOr( (Abc_Aig_t *)pNtkNew->pManFunc, pTemp2, Abc_AigAnd((Abc_Aig_t *)pNtkNew->pManFunc, pValuesF[v], pValuesF2[v]) );
}
else
{
Index = Abc_StringGetNumber( &pSop );
assert( Index < nValuesF );
pTemp2 = pValuesF[Index];
}
// compute the compute
pTemp = Abc_AigAnd( (Abc_Aig_t *)pNtkNew->pManFunc, pTemp, pTemp2 );
// advance the reading point
assert( *pSop == ' ' );
pSop++;
}
// check if the output value is an equal construct
if ( *pSop == '=' )
{
pSop++;
// get the output value
Index = Abc_StringGetNumber( &pSop );
assert( Index < Abc_ObjFaninNum(pObj) );
// add values of the given fanin with the given cube
pFanin = Abc_ObjFanin( pObj, Index );
nValuesF = Abc_ObjMvVarNum(pFanin);
pValuesF = (Abc_Obj_t **)pFanin->pCopy;
assert( nValuesF == nValues ); // should be guaranteed by the parser
for ( k = 0; k < nValuesF; k++ )
pValues[k] = Abc_AigOr( (Abc_Aig_t *)pNtkNew->pManFunc, pValues[k], Abc_AigAnd((Abc_Aig_t *)pNtkNew->pManFunc, pTemp, pValuesF[k]) );
}
else
{
// get the output value
Index = Abc_StringGetNumber( &pSop );
assert( Index < nValues );
pValues[Index] = Abc_AigOr( (Abc_Aig_t *)pNtkNew->pManFunc, pValues[Index], pTemp );
}
// advance the reading point
assert( *pSop == '\n' );
pSop++;
}
// compute the default value
if ( Def >= 0 || DefIndex >= 0 )
{
pTemp = Abc_AigConst1(pNtkNew);
for ( k = 0; k < nValues; k++ )
{
if ( k == Def )
continue;
pTemp = Abc_AigAnd( (Abc_Aig_t *)pNtkNew->pManFunc, pTemp, Abc_ObjNot(pValues[k]) );
}
// assign the default value
if ( Def >= 0 )
pValues[Def] = pTemp;
else
{
assert( DefIndex >= 0 );
// add values of the given fanin with the given cube
pFanin = Abc_ObjFanin( pObj, DefIndex );
nValuesF = Abc_ObjMvVarNum(pFanin);
pValuesF = (Abc_Obj_t **)pFanin->pCopy;
assert( nValuesF == nValues ); // should be guaranteed by the parser
for ( k = 0; k < nValuesF; k++ )
pValues[k] = Abc_AigOr( (Abc_Aig_t *)pNtkNew->pManFunc, pValues[k], Abc_AigAnd((Abc_Aig_t *)pNtkNew->pManFunc, pTemp, pValuesF[k]) );
}
}
// save the values in the fanout net
pNet->pCopy = (Abc_Obj_t *)pValues;
return 1;
}
/**Function*************************************************************
Synopsis [Adds a gate to the circuit.]
Description [The meaning of the parameters are:
type: the type of the gate to be added
name: the name of the gate to be added, name should be unique in a circuit.
nofi: number of fanins of the gate to be added;
fanins: the name array of fanins of the gate to be added.]
SideEffects []
SeeAlso []
***********************************************************************/
int ABC_AddGate( ABC_Manager mng, enum GateType type, char * name, int nofi, char ** fanins, int dc_attr )
{
Abc_Obj_t * pObj = NULL; // Suppress "might be used uninitialized"
Abc_Obj_t * pFanin;
char * pSop = NULL; // Suppress "might be used uninitialized"
char * pNewName;
int i;
// save the name in the local memory manager
pNewName = Mem_FlexEntryFetch( mng->pMmNames, strlen(name) + 1 );
strcpy( pNewName, name );
name = pNewName;
// consider different cases, create the node, and map the node into the name
switch( type )
{
case CSAT_BPI:
case CSAT_BPPI:
if ( nofi != 0 )
{ printf( "ABC_AddGate: The PI/PPI gate \"%s\" has fanins.\n", name ); return 0; }
// create the PI
pObj = Abc_NtkCreatePi( mng->pNtk );
stmm_insert( mng->tNode2Name, (char *)pObj, name );
break;
case CSAT_CONST:
case CSAT_BAND:
case CSAT_BNAND:
case CSAT_BOR:
case CSAT_BNOR:
case CSAT_BXOR:
case CSAT_BXNOR:
case CSAT_BINV:
case CSAT_BBUF:
// create the node
pObj = Abc_NtkCreateNode( mng->pNtk );
// create the fanins
for ( i = 0; i < nofi; i++ )
{
if ( !stmm_lookup( mng->tName2Node, fanins[i], (char **)&pFanin ) )
{ printf( "ABC_AddGate: The fanin gate \"%s\" is not in the network.\n", fanins[i] ); return 0; }
Abc_ObjAddFanin( pObj, pFanin );
}
// create the node function
switch( type )
{
case CSAT_CONST:
if ( nofi != 0 )
{ printf( "ABC_AddGate: The constant gate \"%s\" has fanins.\n", name ); return 0; }
pSop = Abc_SopCreateConst1( (Mem_Flex_t *)mng->pNtk->pManFunc );
break;
case CSAT_BAND:
if ( nofi < 1 )
{ printf( "ABC_AddGate: The AND gate \"%s\" no fanins.\n", name ); return 0; }
pSop = Abc_SopCreateAnd( (Mem_Flex_t *)mng->pNtk->pManFunc, nofi, NULL );
break;
case CSAT_BNAND:
if ( nofi < 1 )
{ printf( "ABC_AddGate: The NAND gate \"%s\" no fanins.\n", name ); return 0; }
pSop = Abc_SopCreateNand( (Mem_Flex_t *)mng->pNtk->pManFunc, nofi );
break;
case CSAT_BOR:
if ( nofi < 1 )
{ printf( "ABC_AddGate: The OR gate \"%s\" no fanins.\n", name ); return 0; }
pSop = Abc_SopCreateOr( (Mem_Flex_t *)mng->pNtk->pManFunc, nofi, NULL );
break;
case CSAT_BNOR:
if ( nofi < 1 )
{ printf( "ABC_AddGate: The NOR gate \"%s\" no fanins.\n", name ); return 0; }
pSop = Abc_SopCreateNor( (Mem_Flex_t *)mng->pNtk->pManFunc, nofi );
break;
case CSAT_BXOR:
if ( nofi < 1 )
{ printf( "ABC_AddGate: The XOR gate \"%s\" no fanins.\n", name ); return 0; }
if ( nofi > 2 )
{ printf( "ABC_AddGate: The XOR gate \"%s\" has more than two fanins.\n", name ); return 0; }
pSop = Abc_SopCreateXor( (Mem_Flex_t *)mng->pNtk->pManFunc, nofi );
break;
case CSAT_BXNOR:
if ( nofi < 1 )
{ printf( "ABC_AddGate: The XNOR gate \"%s\" no fanins.\n", name ); return 0; }
if ( nofi > 2 )
{ printf( "ABC_AddGate: The XNOR gate \"%s\" has more than two fanins.\n", name ); return 0; }
pSop = Abc_SopCreateNxor( (Mem_Flex_t *)mng->pNtk->pManFunc, nofi );
break;
case CSAT_BINV:
if ( nofi != 1 )
{ printf( "ABC_AddGate: The inverter gate \"%s\" does not have exactly one fanin.\n", name ); return 0; }
pSop = Abc_SopCreateInv( (Mem_Flex_t *)mng->pNtk->pManFunc );
break;
case CSAT_BBUF:
if ( nofi != 1 )
{ printf( "ABC_AddGate: The buffer gate \"%s\" does not have exactly one fanin.\n", name ); return 0; }
pSop = Abc_SopCreateBuf( (Mem_Flex_t *)mng->pNtk->pManFunc );
break;
default :
break;
}
Abc_ObjSetData( pObj, pSop );
break;
case CSAT_BPPO:
case CSAT_BPO:
if ( nofi != 1 )
{ printf( "ABC_AddGate: The PO/PPO gate \"%s\" does not have exactly one fanin.\n", name ); return 0; }
// create the PO
pObj = Abc_NtkCreatePo( mng->pNtk );
stmm_insert( mng->tNode2Name, (char *)pObj, name );
// connect to the PO fanin
if ( !stmm_lookup( mng->tName2Node, fanins[0], (char **)&pFanin ) )
{ printf( "ABC_AddGate: The fanin gate \"%s\" is not in the network.\n", fanins[0] ); return 0; }
Abc_ObjAddFanin( pObj, pFanin );
break;
default:
printf( "ABC_AddGate: Unknown gate type.\n" );
break;
}
// map the name into the node
if ( stmm_insert( mng->tName2Node, name, (char *)pObj ) )
{ printf( "ABC_AddGate: The same gate \"%s\" is added twice.\n", name ); return 0; }
return 1;
}
/**Function*************************************************************
Synopsis [Implements the given retiming on the sequential AIG.]
Description [Returns 0 of initial state computation fails.]
SideEffects []
SeeAlso []
***********************************************************************/
int Seq_NtkImplementRetimingBackward( Abc_Ntk_t * pNtk, Vec_Ptr_t * vMoves, int fVerbose )
{
Seq_RetEdge_t RetEdge;
stmm_table * tTable;
stmm_generator * gen;
Vec_Int_t * vValues;
Abc_Ntk_t * pNtkProb, * pNtkMiter, * pNtkCnf;
Abc_Obj_t * pNode, * pNodeNew;
int * pModel, RetValue, i, clk;
// return if the retiming is trivial
if ( Vec_PtrSize(vMoves) == 0 )
return 1;
// create the network for the initial state computation
// start the table and the array of PO values
pNtkProb = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_SOP, 1 );
tTable = stmm_init_table( stmm_numcmp, stmm_numhash );
vValues = Vec_IntAlloc( 100 );
// perform the backward moves and build the network for initial state computation
RetValue = 0;
Vec_PtrForEachEntry( vMoves, pNode, i )
RetValue |= Abc_ObjRetimeBackward( pNode, pNtkProb, tTable, vValues );
// add the PIs corresponding to the white spots
stmm_foreach_item( tTable, gen, (char **)&RetEdge, (char **)&pNodeNew )
Abc_ObjAddFanin( pNodeNew, Abc_NtkCreatePi(pNtkProb) );
// add the PI/PO names
Abc_NtkAddDummyPiNames( pNtkProb );
Abc_NtkAddDummyPoNames( pNtkProb );
Abc_NtkAddDummyAssertNames( pNtkProb );
// make sure everything is okay with the network structure
if ( !Abc_NtkDoCheck( pNtkProb ) )
{
printf( "Seq_NtkImplementRetimingBackward: The internal network check has failed.\n" );
Abc_NtkRetimeSetInitialValues( pNtk, tTable, NULL );
Abc_NtkDelete( pNtkProb );
stmm_free_table( tTable );
Vec_IntFree( vValues );
return 0;
}
// check if conflict is found
if ( RetValue )
{
printf( "Seq_NtkImplementRetimingBackward: A top level conflict is detected. DC latch values are used.\n" );
Abc_NtkRetimeSetInitialValues( pNtk, tTable, NULL );
Abc_NtkDelete( pNtkProb );
stmm_free_table( tTable );
Vec_IntFree( vValues );
return 0;
}
// get the miter cone
pNtkMiter = Abc_NtkCreateTarget( pNtkProb, pNtkProb->vCos, vValues );
Abc_NtkDelete( pNtkProb );
Vec_IntFree( vValues );
if ( fVerbose )
printf( "The number of ANDs in the AIG = %5d.\n", Abc_NtkNodeNum(pNtkMiter) );
// transform the miter into a logic network for efficient CNF construction
// pNtkCnf = Abc_Ntk_Renode( pNtkMiter, 0, 100, 1, 0, 0 );
// Abc_NtkDelete( pNtkMiter );
pNtkCnf = pNtkMiter;
// solve the miter
clk = clock();
// RetValue = Abc_NtkMiterSat_OldAndRusty( pNtkCnf, 30, 0 );
RetValue = Abc_NtkMiterSat( pNtkCnf, (sint64)500000, (sint64)50000000, 0, 0, NULL, NULL );
if ( fVerbose )
if ( clock() - clk > 100 )
{
PRT( "SAT solving time", clock() - clk );
}
pModel = pNtkCnf->pModel; pNtkCnf->pModel = NULL;
Abc_NtkDelete( pNtkCnf );
// analyze the result
if ( RetValue == -1 || RetValue == 1 )
{
Abc_NtkRetimeSetInitialValues( pNtk, tTable, NULL );
if ( RetValue == 1 )
printf( "Seq_NtkImplementRetimingBackward: The problem is unsatisfiable. DC latch values are used.\n" );
else
printf( "Seq_NtkImplementRetimingBackward: The SAT problem timed out. DC latch values are used.\n" );
stmm_free_table( tTable );
return 0;
}
// set the values of the latches
Abc_NtkRetimeSetInitialValues( pNtk, tTable, pModel );
stmm_free_table( tTable );
free( pModel );
return 1;
}
ABC_NAMESPACE_IMPL_START
// For description of Binary BLIF format, refer to "abc/src/aig/bbl/bblif.h"
////////////////////////////////////////////////////////////////////////
/// DECLARATIONS ///
////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////
/// FUNCTION DEFINITIONS ///
////////////////////////////////////////////////////////////////////////
/**Fnction*************************************************************
Synopsis [Constructs ABC network from the manager.]
Description [The ABC network is started, as well as the array vCopy,
which will map the new ID of each object in the BBLIF manager into
the ponter ot the corresponding object in the ABC. For each internal
node, determined by Bbl_ObjIsLut(), the SOP representation is created
by retrieving the SOP representation of the BBLIF object. Finally,
the objects are connected using fanin/fanout creation, and the dummy
names are assigned because ABC requires each CI/CO to have a name.]
SideEffects []
SeeAlso []
***********************************************************************/
Abc_Ntk_t * Bbl_ManToAbc( Bbl_Man_t * p )
{
Abc_Ntk_t * pNtk;
Abc_Obj_t * pObjNew;
Bbl_Obj_t * pObj, * pFanin;
Vec_Ptr_t * vCopy;
// start the network
pNtk = Abc_NtkAlloc( ABC_NTK_LOGIC, ABC_FUNC_SOP, 1 );
pNtk->pName = Extra_UtilStrsav( Bbl_ManName(p) );
// create objects
vCopy = Vec_PtrStart( 1000 );
Bbl_ManForEachObj( p, pObj )
{
if ( Bbl_ObjIsInput(pObj) )
pObjNew = Abc_NtkCreatePi( pNtk );
else if ( Bbl_ObjIsOutput(pObj) )
pObjNew = Abc_NtkCreatePo( pNtk );
else if ( Bbl_ObjIsLut(pObj) )
pObjNew = Abc_NtkCreateNode( pNtk );
else assert( 0 );
if ( Bbl_ObjIsLut(pObj) )
pObjNew->pData = Abc_SopRegister( (Mem_Flex_t *)pNtk->pManFunc, Bbl_ObjSop(p, pObj) );
Vec_PtrSetEntry( vCopy, Bbl_ObjId(pObj), pObjNew );
}
// connect objects
Bbl_ManForEachObj( p, pObj )
Bbl_ObjForEachFanin( pObj, pFanin )
Abc_ObjAddFanin( (Abc_Obj_t *)Vec_PtrEntry(vCopy, Bbl_ObjId(pObj)), (Abc_Obj_t *)Vec_PtrEntry(vCopy, Bbl_ObjId(pFanin)) );
// finalize
Vec_PtrFree( vCopy );
Abc_NtkAddDummyPiNames( pNtk );
Abc_NtkAddDummyPoNames( pNtk );
if ( !Abc_NtkCheck( pNtk ) )
printf( "Bbl_ManToAbc(): Network check has failed.\n" );
return pNtk;
}
/**Function*************************************************************
Synopsis [Starts the record for the given network.]
Description []
SideEffects []
SeeAlso []
***********************************************************************/
void Abc_NtkRecStart( Abc_Ntk_t * pNtk, int nVars, int nCuts )
{
Abc_ManRec_t * p;
Abc_Obj_t * pObj, ** ppSpot;
char Buffer[10];
unsigned * pTruth;
int i, RetValue;
int clkTotal = clock(), clk;
assert( s_pMan == NULL );
if ( pNtk == NULL )
{
assert( nVars > 2 && nVars <= 16 );
pNtk = Abc_NtkAlloc( ABC_NTK_STRASH, ABC_FUNC_AIG, 1 );
pNtk->pName = Extra_UtilStrsav( "record" );
}
else
{
if ( Abc_NtkGetChoiceNum(pNtk) > 0 )
{
printf( "The starting record should be a network without choice nodes.\n" );
return;
}
if ( Abc_NtkPiNum(pNtk) > 16 )
{
printf( "The starting record should be a network with no more than %d primary inputs.\n", 16 );
return;
}
if ( Abc_NtkPiNum(pNtk) > nVars )
printf( "The starting record has %d inputs (warning only).\n", Abc_NtkPiNum(pNtk) );
pNtk = Abc_NtkDup( pNtk );
}
// create the primary inputs
for ( i = Abc_NtkPiNum(pNtk); i < nVars; i++ )
{
pObj = Abc_NtkCreatePi( pNtk );
Buffer[0] = 'a' + i;
Buffer[1] = 0;
Abc_ObjAssignName( pObj, Buffer, NULL );
}
Abc_NtkCleanCopy( pNtk );
Abc_NtkCleanEquiv( pNtk );
// start the manager
p = ABC_ALLOC( Abc_ManRec_t, 1 );
memset( p, 0, sizeof(Abc_ManRec_t) );
p->pNtk = pNtk;
p->nVars = Abc_NtkPiNum(pNtk);
p->nWords = Kit_TruthWordNum( p->nVars );
p->nCuts = nCuts;
p->nVarsInit = nVars;
// create elementary truth tables
p->vTtElems = Vec_PtrAlloc( 0 );
assert( p->vTtElems->pArray == NULL );
p->vTtElems->nSize = p->nVars;
p->vTtElems->nCap = p->nVars;
p->vTtElems->pArray = (void *)Extra_TruthElementary( p->nVars );
// allocate room for node truth tables
if ( Abc_NtkObjNum(pNtk) > (1<<14) )
p->vTtNodes = Vec_PtrAllocSimInfo( 2 * Abc_NtkObjNum(pNtk), p->nWords );
else
p->vTtNodes = Vec_PtrAllocSimInfo( 1<<14, p->nWords );
// create hash table
p->nBins = 50011;
p->pBins = ABC_ALLOC( Abc_Obj_t *, p->nBins );
memset( p->pBins, 0, sizeof(Abc_Obj_t *) * p->nBins );
// set elementary tables
Kit_TruthFill( Vec_PtrEntry(p->vTtNodes, 0), p->nVars );
Abc_NtkForEachPi( pNtk, pObj, i )
Kit_TruthCopy( Vec_PtrEntry(p->vTtNodes, pObj->Id), Vec_PtrEntry(p->vTtElems, i), p->nVars );
// compute the tables
clk = clock();
Abc_AigForEachAnd( pNtk, pObj, i )
{
RetValue = Abc_NtkRecComputeTruth( pObj, p->vTtNodes, p->nVars );
assert( RetValue );
}
