// -----------------------------------------------------------------------------
// CContextEnginePluginTest::DeleteObjects
// -----------------------------------------------------------------------------
//
TInt CContextEnginePluginTest::DeleteObjectsL( CStifItemParser& /* aItem */ )
{
ActiveWait( 2000000 );
_LIT( KMsg1, "Enter EndDeleteObjects" );
iLog->Log( KMsg1 );
RDebug::Print( KMsg1 );
TInt count(0);
count = iIds.Count();
for ( TInt i = 0; i < count; ++i )
{
TInt id = iIds[i];
iMdEClient->RemoveObjectL( id );
}
iIds.Reset();
_LIT( KMsg2, "Exit EndDeleteObjects" );
iLog->Log( KMsg2 );
RDebug::Print( KMsg2 );
return KErrNone;
}
/* Configure USB peripheral. */
static int USBHperipheralConfigure(void) {
USB_OTG_GRSTCTL_TypeDef grstctl;
USB_OTG_GUSBCFG_TypeDef gusbcfg;
USB_OTG_GCCFG_TypeDef gccfg;
USB_OTG_GINTMSK_TypeDef gintmsk;
USB_OTG_GAHBCFG_TypeDef gahbcfg;
USB_OTG_FIFOSIZE_TypeDef fifosize;
uint32_t rx_fifosize, tx_nonperiodic_fifosize, tx_periodic_fifosize;
int timeout;
/* Reset the USB core. */
grstctl.d32 = 0;
grstctl.b.csrst = 1;
P_USB_OTG_GREGS->GRSTCTL = grstctl.d32;
timeout = 20;
do {
if (--timeout < 0)
return USBHLIB_ERROR_TIMEOUT;
grstctl.d32 = P_USB_OTG_GREGS->GRSTCTL;
} while (grstctl.b.csrst == 1);
/* Wait for the AHB master idle state. */
grstctl.d32 = 0;
timeout = 20;
do {
if (--timeout < 0)
return USBHLIB_ERROR_TIMEOUT;
grstctl.d32 = P_USB_OTG_GREGS->GRSTCTL;
} while (grstctl.b.ahbidl == 0);
/* Configure USB in the host mode. */
gusbcfg.d32 = 0;
gusbcfg.b.fhmod = 1; /* Force the host mode. */
/* gusbcfg.b.physel = 1; This bit is read-only and always 1. */
P_USB_OTG_GREGS->GUSBCFG = gusbcfg.d32;
ActiveWait(1, 50); /* If not wait, FIFO size registers are not written. */
USBHvbus(1); /* Switch VBUS power on. */
gccfg.d32 = 0;
gccfg.b.vbusasen = 1; /* Set VBUS sensing on A device. */
gccfg.b.pwrdwn = 1; /* Deactivate power down. */
P_USB_OTG_GREGS->GCCFG = gccfg.d32;
P_USB_OTG_PREGS->PCGCCTL = 0; /* Not reset by grstctl.b.csrst */
ActiveWait(1, 50); /* If not wait, FIFO size registers are not written. */
/* Calculate the frame interval based on the PHY clock selected in
the fslspcd field of the HCFG register.
P_USB_OTG_HREGS->HFIR = 0; */
/* Configure FIFOs. Values in 4-byte words. Totally max 320 words. */
rx_fifosize = 128;
tx_nonperiodic_fifosize = 96;
tx_periodic_fifosize = 96;
P_USB_OTG_GREGS->GRXFSIZ = rx_fifosize;
fifosize.b.startaddr = rx_fifosize;
fifosize.b.depth = tx_nonperiodic_fifosize;
P_USB_OTG_GREGS->HNPTXFSIZ = fifosize.d32;
fifosize.b.startaddr = rx_fifosize + tx_nonperiodic_fifosize;
fifosize.b.depth = tx_periodic_fifosize;
P_USB_OTG_GREGS->HPTXFSIZ = fifosize.d32;
/* Configure the global interrupt. */
gintmsk.d32 = 0;
gintmsk.b.sofm = 1;
gintmsk.b.rxflvlm = 1;
gintmsk.b.hprtim = 1;
gintmsk.b.hcim = 1;
gintmsk.b.discim = 1;
P_USB_OTG_GREGS->GINTMSK = gintmsk.d32;
gahbcfg.d32 = 0;
/* We do not use TS FIFO interrupt.
gahbcfg.b.ptxfelvl = 1;
gahbcfg.b.txfelvl = 1; */
gahbcfg.b.gintmsk = 1; /* Enable global interrupt. */
P_USB_OTG_GREGS->GAHBCFG = gahbcfg.d32;
return USBHLIB_SUCCESS;
}
