int CSerialPort::availableInt(uint8_t n) { switch (n) { case 1U: #if defined(STM32F4_DISCOVERY) return AvailUSART3(); #elif defined(STM32F4_PI) return AvailUSART1(); #elif defined(STM32F4_NUCLEO) return AvailUSART2(); #endif case 3U: #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER) return AvailUSART1(); #else return AvailUART5(); #endif default: return false; } }
int CSerialPort::availableInt(uint8_t n) { switch (n) { case 1U: #if defined(STM32F4_DISCOVERY) || defined(STM32F7_NUCLEO) return AvailUSART3(); #elif defined(STM32F4_PI) || defined(STM32F4_F4M) || defined(STM32F722_PI) || defined(STM32F722_F7M) || defined(STM32F722_RPT_HAT) || defined(STM32F4_DVM) return AvailUSART1(); #elif defined(STM32F4_NUCLEO) || defined(STM32F4_RPT_HAT_TGO) return AvailUSART2(); #endif case 3U: #if defined(STM32F4_NUCLEO) && defined(STM32F4_NUCLEO_ARDUINO_HEADER) return AvailUSART1(); #else return AvailUART5(); #endif default: return 0; } }