/* Parse the COF head into the top-level f2, then parse tails into
the f2->parts array, and NULL-terminate the array */
void
f2_parse_cof(const Uchar *file, size_t line, Uchar *lp, struct f2 *f2p,
Uchar **psu_sense, Uchar *ampamp, struct sig_context *scp)
{
List *cofs = list_create(LIST_SINGLE);
Uchar *form = NULL;
int i = 0;
while (1)
{
list_add(cofs, lp);
if (!ampamp)
break;
*ampamp = '\0';
ampamp += 2;
lp = ampamp;
ampamp = (unsigned char *)strstr((char*)lp,"&&");
}
f2p->parts = mb_new_array(scp->mb_f2ps, list_len(cofs));
/* Parse the head in the top-level f2 structure */
form = list_first(cofs);
f2_parse(file,line,form,f2p,NULL,NULL);
f2p->cof_id = (uintptr_t)f2p;
BIT_SET(f2p->flags, F2_FLAGS_COF_HEAD);
/* Now parse the tails into the parts array */
for (i = 0, form = list_next(cofs);
form;
form = list_next(cofs), ++i)
{
f2p->parts[i] = mb_new(scp->mb_f2s);
f2_parse(file,line,form,f2p->parts[i],NULL,NULL);
f2p->parts[i]->cof_id = (uintptr_t)f2p;
BIT_SET(f2p->parts[i]->flags, F2_FLAGS_COF_TAIL);
}
f2p->parts[i] = NULL;
}
int main(void)
{
UINT8 data;
BIT_SET(L_OUT_DDR,L_OUT_PIN); //L_OUT pin is output
BIT_SET(K_OUT_DDR,K_OUT_PIN); //K_OUT pin is output
K_OUT(1);
L_OUT(1);
uart1_init(10400);
uart_init(115200); //Set up UART
TimeInit(); //set up time
//set up printf
fdevopen(uart_putchar, NULL);
printf("Hello world\n");
while (1)
{
if (uart1_kbhit())
{
data=uart1_getchar();
printf("0x%02X ",data);
//uart_putchar(data);
}
if (uart_kbhit())
{
data=uart_getchar();
uart1_putchar(data);
}
}
}
void CBibitemView::OnItemchangedListFields(NMHDR* pNMHDR, LRESULT* pResult)
{
NM_LISTVIEW* pNMListView = (NM_LISTVIEW*)pNMHDR;
if (!m_Updating) {
if (pNMListView->uChanged == LVIF_STATE) {
if (BIT_SET(pNMListView->uNewState, LVIS_FOCUSED))
m_SelField = pNMListView->iItem;
else
m_SelField = -1;
}
}
*pResult = 0;
}
void shift_write_word ( uint8_t *output, uint8_t size )
{
uint8_t i;
for ( i=1; i<=size; i++)
{
shift_write_bit(output[(size-i)/8] & (1<<(size-i)%8));
}
BIT_SET( LATCH_PORT, LATCH_BIT );
_delay_us(DELAY);
BIT_CLEAR( LATCH_PORT, LATCH_BIT );
_delay_us(DELAY);
}
static int8_t AllocTrigId(uint8_t pinNum)
{
int8_t id = 0;
while (BIT_IS_SET(trigUse, id)) {
++id;
}
if (id == MAX_TRIGGERS) {
return AJS_IO_PIN_NO_TRIGGER;
} else {
BIT_SET(trigUse, id);
pinIdToSource[id] = pinNum;
return id;
}
}
/*************************************************************************
* Description: returns the current millisecond count
* Returns: none
* Notes: This method only disables the timer overflow interrupt.
*************************************************************************/
uint32_t timer_milliseconds(
void)
{
uint32_t timer_value; /* return value */
/* Disable the overflow interrupt.
Prevents value corruption that would happen if interrupted */
BIT_CLEAR(TIMSK2, TOIE2);
timer_value = Millisecond_Counter;
/* Enable the overflow interrupt */
BIT_SET(TIMSK2, TOIE2);
return timer_value;
}
void timer_init(void)
{
// commented out due to bug!?
/* make sure the timer is stopped */
//BIT_CLR(TIMER32(TMRCONTROL), RUN);
/* set up the clock */
//TIMER32(TMRCONTROL) &= ~(3<<SETCLK);
//TIMER32(TMRCONTROL) |= (TIMER_CLK<<SETCLK);
TIMER32(TMRCLKGEN) = (TIMER_PRES<<TCLKDIV)|(TIMER_CLK_SRC<<TCLKSRCSEL);
BIT_SET(TIMER32(TMRCLKENB), TCLKGENENB);
}
static int do_sethook(xpd_t *xpd, int pos, bool to_offhook)
{
unsigned long flags;
xbus_t *xbus;
struct FXO_priv_data *priv;
int ret = 0;
byte value;
BUG_ON(!xpd);
BUG_ON(xpd->direction == TO_PHONE); // We can SETHOOK state only on PSTN
xbus = xpd->xbus;
priv = xpd->priv;
BUG_ON(!priv);
if(priv->battery[pos] != BATTERY_ON && to_offhook) {
LINE_NOTICE(xpd, pos, "Cannot take offhook while battery is off!\n");
return -EINVAL;
}
spin_lock_irqsave(&xpd->lock, flags);
mark_ring(xpd, pos, 0, 0); // No more rings
value = REG_DAA_CONTROL1_ONHM; /* Bit 3 is for CID */
if(to_offhook)
value |= REG_DAA_CONTROL1_OH;
LINE_DBG(SIGNAL, xpd, pos, "SETHOOK: value=0x%02X %s\n", value, (to_offhook)?"OFFHOOK":"ONHOOK");
if(to_offhook)
MARK_ON(priv, pos, LED_GREEN);
else
MARK_OFF(priv, pos, LED_GREEN);
ret = DAA_DIRECT_REQUEST(xbus, xpd, pos, DAA_WRITE, REG_DAA_CONTROL1, value);
if(to_offhook) {
BIT_SET(xpd->offhook, pos);
} else {
BIT_CLR(xpd->offhook, pos);
}
if(caller_id_style != CID_STYLE_PASS_ALWAYS) {
LINE_DBG(SIGNAL, xpd, pos, "Caller-ID PCM: off\n");
BIT_CLR(xpd->cid_on, pos);
}
#ifdef WITH_METERING
priv->metering_count[pos] = 0;
priv->metering_tone_state = 0L;
DAA_DIRECT_REQUEST(xbus, xpd, pos, DAA_WRITE, DAA_REG_METERING, 0x2D);
#endif
reset_battery_readings(xpd, pos); /* unstable during hook changes */
priv->power_denial_safezone[pos] = (to_offhook) ? POWER_DENIAL_SAFEZONE : 0;
if(!to_offhook)
priv->power[pos] = POWER_UNKNOWN;
spin_unlock_irqrestore(&xpd->lock, flags);
return ret;
}
/******************************************************************
** LedsSet
*
* DESCRIPTION:
* Sets the state of the leds
*
* Create: 5/9/2006 9:37:35 PM - Trampas Stern
*******************************************************************/
INT LedsSet(UINT8 Led, UINT8 State)
{
if (Led<=7)
{
if (State)
{
BIT_CLEAR(LEDS_U18,Led);
}else
{
BIT_SET(LEDS_U18,Led);
}
}else if (Led<=14)
{
Led=Led-8;
if (State)
{
BIT_CLEAR(LEDS_U40,Led);
}else
{
BIT_SET(LEDS_U40,Led);
}
}
return LedsUpdate(); //update the LEDs
}
void putBuffer()
{
int8_t i;
BIT_SET(RF_24G_CE_PORT, RF_24G_CE_BIT);
CSDELAY();
putByte(ADDR1_1);
putByte(ADDR1_0);
for( i=0; i<BUF_MAX ; i++) {
putByte(RF_24G_Buffer[i]);
}
BIT_CLEAR(RF_24G_CE_PORT, RF_24G_CE_BIT);
BIT_CLEAR(RF_24G_CLK1_PORT, RF_24G_CLK1_BIT);
}
/******************************************************************
** flash_init
*
* DESCRIPTION:
*
* Create: 7/23/2006 10:09:14 AM - Trampas Stern
*******************************************************************/
void flash_init()
{
//Set the Chip Select pin as output
BIT_SET(FLASH_CS_DDR,FLASH_CS_BIT);
//SET Chip select high
FLASH_CS(1);
FLASH_CLK(0);
BIT_SET(FLASH_RESET_DDR,FLASH_RESET_PIN);
FLASH_RESET(0);
delay_ms(20);
FLASH_RESET(1);
//Set up the SPI port
// AT45DBxxx can handle mode 0 or mode 1 transmissions
// we will use mode zero (SCK low when idle & sample leading edge)
// SPI Interupt disabled - 0
// SPI Disabled - 0
// DORD MSB first -0
// Master - 1
// Clk Polarity - 0 SCK low when idel
// CPHA =0 sample leading edge
// ClkRate= 000 (AT90 is 16Mhz and Flash can operate at 20Mhz, no clk divide)
SPCR=0x10; //only master bit set
//configure the direction of the SPI pins
BIT_SET(DDRB,1); //SCK output
BIT_SET(DDRB,2); //MOSI output
//SET MISO to have internal pullup
BIT_SET(PORTB,3);
//Enable the SPI port
SPCR=SPCR | 0x40;
}
static void cmdNoReply(void *base)
{
node_t *node = (node_t *) base;
assert(node);
assert(node->handle >= 0);
// set our specific flag.
BIT_SET(node->data.flags, DATA_FLAG_NOREPLY);
assert(node->sysdata);
logger(node->sysdata->logging, 3,
"node:%d NOREPLY (flags:%x, mask:%x)",
node->handle, node->data.flags, node->data.mask);
}
/*
* Die in case of unrecoverable error. On LF1000, we pull the power off.
* Otherwise just lock up.
*/
static void die(void)
{
db_puts("die()\n");
#ifdef CPU_LF1000
/* enable access to Alive GPIO */
REG32(LF1000_ALIVE_BASE+ALIVEPWRGATEREG) = 1;
/* pull VDDPWRON low by resetting the flip-flop */
BIT_CLR(REG32(LF1000_ALIVE_BASE+ALIVEGPIOSETREG), VDDPWRONSET);
BIT_SET(REG32(LF1000_ALIVE_BASE+ALIVEGPIORSTREG), VDDPWRONSET);
/* reset flip-flop to latch in */
REG32(LF1000_ALIVE_BASE+ALIVEGPIOSETREG) = 0;
REG32(LF1000_ALIVE_BASE+ALIVEGPIORSTREG) = 0;
/* power should be off now... */
#endif
while(1);
}
/*
* ispccp2_vp_config - Initialize CCP2 video port interface.
* @ccp2: Pointer to ISP CCP2 device
* @vpclk_div: Video port divisor
*
* Configure the CCP2 video port with the given clock divisor. The valid divisor
* values depend on the ISP revision:
*
* - revision 1.0 and 2.0 1 to 4
* - revision 15.0 1 to 65536
*
* The exact divisor value used might differ from the requested value, as ISP
* revision 15.0 represent the divisor by 65536 divided by an integer.
*/
static void ispccp2_vp_config(struct isp_ccp2_device *ccp2,
unsigned int vpclk_div)
{
struct isp_device *isp = to_isp_device(ccp2);
u32 val;
/* ISPCCP2_CTRL Video port */
val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCP2, ISPCCP2_CTRL);
val |= ISPCCP2_CTRL_VP_ONLY_EN; /* Disable the memory write port */
if (isp->revision == ISP_REVISION_15_0) {
vpclk_div = clamp_t(unsigned int, vpclk_div, 1, 65536);
vpclk_div = min(ISPCCP2_VPCLK_FRACDIV / vpclk_div, 65535U);
BIT_SET(val, ISPCCP2_CTRL_VPCLK_DIV_SHIFT,
ISPCCP2_CTRL_VPCLK_DIV_MASK, vpclk_div);
} else {
static void cmdId(void *base, risp_int_t value)
{
node_t *node= (node_t *) base;
assert(node);
assert(value >= 0);
assert(node->handle >= 0);
BIT_SET(node->data.mask, DATA_MASK_ID);
node->data.id = value;
assert(node->sysdata);
logger(node->sysdata->logging, 3,
"node:%d ID (%d) (flags:%x, mask:%x)",
node->handle, value, node->data.flags, node->data.mask);
}
static void refresh_display(void)
{
static u8 i;
// First shift enables only one column.
shift_byte(~(0b00000001 << i));
// Second shift for column data.
shift_byte(matrix[i]);
// Pulse to move everything to output.
BIT_CLR(SHIFT_PORT, SHIFT_RCK);
BIT_SET(SHIFT_PORT, SHIFT_RCK);
// Increase i with each cycle, but don't let it get bigger than 7.
i = (i + 1) % 7;
}
uint32_t
setBusFrequency( uint32_t freq_in, uint32_t freq_out, bool bypass )
{
volatile unsigned int clkd = 0;
volatile unsigned int regVal = 0;
/* First enable the internal clocks */
if ( setInternalClock( TRUE ) )
{
return 1;
}
if ( FALSE == bypass )
{
/* Calculate and program the divisor */
clkd = freq_in / freq_out;
clkd = (clkd < 2) ? 2 : clkd;
clkd = (clkd > 1023) ? 1023 : clkd;
/* Do not cross the required freq */
while((freq_in/clkd) > freq_out)
{
if ( 1023 == clkd )
{
/* Return we we cannot set the clock freq */
return 1;
}
clkd++;
}
// NOTE: OMAP35x.pdf on page 3179 has a clock-divider of 240 which is the same as here
regVal = MMCHS_SYSCTL & ~0x0000FFC0u;
MMCHS_SYSCTL = regVal | ( clkd << 6 );
/* Wait for the interface clock stabilization */
if ( awaitInternalClockStable( 0xFF ) )
{
return 1;
}
/* Enable clock to the card */
BIT_SET( MMCHS_SYSCTL, MMCHS_SYSCTL_CEN_BIT );
}
return 0;
}
void genAb(void *boardIn, const int n1, const int n2, void *MIn){
int *board = (int *) boardIn;
unsigned long long *M = (unsigned long long *) MIn;
int i,j,k;
int Mcols = (n1*n2 + 1) / 64; if( (n1*n2 + 1) % 64 != 0 ) Mcols++;
int bPos = n1*n2;
int currentElem;
for(i=0; i<n1;i++){
for(j=0;j<n2;j++){
currentElem = i*n2+j;
if( board[i*n2+j] < 2 ){
BIT_SET( M[ currentElem*Mcols + currentElem / 64 ] , currentElem % 64 );
if( board[currentElem] == 1)
BIT_SET( M[ currentElem*Mcols + bPos / 64 ] , bPos % 64 );
}
else
continue;
for(k=j-1;k>=0;k--){
if(board[i*n2+k] < 2)
BIT_SET( M[currentElem*Mcols + (i*n2+k) / 64] , (i*n2+k) % 64 );
else
break;
}
for(k=j+1;k<n2;k++){
if(board[i*n2+k] < 2)
BIT_SET( M[currentElem*Mcols + (i*n2+k) / 64] , (i*n2+k) % 64 );
else
break;
}
for(k=i-1;k>=0;k--){
if(board[k*n2+j] < 2)
BIT_SET( M[currentElem*Mcols + (k*n2+j) / 64] , (k*n2+j) % 64 );
else
break;
}
for(k=i+1;k<n1;k++){
if(board[k*n2+j] < 2)
BIT_SET( M[currentElem*Mcols + (k*n2+j) / 64] , (k*n2+j) % 64 );
else
break;
}
}
}
}
uint8_t getByte()
{
//MSB first
int8_t i, b = 0;
for(i=0 ; i < 8 ; i++) {
BIT_CLEAR(RF_24G_CLK1_PORT, RF_24G_CLK1_BIT);
CLKDELAY();
BIT_SET(RF_24G_CLK1_PORT, RF_24G_CLK1_BIT);
CLKDELAY(); // Read before falling edge
if( BIT_TEST(RF_24G_DATA_IN_PORT, RF_24G_DATA_BIT) ) {
b|=1;
}
if(i!=7)
b<<=1;
}
return b;
}
uint32_t
resetMMCICmdLine( uint32_t retries )
{
uint32_t i = 0;
BIT_SET( MMCHS_SYSCTL, MMCHS_SYSCTL_SRC_BIT );
for ( i = retries; i > 0; --i )
{
if ( ! BIT_CHECK( MMCHS_SYSCTL, MMCHS_SYSCTL_SRC_BIT ) )
{
return 0;
}
}
return 1;
}
/* This routine should not set anything but FORM at the f2 level;
that is the job of ilem_parse */
void
lem_save_form(const char *ref, const char *lang,
const char *formstr, struct lang_context *langcon)
{
struct ilem_form *form = mb_new(lemline_xcp->sigs->mb_ilem_forms);
extern int curr_cell;
form->ref = (char*)ref;
if (lang)
{
form->f2.lang = (unsigned char*)lang;
form->f2.core = langcore_of(lang);
if (strstr(lang,"949"))
BIT_SET(form->f2.flags,F2_FLAGS_LEM_BY_NORM);
}
if (BIT_ISSET(form->f2.flags,F2_FLAGS_LEM_BY_NORM))
{
form->f2.norm = (unsigned char *)formstr;
form->f2.form = (const unsigned char *)"*";
}
else
form->f2.form = (unsigned char *)formstr;
form->file = (char*)file;
form->lnum = lnum;
form->lang = langcon;
if (!ref[0])
return;
if (!curr_lsp->forms_alloced
|| curr_lsp->forms_used == curr_lsp->forms_alloced)
{
curr_lsp->forms_alloced += 16;
curr_lsp->forms = realloc(curr_lsp->forms,
curr_lsp->forms_alloced*sizeof(struct ilem_form*));
curr_lsp->cells = realloc(curr_lsp->cells,
curr_lsp->forms_alloced*sizeof(int));
if (curr_lsp->forms_used < 0)
curr_lsp->forms_used = 0;
}
/* when curr_cell = 0 we are in a line with no cells; by definition,
all content in such a line is in cell 2 (because cell 1 is the line
number) */
curr_lsp->cells[curr_lsp->forms_used] = (curr_cell ? curr_cell : 2);
curr_lsp->forms[curr_lsp->forms_used++] = form;
hash_add(word_form_index,npool_copy((unsigned char*)ref,lemline_xcp->pool),form);
}
uint32_t
resetLines( uint32_t lines )
{
uint32_t i = 0;
BIT_SET( MMCHS_SYSCTL, lines );
for ( i = 0xFF; i > 0; --i )
{
if ( ! BIT_CHECK( MMCHS_SYSCTL, lines ) )
{
return 0;
}
}
return 1;
}
/* Send an Initial Reply to the reservation protocol. */
static void
rsrr_accept_iq(void)
{
struct rsrr_header *rsrr;
struct rsrr_vif *vif_list;
struct uvif *v;
int vifi, sendlen;
/* Check for space. There should be room for plenty of vifs,
* but we should check anyway.
*/
if (numvifs > RSRR_MAX_VIFS) {
dolog(LOG_WARNING, 0,
"Can't send RSRR Route Reply because %d is too many vifs",
numvifs);
return;
}
/* Set up message */
rsrr = (struct rsrr_header *) rsrr_send_buf;
rsrr->version = 1;
rsrr->type = RSRR_INITIAL_REPLY;
rsrr->flags = 0;
rsrr->num = numvifs;
vif_list = (struct rsrr_vif *) (rsrr_send_buf + RSRR_HEADER_LEN);
/* Include the vif list. */
for (vifi=0, v = uvifs; vifi < numvifs; vifi++, v++) {
vif_list[vifi].id = vifi;
vif_list[vifi].status = 0;
if (v->uv_flags & VIFF_DISABLED)
BIT_SET(vif_list[vifi].status,RSRR_DISABLED_BIT);
vif_list[vifi].threshold = v->uv_threshold;
vif_list[vifi].local_addr.s_addr = v->uv_lcl_addr;
}
/* Get the size. */
sendlen = RSRR_HEADER_LEN + numvifs*RSRR_VIF_LEN;
/* Send it. */
IF_DEBUG(DEBUG_RSRR)
dolog(LOG_DEBUG, 0, "Send RSRR Initial Reply");
rsrr_send(sendlen);
}
int
UpdateNetoidState(void *entry, void *andState, void *orState, void *ipp)
{
CacheTableInfo *info = (CacheTableInfo *)entry;
unsigned long state = (unsigned long)-1;
unsigned long ipaddr = (unsigned long)-1;
if (info == NULL) return 0;
if (IsSGatekeeper(&info->data))
{
// For sgatekeepers, we are not propagating any state
// now
return 0;
}
if (andState)
{
state = *(long *)andState;
info->data.stateFlags &= state;
}
if (orState)
{
state = *(long *)orState;
info->data.stateFlags |= state;
}
if (ipp)
{
ipaddr = *(long *)ipp;
if (info->data.ipaddress.l != ipaddr)
{
DeleteIedgeIpAddr(ipCache, &info->data);
info->data.ipaddress.l = ipaddr;
BIT_SET(info->data.sflags, ISSET_IPADDRESS);
AddIedgeIpAddr(ipCache, info);
}
}
return 0;
}
/*************************************************************************
* Description: Initialization for Timer
* Returns: none
* Notes: none
*************************************************************************/
static void timer2_init(
void)
{
/* Normal Operation */
TCCR2A = 0;
/* Timer2: prescale selections:
CSn2 CSn1 CSn0 Description
---- ---- ---- -----------
0 0 0 No Clock Source
0 0 1 No prescaling
0 1 0 CLKt2s/8
0 1 1 CLKt2s/32
1 0 0 CLKt2s/64
1 0 1 CLKt2s/128
1 1 0 CLKt2s/256
1 1 1 CLKt2s/1024
*/
#if (TIMER2_PRESCALER==1)
TCCR2B = _BV(CS20);
#elif (TIMER2_PRESCALER==8)
TCCR2B = _BV(CS21);
#elif (TIMER2_PRESCALER==32)
TCCR2B = _BV(CS21) | _BV(CS20);
#elif (TIMER2_PRESCALER==64)
TCCR2B = _BV(CS22);
#elif (TIMER2_PRESCALER==128)
TCCR2B = _BV(CS22) | _BV(CS20);
#elif (TIMER2_PRESCALER==256)
TCCR2B = _BV(CS22) | _BV(CS21);
#elif (TIMER2_PRESCALER==1024)
TCCR2B = _BV(CS22) | _BV(CS21) | _BV(CS20);
#else
#error Timer2 Prescale: Invalid Value
#endif
/* Clear any TOV Flag set when the timer overflowed */
BIT_CLEAR(TIFR2, TOV2);
/* Initial value */
TCNT2 = TIMER2_COUNT;
/* Enable the overflow interrupt */
BIT_SET(TIMSK2, TOIE2);
/* Clear the Power Reduction Timer/Counter0 */
BIT_CLEAR(PRR, PRTIM2);
}
void bitfile_put_bit(struct bitfile *bf, u8 bit)
{
assert(bf->mode == 'w');
assert(bit == 0 || bit == 1);
if (bit)
BIT_SET(*bf->pos, bf->bit_pos);
else
BIT_UNSET(*bf->pos, bf->bit_pos);
bf->bit_pos++;
if (bf->bit_pos > 7) {
bf->bit_pos = 0;
bf->pos++;
if (bf->pos >= bf->buffer_end) {
write_buffer(bf);
}
}
}
void ReportKeycodeAction(u8 keycode, bool add) {
u8 index;
if (IsModifier(keycode)) {
index = 0;
} else {
// Add one to skip the modifier byte.
index = 1 + (keycode / 8);
}
u8 nth_bit = (keycode % 8);
if (add)
BIT_SET(report_data[index], nth_bit);
else
BIT_CLR(report_data[index], nth_bit);
changed = true;
}
uint32_t
setInternalClock( bool enable )
{
if ( enable )
{
// await Internal clock stable
BIT_SET( MMCHS_SYSCTL, MMCHS_SYSCTL_ICE_BIT );
if ( awaitInternalClockStable( 0xFF ) )
{
return 1;
}
}
else
{
BIT_CLEAR( MMCHS_SYSCTL, MMCHS_SYSCTL_ICE_BIT );
}
return 0;
}
int skabloom_add(skabloom_t *s, void *data, size_t nbytes){
// TODO: fix the redundancy with probably_contains
int ret = skabloom_probably_contains(s, data, nbytes);
if (ret)
return ret;
skabloom_t *last = s->last_bloom;
// TODO: check if it's too full, and if it is, create a new one and assign
// all ends to that.
uint64_t hashes[s->num_hashes];
ret = generate_n_hashes(s->num_hashes, s->size, data, nbytes, hashes);
if (ret < 0)
return ret;
for (int i = 0; i < s->num_hashes; i++){
BIT_SET(last->bitmap, hashes[i]);
}
return 0;
}
static void
set_instance_fields(struct xcl_context *xc, struct ML *mlp)
{
const char *lastw = "";
int i;
static char formbuf[128], normbuf[128];
List *parts = list_create(LIST_SINGLE);
*formbuf = *normbuf = '\0';
for (i = 0; i < mlp->matches_used; ++i)
{
/* Should we be discriminating about which match
of matches[i].matches[] we are using for this? */
struct f2 *lform = mlp->matches[i].matching_f2s[0];
struct f2 *clone = mb_new(xc->sigs->mb_f2s);
/* This is a shallow clone; we only need it so we can
set the flags locally */
*clone = *lform;
list_add(parts, lform);
if (strcmp(lastw,mlp->matches[i].lp->ref))
{
if (*formbuf)
strcat(formbuf, " ");
strcat(formbuf,(char*)lform->form);
}
else
BIT_SET(lform->flags,F2_FLAGS_SAME_REF);
lastw = mlp->matches[i].lp->ref;
if (lform->norm)
{
if (*normbuf)
strcat(normbuf, " ");
strcat(normbuf,(char*)lform->norm);
}
}
mlp->matches[0].psu_form->form = (unsigned char*)formbuf;
mlp->matches[0].psu_form->norm = (unsigned char*)normbuf;
mlp->matches[0].psu_form->file = (unsigned char*)mlp->matches[0].lp->f->file;
mlp->matches[0].psu_form->lnum = mlp->matches[0].lp->f->lnum;
mlp->matches[0].psu_form->parts = (struct f2**)list2array(parts);
list_free(parts, NULL);
}
