//****************************************************************************
//
//  Function Name:  chal_lcdc_par_set_rgb888p
//
//  Description:    Enable/Disable RGB888 Packed (RGB) Mode For Legacy
//                  16-bit Interface
//
//****************************************************************************
cVoid chal_lcdc_par_set_rgb888p (CHAL_HANDLE handle, cBool enable)
{
    pCHAL_LCDC_T pDev = (pCHAL_LCDC_T) handle;

    if (enable)
        BRCM_WRITE_REG_FIELD ( pDev->baseAddr, LCDC_CR, PACKED_RGB888, (cUInt32)1 );
    else
        BRCM_WRITE_REG_FIELD ( pDev->baseAddr, LCDC_CR, PACKED_RGB888, (cUInt32)0 );
}
//****************************************************************************
//
//  Function Name:  chal_lcdc_set_te_enable
//
//  Description:    Enable|Disable Issue of TE synced RD/WR cycles
//
//****************************************************************************
cVoid chal_lcdc_set_te_enable (CHAL_HANDLE handle, cBool enable)
{
    pCHAL_LCDC_T pDev = (pCHAL_LCDC_T) handle;

    if ( enable )
        BRCM_WRITE_REG_FIELD ( pDev->baseAddr, LCDC_CR, TEVALID, (cUInt32)1 );
    else
        BRCM_WRITE_REG_FIELD ( pDev->baseAddr, LCDC_CR, TEVALID, (cUInt32)0 );
}
//****************************************************************************
//
//  Function Name:  chal_lcdc_par_set_fast_mode
//
//  Description:    Enable/Disable Fast Legacy Mode
//
//****************************************************************************
cVoid chal_lcdc_par_set_fast_mode (CHAL_HANDLE handle, cBool enable)
{
    pCHAL_LCDC_T pDev = (pCHAL_LCDC_T) handle;

    if (enable)
        BRCM_WRITE_REG_FIELD ( pDev->baseAddr, LCDC_CR, FAST_LEGACY, (cUInt32)1 );
    else
        BRCM_WRITE_REG_FIELD ( pDev->baseAddr, LCDC_CR, FAST_LEGACY, (cUInt32)0 );
}
//============================================================================
//
// Function Name: chal_audiovipath_SelectInput
//
// Description:   Select input source for voice input path
//
//============================================================================
cVoid chal_audiovipath_SelectInput(
		CHAL_HANDLE				handle,
		CHAL_AUDIO_MIC_INPUT_en input_source
		)
{
	// voice in path 1
	BRCM_WRITE_REG_FIELD( sVIPath.base, DSP_AUDIO_ADCCONTROL_R, VINPATH_SEL, 0 );
	BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_VINPATH_CTRL_R, VIN_INPUTSEL, input_source);
}
//============================================================================
//
// Function Name: chal_audiomixertap_SetWbGain
//
// Description:   Set gain in WB MIXER TAP
//
//============================================================================
cVoid chal_audiomixertap_SetWbGain(
		CHAL_HANDLE handle,
		cUInt16		left_gain_hex,
		cUInt16		right_gain_hex
		)
{
	BRCM_WRITE_REG_FIELD(sMixerTap.base, DSP_AUDIO_BTMIXER_GAIN_L_R, BTMIXER_GAIN_L, left_gain_hex);
	BRCM_WRITE_REG_FIELD(sMixerTap.base, DSP_AUDIO_BTMIXER_GAIN_R_R, BTMIXER_GAIN_R, right_gain_hex);
}
//============================================================================
//
// Function Name: chal_audiomixertap_SwapWbLeftRight
//
// Description:   Swap left and right channel in WB mixer Tap
//
//============================================================================
cVoid chal_audiomixertap_SwapWbLeftRight(
		CHAL_HANDLE handle,
		Boolean		swap
		)
{
	if(FALSE==swap)
		BRCM_WRITE_REG_FIELD( sMixerTap.base, DSP_AUDIO_BTMIXER_CFG_R, WBLRSW, 1 );  //not swap
	else
		BRCM_WRITE_REG_FIELD( sMixerTap.base, DSP_AUDIO_BTMIXER_CFG_R, WBLRSW, 0 );  //swap
}
//============================================================================
//
// Function Name: chal_audiovipath2_Enable
//
// Description:   Enable or Disable Voice Input Path 2
//
//============================================================================
cVoid chal_audiovipath2_Enable(
		CHAL_HANDLE handle,
		Boolean		enable
		)
{
	if(enable)
	{
		BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_AMCR_R, AUDEN, enable);
		//BRCM_WRITE_REG_FIELD( sVIPath.base, DSP_AUDIO_AUDIOLOOPBACK_CTRL_R, RXANA1_EN, 1 );

		BRCM_WRITE_REG_FIELD( sVIPath.base, DSP_AUDIO_ADCCONTROL_R, RXANA2_EN, 1 );
		// do we use RXANA2_EN for VI path2 or VIN_ENABLE (must)
		BRCM_WRITE_REG_FIELD( sVIPath.base, DSP_AUDIO_ADCCONTROL_R, VINPATH_SEL, 1 );
		BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_VINPATH_CTRL_R, VIN_ENABLE, 1);
		// voice in path 1. at the end recover the bit setting.
		BRCM_WRITE_REG_FIELD( sVIPath.base, DSP_AUDIO_ADCCONTROL_R, VINPATH_SEL, 0 );
	
	}
	else
	{
		//needs to be careful with this:
		//BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_AMCR_R, AUDEN, enable);

		BRCM_WRITE_REG_FIELD( sVIPath.base, DSP_AUDIO_ADCCONTROL_R, VINPATH_SEL, 1 );
		BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_VINPATH_CTRL_R, VIN_ENABLE, enable);
		BRCM_WRITE_REG_FIELD( sVIPath.base, DSP_AUDIO_ADCCONTROL_R, RXANA2_EN, 0 );
		// voice in path 1. at the end recover the bit setting.
		BRCM_WRITE_REG_FIELD( sVIPath.base, DSP_AUDIO_ADCCONTROL_R, VINPATH_SEL, 0 );
	}
	

}
//****************************************************************************
//
//  Function Name:  chal_lcdc_set_cs
//
//  Description:    Activates Chip Select For Given Bank
//
//****************************************************************************
cVoid chal_lcdc_set_cs (CHAL_HANDLE handle, cBool cs0)
{
    pCHAL_LCDC_T pDev = (pCHAL_LCDC_T) handle;

    if (cs0)
        // CS0 Bank
        BRCM_WRITE_REG_FIELD ( pDev->baseAddr, LCDC_CR, SEL_LCD, (cUInt32)0 );
    else
        // CS1 Bank
        BRCM_WRITE_REG_FIELD ( pDev->baseAddr, LCDC_CR, SEL_LCD, (cUInt32)1 );
}
//============================================================================
//
// Function Name: chal_audiomixertap_SetNbSampleRate
//
// Description:   Set sample rate in NB MIXER TAP
//
//============================================================================
cVoid chal_audiomixertap_SetNbSampleRate(
		CHAL_HANDLE				handle,
		AUDIO_SAMPLING_RATE_t	samp_rate
		)
{
	if ( samp_rate==AUDIO_SAMPLING_RATE_8000 )
		BRCM_WRITE_REG_FIELD( sMixerTap.base, DSP_AUDIO_BTMIXER_CFG2_R, BTNB_RATE, 0 );
	else
		if ( samp_rate==AUDIO_SAMPLING_RATE_16000 )
			BRCM_WRITE_REG_FIELD( sMixerTap.base, DSP_AUDIO_BTMIXER_CFG2_R, BTNB_RATE, 1 );	
}
//*****************************************************************************
//
// Function Name: chal_lcdc_par_set_ce
//
// Description:   Enable|Disable 565 To 666 Color Expansion
//                For Data Written To LCDC_DATR In Z80/M68 Bus Mode
//
//*****************************************************************************
cVoid chal_lcdc_par_set_ce (CHAL_HANDLE handle, cBool enable)
{
    pCHAL_LCDC_T pDev = (pCHAL_LCDC_T) handle;

    if (enable)
        // Color Expansion (RGB565 to RGB666) ON,  18-bit LCD bus
        BRCM_WRITE_REG_FIELD ( pDev->baseAddr, LCDC_CR, CE, (cUInt32)1 );
    else
        // Color Expansion (RGB565 to RGB666) OFF
        BRCM_WRITE_REG_FIELD ( pDev->baseAddr, LCDC_CR, CE, (cUInt32)0 );
}
//*****************************************************************************
//
// Function Name: chal_lcdc_set_dma
//
// Description:   Enables|Disables Controller DMA Interface
//
//*****************************************************************************
cVoid chal_lcdc_set_dma ( CHAL_HANDLE handle, cBool enable )
{
    pCHAL_LCDC_T pDev = (pCHAL_LCDC_T) handle;

    if (enable)
        // Enable core DMA interface
        BRCM_WRITE_REG_FIELD ( pDev->baseAddr, LCDC_CR, DMA, (cUInt32)1 );
    else
        // Disable core DMA interface
        BRCM_WRITE_REG_FIELD ( pDev->baseAddr, LCDC_CR, DMA, (cUInt32)0 );
}
//============================================================================
//
// Function Name: chal_audiovipath2_SelectInput
//
// Description:   Select input source for voice input path 2
//
//============================================================================
cVoid chal_audiovipath2_SelectInput(
		CHAL_HANDLE				handle,
		CHAL_AUDIO_MIC_INPUT_en input_source
		)
{
	// voice in path 2
	BRCM_WRITE_REG_FIELD( sVIPath.base, DSP_AUDIO_ADCCONTROL_R, VINPATH_SEL, 1 );
	BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_VINPATH_CTRL_R, VIN_INPUTSEL, input_source);

	// voice in path 1. at the end recover the bit setting.
	BRCM_WRITE_REG_FIELD( sVIPath.base, DSP_AUDIO_ADCCONTROL_R, VINPATH_SEL, 0 );
}
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//============================================================================
//
// Function Name: chal_audioaopath_SetFifoThres
//
// Description:   Set FIFO threshold in Audio Output Path
//
//============================================================================
cVoid chal_audioaopath_SetFifoThres(
		CHAL_HANDLE handle,
		cUInt16		out_thres,
		cUInt16		in_thres
		)
{
	//chal_audio_aopath_t * dev = (chal_audio_aopath_t *) handle;
	//input FIFO threshold 
	BRCM_WRITE_REG_FIELD(sAOPath.base, DSP_AUDIO_AFIFOCTRL_R, AIFIFOTHRES1, in_thres);
	//output FIFO threshold
	BRCM_WRITE_REG_FIELD(sAOPath.base, DSP_AUDIO_AFIFOCTRL_R, AOFIFOTHRES0, out_thres);
}
//****************************************************************************
//
//  Function Name:  chal_lcdc_set_te_cfg
//
//  Description:    Configures Controller TE Sync Settings
//
//****************************************************************************
cVoid chal_lcdc_set_te_cfg ( CHAL_HANDLE handle, pCHAL_LCDC_TE_CFG teCfg )
{
    pCHAL_LCDC_T pDev = (pCHAL_LCDC_T) handle;

    if ( teCfg->edge == TE_EDGE_POS )
        BRCM_WRITE_REG_FIELD ( pDev->baseAddr, LCDC_CR, EDGE_SEL, (cUInt32)1 );
    else if ( teCfg->edge == TE_EDGE_NEG )
        BRCM_WRITE_REG_FIELD ( pDev->baseAddr, LCDC_CR, EDGE_SEL, (cUInt32)0 );

    BRCM_WRITE_REG_FIELD ( pDev->baseAddr, LCDC_TEDELAY, DELAY_COUNT,
        teCfg->delay_ahb_clks );
}
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//============================================================================
//
// Function Name: chal_audioaopath_DisableAudInt
//
// Description:   Disable audio interrupt in Audio Output Path
//
//============================================================================
cVoid chal_audioaopath_DisableAudInt(
		CHAL_HANDLE handle,
		Boolean		disable
		)
{
	//chal_audio_aopath_t * dev = (chal_audio_aopath_t *) handle;
	
	/** 0: no action
	1: disable the audio interrupt
	**/
	if(FALSE == disable)
		BRCM_WRITE_REG_FIELD(sAOPath.base, DSP_AUDIO_STEREOAUDMOD_R, AUDINTDIS, 0);
	else
		BRCM_WRITE_REG_FIELD(sAOPath.base, DSP_AUDIO_STEREOAUDMOD_R, AUDINTDIS, 1);
}
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//============================================================================
//
// Function Name: chal_audioaopath_SetI2SMode
//
// Description:   Enable or Disable I2S_Mode in Audio Output Path
//
//============================================================================
cVoid chal_audioaopath_SetI2SMode(
		CHAL_HANDLE handle,
		Boolean		enable
		)
{
	//chal_audio_aopath_t * dev = (chal_audio_aopath_t *) handle;
	/**
	0: the audio path take data from DSP/ARM
	1: the audio path is driven by I2S direct path
	**/
	if(FALSE==enable)
		BRCM_WRITE_REG_FIELD(sAOPath.base, DSP_AUDIO_STEREOAUDMOD_R, I2SMODE, 0);
	else
		BRCM_WRITE_REG_FIELD(sAOPath.base, DSP_AUDIO_STEREOAUDMOD_R, I2SMODE, 1);
}
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//============================================================================
//
// Function Name: chal_audioaopath_EnableDMA
//
// Description:   Enable DMA in Audio Output Path
//
//============================================================================
cVoid chal_audioaopath_EnableDMA(
		CHAL_HANDLE handle, 
		Boolean		enable 
		)
{
	//chal_audio_aopath_t * dev = (chal_audio_aopath_t *) handle;
	
	if (enable==TRUE)
		BRCM_WRITE_REG_FIELD(sAOPath.base, DSP_AUDIO_STEREOAUDMOD_R, AUD_OUT_DMA_EN, 1);
	else
		BRCM_WRITE_REG_FIELD(sAOPath.base, DSP_AUDIO_STEREOAUDMOD_R, AUD_OUT_DMA_EN, 0);

	Log_DebugPrintf(LOGID_SOC_AUDIO_DETAIL, "chal_audio_aopath_dma_enable: base = 0x%x, enable = 0x%x\n", sAOPath.base, enable);

}
//============================================================================
//
// Function Name: chal_audiomixertap_SelectInput
//
// Description:   Select input source for mixer tap input
//
//============================================================================
cVoid chal_audiomixertap_SelectInput(
		CHAL_HANDLE				handle,
		CHAL_AUDIO_MIXER_TAP_en tap,
		CHAL_AUDIO_MIXER_en		input_source
		)
{
	Log_DebugPrintf(LOGID_SOC_AUDIO_DETAIL, "chal_audiomixertap_SelectInput: tap = 0x%x, input_source = 0x%x", tap, input_source );

	BRCM_WRITE_REG_FIELD( sMixerTap.base, DSP_AUDIO_BTMIXER_CFG2_R, PATH_SEL, tap );
	BRCM_WRITE_REG_FIELD( sMixerTap.base, DSP_AUDIO_BTMIXER_CFG2_R, PATH_SOURCE, input_source );
	/**
	*(volatile DSP_AUDIO_BTMIXER_CFG2_R_TYPE *) ( sMixerTap.base + DSP_AUDIO_BTMIXER_CFG2_R_OFFSET )
		|=    (tap << DSP_AUDIO_BTMIXER_CFG2_R_PATH_SEL_SHIFT)
			+ (input_source << DSP_AUDIO_BTMIXER_CFG2_R_PATH_SOURCE_SHIFT);
	*/
}
//============================================================================
//
// Function Name: chal_audiomixertap_SetNbFifoThres
//
// Description:   Set FIFO threshold in NB MIXER TAP
//
//============================================================================
cVoid chal_audiomixertap_SetNbFifoThres(
		CHAL_HANDLE handle,
		cUInt16		thres
		)
{
	BRCM_WRITE_REG_FIELD( sMixerTap.base, DSP_AUDIO_VOICEFIFO_THRES_R, BTNBFIFO_THRES, thres );
}
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/*
 *
 *  Function Name:  chal_dsi_tx_start
 *
 *  Description:    ENABLE | DISABLE  Command Interface
 *
 */
cVoid chal_dsi_tx_start(CHAL_HANDLE handle, cUInt8 txEng, cBool start)
{
    struct CHAL_DSI *pDev = (struct CHAL_DSI *)handle;

    if (start)
        if (txEng)
            BRCM_WRITE_REG_FIELD(pDev->baseAddr, DSI1_TXPKT2_C,
                                 CMD_EN, 1);
        else
            BRCM_WRITE_REG_FIELD(pDev->baseAddr, DSI1_TXPKT1_C,
                                 CMD_EN, 1);
    else if (txEng)
        BRCM_WRITE_REG_FIELD(pDev->baseAddr, DSI1_TXPKT2_C, CMD_EN, 0);
    else
        BRCM_WRITE_REG_FIELD(pDev->baseAddr, DSI1_TXPKT1_C, CMD_EN, 0);
}
//============================================================================
//
// Function Name: chal_audiomixertap_SetWbFifoThres
//
// Description:   Set FIFO threshold in WB MIXER TAP
//
//============================================================================
cVoid chal_audiomixertap_SetWbFifoThres(
		CHAL_HANDLE handle,
		cUInt16		thres
		)
{
	BRCM_WRITE_REG_FIELD( sMixerTap.base, DSP_AUDIO_BTMIXER_CFG_R, BTMIXER_WBFIFOTHRES, thres );
}
//============================================================================
//
// Function Name: chal_audiomixertap_EnableWbDma
//
// Description:   Enable DMA in WB mixer Tap
//
//============================================================================
cVoid chal_audiomixertap_EnableWbDma(
		CHAL_HANDLE handle,
		Boolean		enable
		)
{
	Log_DebugPrintf(LOGID_SOC_AUDIO_DETAIL, "chal_audiomixertap_EnableWbDma" );
	BRCM_WRITE_REG_FIELD( sMixerTap.base, DSP_AUDIO_BTMIXER_CFG_R, BTMIXER_DMA_EN, enable );
}
//============================================================================
//
// Function Name: chal_audiomixertap_EnableNb
//
// Description:   Enable or Disable NB MIXER TAP
//
//============================================================================
cVoid chal_audiomixertap_EnableNb(
		CHAL_HANDLE handle,
		Boolean		enable
		)
{
	Log_DebugPrintf(LOGID_SOC_AUDIO_DETAIL, "chal_audiomixertap_EnableNb: enable = %d", enable );
	BRCM_WRITE_REG_FIELD( sMixerTap.base, DSP_AUDIO_BTMIXER_CFG2_R, BTNB_ENABLE, enable );
}
Exemple #24
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//============================================================================
//
// Function Name: chal_audioaopath_Init
//
// Description:   Standard Init entry point for audio output path driver
//
//============================================================================
CHAL_HANDLE chal_audioaopath_Init(cUInt32 baseAddr)
{
    if (sAOPath.inited == 0) 
    {
        sAOPath.base = baseAddr;
		sAOPath.inited = 1;
        BRCM_WRITE_REG_FIELD(sAOPath.base, DSP_AUDIO_ALRCH_R, ALCHMOD, 2); // L_out = L_in
		BRCM_WRITE_REG_FIELD(sAOPath.base, DSP_AUDIO_ALRCH_R, ARCHMOD, 2); // R_out = R_in
		
		return (CHAL_HANDLE)&sAOPath;
    }
    else
    {
        // Don't re-initialize a block
        return (CHAL_HANDLE) 0;
    }
}
Exemple #25
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//============================================================================
//
// Function Name: chal_audioaopath_ClrFifo
//
// Description:   Clear FIFO in Audio Output Path
//
//============================================================================
cVoid chal_audioaopath_ClrFifo(CHAL_HANDLE handle)
{
	//chal_audio_aopath_t * dev = (chal_audio_aopath_t *) handle;
	/**
	0: do nothing
	1: clear OUTPUT FIFO ( has to set back to 0 after clear the FIFO) (Type: R/W)
	**/
	BRCM_WRITE_REG_FIELD(sAOPath.base, DSP_AUDIO_AFIFOCTRL_R, AOFIFOCRL0, 1);
	BRCM_WRITE_REG_FIELD(sAOPath.base, DSP_AUDIO_AFIFOCTRL_R, AOFIFOCRL0, 0);

	/**
	0: do nothing
	1: clear INPUT FIFO ( has to set back to 0 after clear the FIFO); need at least two audio clock for FIFO clear (Type: R/W)
	**/
	BRCM_WRITE_REG_FIELD(sAOPath.base, DSP_AUDIO_AFIFOCTRL_R, AIFIFOCRL1, 1);
	BRCM_WRITE_REG_FIELD(sAOPath.base, DSP_AUDIO_AFIFOCTRL_R, AIFIFOCRL1, 0);
}
//============================================================================
//
// Function Name: chal_audiomixertap_DisableWbAudInt
//
// Description:   Disable audio interrupt in WB mixer Tap
//
//============================================================================
cVoid chal_audiomixertap_DisableWbAudInt(
		CHAL_HANDLE handle,
		Boolean		disable
		)
{
	Log_DebugPrintf(LOGID_SOC_AUDIO_DETAIL, "chal_audiomixertap_DisableWbAudInt" );
	BRCM_WRITE_REG_FIELD( sMixerTap.base, DSP_AUDIO_BTMIXER_CFG_R, BTMIXER_WBINTDIS, disable );
}
//============================================================================
//
// Function Name: chal_audiovipath_SetSampleRate
//
// Description:   Set voice input sample rate
//  same as chal_audiovopath_SetSampleRate( ).
//============================================================================
cVoid chal_audiovipath_SetSampleRate(
		CHAL_HANDLE				handle,
		AUDIO_SAMPLING_RATE_t	samp_rate
		)
{
	if(AUDIO_SAMPLING_RATE_8000 == samp_rate )
	{
		BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_AMCR_R, MODE_16K, 0);
		BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_ADCCONTROL_R, VINPATH2_16K_MODE_SEL, 0);
	}
	else
	if(AUDIO_SAMPLING_RATE_16000 == samp_rate )
	{
		BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_AMCR_R, MODE_16K, 1);
		BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_ADCCONTROL_R, VINPATH2_16K_MODE_SEL, 1);
	}
}
//============================================================================
//
// Function Name: chal_audiovipath_CfgIIRCoeff
//
// Description:   configure IIR filter coefficients in Voice Output Path
// 
//============================================================================
cVoid chal_audiovipath_CfgIIRCoeff(
		CHAL_HANDLE		handle,
		const UInt16	*coeff
		)
{
	UInt16 i = 0;
/**
DSP_AUDIO_AMCR[7],  DSP_AUDIO_ADCCONTROL[8]
0x               dac voice out (read-write)
10               adc voice in channel 1 (read-write)
11               adc voice in channel 2 (write-only)
*/
	BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_AMCR_R, CRAMSEL, 1);  //select ADC coeff RAM
	  // 0: when program , it applies to the  voice in left channel
	BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_ADCCONTROL_R, VINPATH_IIRCM_SEL, 0);
	  //ADC IIR Data Loading
	for ( i=0; i<NUM_OF_ADC_VOICE_COEFF; i++) {
		BRCM_WRITE_REG_FIELD( (sVIPath.base + 2*i), DSP_AUDIO_VCOEFR0_R, VOICEIIRCOEF, coeff[i] );
	}

	BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_AMCR_R, CRAMSEL, 1);  //select ADC coeff RAM
	  // - Write IIR coefficients to Voice Path 2 filter using
	  // 1: when program , it applies to the voice in right channel
	BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_ADCCONTROL_R, VINPATH_IIRCM_SEL, 1);
	  //ADC IIR Data Loading
	for ( i=0; i<NUM_OF_ADC_VOICE_COEFF; i++) {
		BRCM_WRITE_REG_FIELD( (sVIPath.base + 2*i), DSP_AUDIO_VCOEFR0_R, VOICEIIRCOEF, coeff[i] );
	}

	  // recover the default setting in this bit.
	BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_ADCCONTROL_R, VINPATH_IIRCM_SEL, 0);
}
//============================================================================
//
// Function Name: chal_audiovipath_Enable
//
// Description:   Enable or Disable Voice Input Path 1
//
//============================================================================
cVoid chal_audiovipath_Enable(
		CHAL_HANDLE handle,
		Boolean		enable
		)
{
	//same as chal_audio_vopath_enable( )
    //note: when ANACR1[7]==1, AMCR[5] only controls digital HW.
    if(enable)
    {
	BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_AMCR_R, AUDEN, enable);
	BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_VINPATH_CTRL_R, VIN_ENABLE, enable);
}
    else
    {
        BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_VINPATH_CTRL_R, VIN_ENABLE, enable);
        BRCM_WRITE_REG_FIELD(sVIPath.base, DSP_AUDIO_AMCR_R, AUDEN, enable);
    }
}
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//============================================================================
//
// Function Name: chal_audioaopath_SelectFilter
//
// Description:   Select Audio Output Path Filter
//
//============================================================================
cVoid chal_audioaopath_SelectFilter(
		CHAL_HANDLE					handle,
		CHAL_AUDIO_FILTER_TYPE_en	filter_select
		)
{
	//chal_audio_aopath_t * dev = (chal_audio_aopath_t *) handle;
	/** 
	0: FIR compensation filter selected for audio path
	1: IIR compensation filter selected for audio path (Type: R/W)
	**/
	if( filter_select == CHAL_AUDIO_FIR)
		BRCM_WRITE_REG_FIELD(sAOPath.base, DSP_AUDIO_STEREOAUDMOD_R, ACOMPMOD, 0);
	else
		if( filter_select == CHAL_AUDIO_IIR)
			BRCM_WRITE_REG_FIELD(sAOPath.base, DSP_AUDIO_STEREOAUDMOD_R, ACOMPMOD, 1);
		else
			return;
	
}