void BX_CPP_AttrRegparmN(1) BX_CPU_C::SUB_EwIwR(bxInstruction_c *i)
{
Bit16u op1_16, op2_16 = i->Iw(), diff_16;
op1_16 = BX_READ_16BIT_REG(i->rm());
diff_16 = op1_16 - op2_16;
BX_WRITE_16BIT_REG(i->rm(), diff_16);
SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMOVP_GwEwR(bxInstruction_c *i)
{
#if BX_CPU_LEVEL >= 6
if (get_PF())
BX_WRITE_16BIT_REG(i->nnn(), BX_READ_16BIT_REG(i->rm()));
#else
BX_INFO(("CMOVP_GwEw: --enable-cpu-level=6 required"));
UndefinedOpcode(i);
#endif
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EwGwR(bxInstruction_c *i)
{
Bit16u op1_16, op2_16;
#if BX_DEBUGGER
// Note for mortals: the instruction to trigger this is "xchgw %bx,%bx"
if (bx_dbg.magic_break_enabled && (i->nnn() == 3) && (i->rm() == 3))
{
BX_CPU_THIS_PTR magic_break = 1;
return;
}
#endif
op1_16 = BX_READ_16BIT_REG(i->rm());
op2_16 = BX_READ_16BIT_REG(i->nnn());
BX_WRITE_16BIT_REG(i->nnn(), op1_16);
BX_WRITE_16BIT_REG(i->rm(), op2_16);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EwIwR(bxInstruction_c *i)
{
Bit32u op1_16 = BX_READ_16BIT_REG(i->rm());
Bit32u op2_16 = i->Iw();
Bit32u diff_16 = op1_16 - op2_16;
SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
BX_NEXT_INSTR(i);
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EwIwR(bxInstruction_c *i)
{
Bit16u op1_16, op2_16 = i->Iw(), sum_16;
op1_16 = BX_READ_16BIT_REG(i->rm());
sum_16 = op1_16 + op2_16;
BX_WRITE_16BIT_REG(i->rm(), sum_16);
SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::NEG_EwR(bxInstruction_c *i)
{
Bit32u op1_16 = BX_READ_16BIT_REG(i->rm());
op1_16 = 0 - (Bit32s)(Bit16s)(op1_16);
BX_WRITE_16BIT_REG(i->rm(), op1_16);
SET_FLAGS_OSZAPC_SUB_16(0, 0 - op1_16, op1_16);
BX_NEXT_INSTR(i);
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_EwIwR(bxInstruction_c *i)
{
bx_bool temp_CF = getB_CF();
Bit16u op1_16, op2_16 = i->Iw(), diff_16;
op1_16 = BX_READ_16BIT_REG(i->rm());
diff_16 = op1_16 - (op2_16 + temp_CF);
BX_WRITE_16BIT_REG(i->rm(), diff_16);
SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_LF_INSTR_SUB_SBB16(temp_CF));
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EwIwR(bxInstruction_c *i)
{
bx_bool temp_CF = getB_CF();
Bit16u op1_16, op2_16 = i->Iw(), sum_16;
op1_16 = BX_READ_16BIT_REG(i->rm());
sum_16 = op1_16 + op2_16 + temp_CF;
BX_WRITE_16BIT_REG(i->rm(), sum_16);
SET_FLAGS_OSZAPC_16(op1_16, op2_16, sum_16, BX_LF_INSTR_ADD_ADC16(temp_CF));
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EwIwR(bxInstruction_c *i)
{
Bit32u op1_16 = BX_READ_16BIT_REG(i->rm());
Bit32u op2_16 = i->Iw();
Bit32u sum_16 = op1_16 + op2_16;
BX_WRITE_16BIT_REG(i->rm(), sum_16);
SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16);
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_EwGwM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit32u op1_16 = read_virtual_word(i->seg(), eaddr);
Bit32u op2_16 = BX_READ_16BIT_REG(i->nnn());
Bit32u diff_16 = op1_16 - op2_16;
SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
BX_NEXT_INSTR(i);
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMP_GwEwM(bxInstruction_c *i)
{
Bit16u op1_16, op2_16, diff_16;
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_16 = BX_READ_16BIT_REG(i->nnn());
op2_16 = read_virtual_word(i->seg(), RMAddr(i));
diff_16 = op1_16 - op2_16;
SET_FLAGS_OSZAPC_SUB_16(op1_16, op2_16, diff_16);
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_EwGwM(bxInstruction_c *i)
{
Bit16u op1_16, op2_16;
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_16 = read_RMW_virtual_word(i->seg(), RMAddr(i));
op2_16 = BX_READ_16BIT_REG(i->nnn());
write_RMW_virtual_word(op2_16);
BX_WRITE_16BIT_REG(i->nnn(), op1_16);
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::ADD_EwGwM(bxInstruction_c *i)
{
Bit16u op1_16, op2_16, sum_16;
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_16 = read_RMW_virtual_word(i->seg(), RMAddr(i));
op2_16 = BX_READ_16BIT_REG(i->nnn());
sum_16 = op1_16 + op2_16;
write_RMW_virtual_word(sum_16);
SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16);
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EwGwM(bxInstruction_c *i)
{
Bit16u op1_16, op2_16, sum_16;
bx_bool temp_CF = getB_CF();
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_16 = read_RMW_virtual_word(i->seg(), RMAddr(i));
op2_16 = BX_READ_16BIT_REG(i->nnn());
sum_16 = op1_16 + op2_16 + temp_CF;
write_RMW_virtual_word(sum_16);
SET_FLAGS_OSZAPC_16(op1_16, op2_16, sum_16, BX_LF_INSTR_ADD_ADC16(temp_CF));
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XADD_EwGwR(bxInstruction_c *i)
{
/* XADD dst(r/m), src(r)
* temp <-- src + dst | sum = op2 + op1
* src <-- dst | op2 = op1
* dst <-- tmp | op1 = sum
*/
Bit32u op1_16 = BX_READ_16BIT_REG(i->rm());
Bit32u op2_16 = BX_READ_16BIT_REG(i->nnn());
Bit32u sum_16 = op1_16 + op2_16;
// and write destination into source
// Note: if both op1 & op2 are registers, the last one written
// should be the sum, as op1 & op2 may be the same register.
// For example: XADD AL, AL
BX_WRITE_16BIT_REG(i->nnn(), op1_16);
BX_WRITE_16BIT_REG(i->rm(), sum_16);
SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16);
BX_NEXT_INSTR(i);
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::SBB_GwEwM(bxInstruction_c *i)
{
Bit16u op1_16, op2_16, diff_16;
bx_bool temp_CF = getB_CF();
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
op1_16 = BX_READ_16BIT_REG(i->nnn());
op2_16 = read_virtual_word(i->seg(), RMAddr(i));
diff_16 = op1_16 - (op2_16 + temp_CF);
BX_WRITE_16BIT_REG(i->nnn(), diff_16);
SET_FLAGS_OSZAPC_16(op1_16, op2_16, diff_16, BX_LF_INSTR_SUB_SBB16(temp_CF));
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG_EwGwR(bxInstruction_c *i)
{
#if BX_CPU_LEVEL >= 4
Bit16u op1_16, op2_16, diff_16;
op1_16 = BX_READ_16BIT_REG(i->rm());
diff_16 = AX - op1_16;
SET_FLAGS_OSZAPC_SUB_16(AX, op1_16, diff_16);
if (diff_16 == 0) { // if accumulator == dest
// dest <-- src
op2_16 = BX_READ_16BIT_REG(i->nnn());
BX_WRITE_16BIT_REG(i->rm(), op2_16);
}
else {
// accumulator <-- dest
AX = op1_16;
}
#else
BX_INFO(("CMPXCHG_EwGw: not supported for cpu-level <= 3"));
UndefinedOpcode(i);
#endif
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::ADC_EwGwM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit32u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
Bit32u op2_16 = BX_READ_16BIT_REG(i->nnn());
Bit32u sum_16 = op1_16 + op2_16 + getB_CF();
write_RMW_virtual_word(sum_16);
SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16);
BX_NEXT_INSTR(i);
}
void BX_CPU_C::MOVSX_GdEw(bxInstruction_c *i)
{
Bit16u op2_16;
if (i->modC0()) {
op2_16 = BX_READ_16BIT_REG(i->rm());
}
else {
/* pointer, segment address pair */
read_virtual_word(i->seg(), RMAddr(i), &op2_16);
}
/* sign extend word op2 into dword op1 */
BX_WRITE_32BIT_REGZ(i->nnn(), (Bit16s) op2_16);
}
void
bx_cpu_c::PUSH_Ew(BxInstruction_t *i)
{
Bit16u op1_16;
/* op1_16 is a register or memory reference */
if (i->mod == 0xc0) {
op1_16 = BX_READ_16BIT_REG(i->rm);
}
else {
/* pointer, segment address pair */
read_virtual_word(i->seg, i->rm_addr, &op1_16);
}
push_16(op1_16);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::CMPXCHG_EwGwM(bxInstruction_c *i)
{
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit16u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
Bit16u diff_16 = AX - op1_16;
SET_FLAGS_OSZAPC_SUB_16(AX, op1_16, diff_16);
if (diff_16 == 0) { // if accumulator == dest
// dest <-- src
write_RMW_virtual_word(BX_READ_16BIT_REG(i->nnn()));
}
else {
// accumulator <-- dest
AX = op1_16;
}
BX_NEXT_INSTR(i);
}
BX_INSF_TYPE BX_CPP_AttrRegparmN(1) BX_CPU_C::XADD_EwGwM(bxInstruction_c *i)
{
/* XADD dst(r/m), src(r)
* temp <-- src + dst | sum = op2 + op1
* src <-- dst | op2 = op1
* dst <-- tmp | op1 = sum
*/
bx_address eaddr = BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
Bit32u op1_16 = read_RMW_virtual_word(i->seg(), eaddr);
Bit32u op2_16 = BX_READ_16BIT_REG(i->nnn());
Bit32u sum_16 = op1_16 + op2_16;
write_RMW_virtual_word(sum_16);
/* and write destination into source */
BX_WRITE_16BIT_REG(i->nnn(), op1_16);
SET_FLAGS_OSZAPC_ADD_16(op1_16, op2_16, sum_16);
BX_NEXT_INSTR(i);
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_GwEwR(bxInstruction_c *i)
{
BX_WRITE_16BIT_REG(i->nnn(), BX_READ_16BIT_REG(i->rm()));
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::DEC_RX(bxInstruction_c *i)
{
Bit16u rx = --BX_READ_16BIT_REG(i->opcodeReg());
SET_FLAGS_OSZAPC_DEC_16(rx);
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::MOV_EwGwM(bxInstruction_c *i)
{
BX_CPU_CALL_METHODR(i->ResolveModrm, (i));
write_virtual_word(i->seg(), RMAddr(i), BX_READ_16BIT_REG(i->nnn()));
}
void BX_CPP_AttrRegparmN(1) BX_CPU_C::XCHG_RXAX(bxInstruction_c *i)
{
Bit16u temp16 = AX;
AX = BX_READ_16BIT_REG(i->opcodeReg());
BX_WRITE_16BIT_REG(i->opcodeReg(), temp16);
}
BX_CPU_C::BxResolve16BaseIndex(bxInstruction_c *i)
{
return (Bit16u) (BX_READ_16BIT_REG(i->sibBase()) + BX_READ_16BIT_REG(i->sibIndex()) + i->displ16s());
}