int8_t connect(uint8_t sn, uint8_t * addr, uint16_t port) { CHECK_SOCKNUM(); CHECK_SOCKMODE(Sn_MR_TCP); CHECK_SOCKINIT(); if( *((uint32_t*)addr) == 0xFFFFFFFF || *((uint32_t*)addr) == 0) return SOCKERR_IPINVALID; if(port == 0) return SOCKERR_PORTZERO; setSn_DIPR(sn,addr); setSn_DPORT(sn,port); #if _WIZCHIP_ == 5200 // for W5200 ARP errata setSUBR(0); #endif setSn_CR(sn,Sn_CR_CONNECT); while(getSn_CR(sn) && !jspIsInterrupted()); if(sock_io_mode & (1<<sn)) return SOCK_BUSY; while(getSn_SR(sn) != SOCK_ESTABLISHED) { if (jspIsInterrupted()) return SOCKERR_TIMEOUT; if (getSn_IR(sn) & Sn_IR_TIMEOUT) { setSn_IR(sn, Sn_IR_TIMEOUT); #if _WIZCHIP_ == 5200 // for W5200 ARP errata setSUBR((uint8_t*)"\x00\x00\x00\x00"); #endif return SOCKERR_TIMEOUT; } } #if _WIZCHIP_ == 5200 // for W5200 ARP errata setSUBR((uint8_t*)"\x00\x00\x00\x00"); #endif return SOCK_OK; }
int8_t WIZCHIP_EXPORT(connect)(uint8_t sn, uint8_t * addr, uint16_t port) { CHECK_SOCKNUM(); CHECK_SOCKMODE(Sn_MR_TCP); CHECK_SOCKINIT(); //M20140501 : For avoiding fatal error on memory align mismatched //if( *((uint32_t*)addr) == 0xFFFFFFFF || *((uint32_t*)addr) == 0) return SOCKERR_IPINVALID; { uint32_t taddr; taddr = ((uint32_t)addr[0] & 0x000000FF); taddr = (taddr << 8) + ((uint32_t)addr[1] & 0x000000FF); taddr = (taddr << 8) + ((uint32_t)addr[2] & 0x000000FF); taddr = (taddr << 8) + ((uint32_t)addr[3] & 0x000000FF); if (taddr == 0xFFFFFFFF || taddr == 0) return SOCKERR_IPINVALID; } // if(port == 0) return SOCKERR_PORTZERO; setSn_DIPR(sn,addr); setSn_DPORT(sn,port); #if _WIZCHIP_ == 5200 // for W5200 ARP errata setSUBR(wizchip_getsubn()); #endif setSn_CR(sn,Sn_CR_CONNECT); while(getSn_CR(sn)); if(sock_io_mode & (1<<sn)) return SOCK_BUSY; while(getSn_SR(sn) != SOCK_ESTABLISHED) { if (getSn_SR(sn) == SOCK_CLOSED) { #if _WIZCHIP_ == 5200 // for W5200 ARP errata setSUBR((uint8_t*)"\x00\x00\x00\x00"); #endif return SOCKERR_SOCKCLOSED; } if (getSn_IR(sn) & Sn_IR_TIMEOUT) { setSn_IR(sn, Sn_IR_TIMEOUT); #if _WIZCHIP_ == 5200 // for W5200 ARP errata setSUBR((uint8_t*)"\x00\x00\x00\x00"); #endif return SOCKERR_TIMEOUT; } MICROPY_THREAD_YIELD(); } #if _WIZCHIP_ == 5200 // for W5200 ARP errata setSUBR((uint8_t*)"\x00\x00\x00\x00"); #endif return SOCK_OK; }
int8_t listen(uint8_t sn) { CHECK_SOCKNUM(); CHECK_SOCKMODE(Sn_MR_TCP); CHECK_SOCKINIT(); setSn_CR(sn,Sn_CR_LISTEN); while(getSn_CR(sn)); while(getSn_SR(sn) != SOCK_LISTEN) { close(sn); return SOCKERR_SOCKCLOSED; } return SOCK_OK; }
int8_t WIZCHIP_EXPORT(listen)(uint8_t sn) { CHECK_SOCKNUM(); CHECK_SOCKMODE(Sn_MR_TCP); CHECK_SOCKINIT(); setSn_CR(sn,Sn_CR_LISTEN); while(getSn_CR(sn)); while(getSn_SR(sn) != SOCK_LISTEN) { if(getSn_CR(sn) == SOCK_CLOSED) { WIZCHIP_EXPORT(close)(sn); return SOCKERR_SOCKCLOSED; } } return SOCK_OK; }
int8_t connect(uint8_t sn, uint8_t * addr, uint16_t port) { CHECK_SOCKNUM(); CHECK_SOCKMODE(Sn_MR_TCP); CHECK_SOCKINIT(); //M20140501 : For avoiding fatal error on memory align mismatched //if( *((uint32_t*)addr) == 0xFFFFFFFF || *((uint32_t*)addr) == 0) return SOCKERR_IPINVALID; { uint32_t taddr; taddr = ((uint32_t)addr[0] & 0x000000FF); taddr = (taddr << 8) + ((uint32_t)addr[1] & 0x000000FF); taddr = (taddr << 8) + ((uint32_t)addr[2] & 0x000000FF); taddr = (taddr << 8) + ((uint32_t)addr[3] & 0x000000FF); if( taddr == 0xFFFFFFFF || taddr == 0) return SOCKERR_IPINVALID; } // if(port == 0) return SOCKERR_PORTZERO; setSn_DIPR(sn,addr); setSn_DPORT(sn,port); setSn_CR(sn,Sn_CR_CONNECT); while(getSn_CR(sn)); if(sock_io_mode & (1<<sn)) return SOCK_BUSY; while(getSn_SR(sn) != SOCK_ESTABLISHED) { if (getSn_IR(sn) & Sn_IR_TIMEOUT) { setSn_IR(sn, Sn_IR_TIMEOUT); return SOCKERR_TIMEOUT; } if (getSn_SR(sn) == SOCK_CLOSED) { return SOCKERR_SOCKCLOSED; } } return SOCK_OK; }