/*
* I2C_Send(byte *data,word size)
*/
byte I2CSend(byte *data,word size)
{
if (0 == size)
{
return ERROR_NONE;
}
// If the chip says busy, or we think we are busy or we are reading
if((IIC1S_BUSY)||(I2C_Status & CHAN_BUSY)||(ReadBufferSize))
{
return ERROR_BUSBUSY;
}
CLI();
IIC1C1_TX = 1;
pWritePointer = data;
WriteBufferSize = size;
I2C_Status |= CHAN_BUSY;
if(IIC1C1_MST)
{
// If we are already in master mode, the do a repeat start
IIC1C1_RSTA = 1;
}
else
{
// This also generates a start signal.
IIC1C1_MST = 1;
}
IIC1D = DeviceAddress;
STI();
return ERROR_NONE;
}
//------------------------------------------------------------------------------
// 1-wire总线复位
//------------------------------------------------------------------------------
unsigned char reset_18B20(void)
{
char bus_flag;
CLI();
SET_DQ;
SET_OUT;
Delay_nus(1);
CL_DQ;
Delay_nus(550); //拉低至少480us时间
SET_DQ; //释放
NOP();
NOP();
SET_IN; //输入
Delay_nus(60);
//等待回复
bus_flag = IN_DQ;
Delay_nus(240); //回复的低电平在60到240US
SET_OUT;
NOP();
NOP();
SET_DQ; //回到初始DQ=1；
SEI();
if(bus_flag){
return FALSE;
}else{
return TRUE;
}
}
//**********************************************************************************
//无线模块初始化
void CC_Init()
{
CLI();
CC_RESET();
CC_RfConfig(&rfSettings7680);
//CC_RfConfig(&rfSettings1200);
// CC_WrReg(CCxxx0_SYNC1,0xa4 );//缺省值是D391
// CC_WrReg(CCxxx0_SYNC0,0x25 );
//CC_WrReg(CCxxx0_SYNC1,0x08 );//缺省值是D391
//CC_WrReg(CCxxx0_SYNC0,0x00 );
//CC_WrReg(CCxxx0_SYNC1,Sync0 );
//CC_WrReg(CCxxx0_SYNC0,Sync1 );
CC_PaTable(PAMAX);
CC_WrReg(CCxxx0_MCSM1,0x00 );//0x0f取消CCA，收发总回到RX 不能，否则不能自动校正频率
//CC_WrReg(CCxxx0_MCSM1,0x30 );//复位值0x30 有CCA，收发回IDLE
// CC_WHITE(1);
CC_FEC(1);
Delay_ms(20);
CC_RxOn();
//GIFR=0xE0;//clr int
//CC_Test();
SEI();
}
void
notmuch_exit_if_unsupported_format (void)
{
if (notmuch_format_version > NOTMUCH_FORMAT_CUR) {
fprintf (stderr, "\
A caller requested output format version %d, but the installed notmuch\n\
CLI only supports up to format version %d. You may need to upgrade your\n\
notmuch CLI.\n",
notmuch_format_version, NOTMUCH_FORMAT_CUR);
exit (NOTMUCH_EXIT_FORMAT_TOO_NEW);
} else if (notmuch_format_version < NOTMUCH_FORMAT_MIN) {
fprintf (stderr, "\
A caller requested output format version %d, which is no longer supported\n\
by the notmuch CLI (it requires at least version %d). You may need to\n\
upgrade your notmuch front-end.\n",
notmuch_format_version, NOTMUCH_FORMAT_MIN);
exit (NOTMUCH_EXIT_FORMAT_TOO_OLD);
} else if (notmuch_format_version != NOTMUCH_FORMAT_CUR) {
/* Warn about old version requests so compatibility issues are
* less likely when we drop support for a deprecated format
* versions. */
fprintf (stderr, "\
A caller requested deprecated output format version %d, which may not\n\
be supported in the future.\n", notmuch_format_version);
}
int main(int argc, char** argv) {
// benchmark_logs(cv::imread(IMG_DIR "depth/juggling1_user_mask.png", CV_LOAD_IMAGE_GRAYSCALE));
// generate_video_bw(cv::imread(IMG_DIR "depth/juggling1_user_mask.png", CV_LOAD_IMAGE_GRAYSCALE),
// IMPL_GUO_HALL, true, true);
// return 0;
// generate_video_bw(cv::imread(IMG_DIR "depth/juggling1_user_mask.png", CV_LOAD_IMAGE_GRAYSCALE),
// IMPL_MORPH, true, true);
// return 0;
// generate_video_comparer(cv::imread(IMG_DIR "skeletons/horse.png", CV_LOAD_IMAGE_GRAYSCALE),
// true, 2, "horse_");
// generate_video_comparer(cv::imread(IMG_DIR "depth/juggling1_user_mask.png", CV_LOAD_IMAGE_GRAYSCALE),
// true, 4, "comparer_juggling1_mask_");
// generate_video_comparer(cv::imread(IMG_DIR "depth/alberto1_user_mask.png", CV_LOAD_IMAGE_GRAYSCALE),
// true, 4, "alberto1_mask_");
// generate_video_comparer(cv::imread(IMG_DIR "skeletons/japanese_src.png", CV_LOAD_IMAGE_GRAYSCALE),
// true, 2, "comparer_japanese_src_");
// generate_video_comparer(cv::imread(IMG_DIR "skeletons/opencv_src.png", CV_LOAD_IMAGE_GRAYSCALE),
// true, 1, "opencv_src_");
// generate_video_comparer(cv::imread(IMG_DIR "powerXML/power.png", CV_LOAD_IMAGE_GRAYSCALE),
// true, 2, "comparer_power_");
return CLI(argc, argv);
}
void add_obj(struct Object_dec *dir, struct Object_dec *object)
{
U32 flags;
SAVE_FLAGS(flags);
CLI();
#ifdef DEBUG
dprint("Event: adding object to directory at 0x%x\n",(U32)dir);
#endif
// Link in the new object
// n->|<-dir-><-n
// n-><-object-><-dir-><-n
//
object->Parent = dir;
object->Next = dir;
object->Previous = dir->Previous;
dir->Previous->Next = object;
dir->Previous = object;
// Now at this point we need to make a TSS selector in the GDT
RESTORE_FLAGS(flags);
}
/******************************************************************
Timing issue when using runtime-bus-selection (!OW_ONE_BUS):
The master should sample at the end of the 15-slot after initiating
the read-time-slot. The variable bus-settings need more
cycles than the constant ones so the delays had to be shortened
to achive a 15uS overall delay
Setting/clearing a bit in I/O Register needs 1 cyle in OW_ONE_BUS
but around 14 cyles in configureable bus (us-Delay is 4 cyles per uS)
*********************************************************************/
uint8_t
ow_bit_io( uint8_t b )
{ uint8_t sreg;
sreg=SREG;
/*TRY it*///
CLI();
OW_DIR_OUT(); /* drive bus low*/
// delay_us(1); /* Recovery-Time wuffwuff was 1*/
usecsleep(1,1);
//timer1_Delay(1);
if ( b ) OW_DIR_IN(); /* if bit is 1 set bus high (by ext. pull-up)*/
/* wuffwuff delay was 15uS-1 see comment above*/
// delay_us(15-1-OW_CONF_DELAYOFFSET);
usecsleep(1,15-1-OW_CONF_DELAYOFFSET);
//timer1_Delay(15-1-OW_CONF_DELAYOFFSET);
if( OW_GET_IN() == 0 ) b = 0; /* sample at end of read-timeslot*/
// delay_us(60-15);
usecsleep(1,60-15);
//timer1_Delay(60-15);
OW_DIR_IN();
/*TRY it*///SREG=sreg; /* sei();*/
SEI();
return b;
}
/*********************************
*RESET
-*********************************/
uint8_t
ow_reset(void)
{ uint8_t err;
uint8_t sreg;
OW_OUT_LOW(); // disable internal pull-up (maybe on from parasite)
OW_DIR_OUT(); // pull OW-Pin low for 480us
// delay_us(480);
usecsleep(2,240);
//timer1_Delay(480);
sreg=SREG;
/*TRY it*///
CLI();
/* set Pin as input - wait for clients to pull low*/
OW_DIR_IN(); /* input*/
// delay_us(66);
usecsleep(2,33);
//timer1_Delay(480);
err = OW_GET_IN(); /* no presence detect*/
/* nobody pulled to low, still high*/
/*TRY it*///SREG=sreg; /*
SEI();
/* after a delay the clients should release the line
and input-pin gets back to high due to pull-up-resistor*/
// delay_us(480-66);
usecsleep(2,207);
//timer1_Delay(480-66);
if( OW_GET_IN() == 0 )/* short circuit*/ err = 1;
return err;
}
byte I2CRecieve(byte* data,word size)
{
if (!size)
{
return ERROR_NONE;
}
if((IIC1S_BUSY)||(ReadBufferSize)||(I2C_Status&(CHAN_BUSY)))
{
return ERROR_BUSBUSY;
}
CLI();
IIC1C1_TX = 1; // Set TX Mode.
ReadBufferSize = size;
pReadPointer = data;
if(IIC1C1_MST)
{
// If we are already in master mode, the do a repeat start
IIC1C1_RSTA = 1;
}
else
{
// This will send a start.
IIC1C1_MST = 1;
}
IIC1D = (byte)(DeviceAddress+1); // Set LSB to indicate write.
STI();
return ERROR_NONE;
}
int Read_M_Rate(void)
{
int nMRate = 0;
CLI();
nMRate = g_pulse_counter;
g_pulse_counter = 0;
SEI();
return nMRate;
}
void shell(void)
{
CallBack cb;
int len;
do
{
len = readLine("lds2000: ", command_line, 255);
cb = CLI(command_line);
} while (!cb);
}
void init_devices(void)
{
CLI(); //disable all interrupts
port_init();
//init_uart();
init_uart2();
MCUCR = 0x00;
GICR = 0x00;
TIMSK = 0x00; //timer interrupt sources
SEI(); //re-enable interrupts
}
/*总初始化*/
void Init()
{
CLI();
IO_Init();
ADC_Init();
Usart_init();
LCD_Init();
Driver_595_Init();
SPI_Init ();
T2_Init();
SEI();
}
void
monpanic_nomess(vm_t *vm)
{
loop:
CLI();
vm->mon_request = MonReqPanic;
vm->guest.__mon2host();
/* mon2host() should never return in this case. In case it ever */
/* does because our logic is broken, keep returning back to */
/* the host so we at least don't hang the machine. */
goto loop;
}
void BucketAlloc::free(void* ptr) {
CLI();
lock.lock();
// get a pointer to the memory region (just memory + header)
size_t* reg = (size_t*)((char*)(ptr) - 2 * sizeof(size_t));
// remove the used flag
reg[0] = reg[0] ^ USED_FLAG;
// and insert it into a bucket
insertIntoBucket(reg);
lock.release();
STI();
}
// TIMER1 initialize - prescale:1
// WGM: 14) PWM fast, TOP=ICRn
// desired value: 15KHz
// actual value: 15.010KHz (0.1%)
void Timer1_Init(void)
{
CLI();
TCCR1B = 0x00; //stop
TCNT1H = 0xFB; //setup
TCNT1L = 0x35; //设置起始值，主要作用是在刚开始的时候
OCR1AH = 0x00;
OCR1AL = 0x00;
ICR1H = 0x04;//1227
ICR1L = 0xCB;
TCCR1A = 0x82;
TCCR1B = 0x19; //start Timer
SEI();
}
//call this routine to initialize all peripherals
void init_devices(void)
{
//stop errant interrupts until set up
CLI(); //disable all interrupts
port_init();
timer0_init();
timer1_init();
spi_init();
uart0_init();
MCUCR = 0x00;
GICR = 0x00;
TIMSK = 0x05; //timer interrupt sources
SEI(); //re-enable interrupts
//all peripherals are now initialized
}
//------------------------------------------------------------------------------
// 写一个字节到总线
//------------------------------------------------------------------------------
void write_byte_18B20(unsigned char data)
{
unsigned char i;
CLI();
for(i=0;i<8;i++)
{
write_bit_18B20(data&(1<<i));
}
SET_DQ;
NOP();
NOP();
SEI();
//return;
}
void init_devices(void)
{
CLI();
MCUCR = 0x00;
TIMSK0 = 0x00;
GIMSK = 0x00;
output(POWER_ZERO);
TCCR0B = 0;
TCCR0A = (0 << WGM01) | (1 << WGM00) ; /* Phase Correct PWM */
TCCR0B |= (0 << WGM02) | (0 << CS01) | (1 << CS00); /* No Prescaling */
TCCR0A |= ((1 << COM0A1) | (0 << COM0A0));
SEI();
}
void Int0_isr(void)
{
CLI();
COLL_LED;
CHANGE_INT0_EDGE;
if( (INT0_PORT_L && INT1_PORT_H) ||(INT0_PORT_H && INT1_PORT_L))
{
g_pulse_counter++;
g_all_pulse++;
}
else
{
g_pulse_counter--;
g_all_pulse--;
}
SEI();
}
/**
* @brief 主函数
* @param 无
* @retval 无
*/
int main(void)
{
/* config the led */
LED_GPIO_Config();
LED1_ON;
CLI();
SEI();
/* exti line config */
EXTI_PC13_Config();
/* wait interrupt */
while(1)
{
}
}
void remove_obj(struct Object_dec *object)
{
U32 flags;
SAVE_FLAGS(flags);
CLI();
// unlink the object - if its by itself it will be relinked
// and thus this will have little effect
object->Previous->Next = object->Next;
object->Next->Previous = object->Previous;
object->Parent = NULL;
RESTORE_FLAGS(flags);
free(object->St);
free(object);
}
//call this routine to initialize all peripherals
void init_devices(void)
{
//stop errant interrupts until set up
CLI(); //disable all interrupts
DDRA=0xff; //用于打开LED锁存
PORTA=0xfb;//打开LED灯总线 PA2脚输出底电平，打开LED锁存
DDRB=0XFF;
PORTB=0X04;
timer0_init();
MCUCR = 0x00;
GICR = 0x00;
TIMSK = 0x01; //timer interrupt sources
SEI(); //re-enable interrupts
}
//------------------------------------------------------------------------------
// 读一个字节
//------------------------------------------------------------------------------
unsigned char read_byte_18B20(void)
{
unsigned char temp,n;
CLI();
temp=0;
for(n=0;n<8;n++)
{
if(read_bit_18B20()){
temp|=(1<<n);
}else{
temp&=~(1<<n);
}
Delay_nus(70); //60~120us
}
SEI();
return temp;
}
void remove_timer(struct Timer_dec * timer)
{
// The variables this function changes are used by the
// Handle_Timers interrupt and so this function
// must be atomic
// This basically removes the current timer
// by linking around it
// ----->(n - 1)->Next
// | n |
// Prev<-(n + 1)<-----
// if it was malloced it will have to be freed manually
CLI();
timer->Previous->Next = timer->Next;
timer->Next->Previous = timer->Previous;
STI();
}
void addTask( Task *task, u32 entry, u32 stack )
{
task->tss.eip = entry;
task->tss.es = task->tss.ds = task->tss.ss = task->tss.fs = task->tss.gs = 0x10;
task->tss.cs = 0x08;
task->tss.ebp = task->tss.esp = stack;
task->tss.eflags = 0x200; // IF = 1
task->tss.cr3 = 0;
task->tss.iomap = sizeof(Tss);
task->tss.debug = 0;
CLI();
// Insert created task after `currentTask`
task->next = currentTask->next;
currentTask->next = task;
STI();
};
void* BucketAlloc::malloc(size_t size) {
CLI();
lock.lock();
// try to allocate the memory
void* mem = mallocOneTry(size);
// if it is null, lets do a merge step and try again
if (mem == nullptr) {
merge();
mem = mallocOneTry(size);
}
// if it is still null, allocate new virtual pages to use.
if (mem == nullptr) {
// this is the bucket malloc will start looking in
size_t bucket = nextHighestPowerOfTwo(size);
u32 bucketmemsize = 1u << bucket;
// we want to allocate pages that will fit that bucket or higher
// so first we round up the bucketmemsize
u32 allocsize = bucketmemsize + (bucketmemsize % 0x1000 == 0 ? 0 : (0x1000 - (bucketmemsize % 0x1000)));
// if allocsize without header is in the same bucket, add a page
if (nextHighestPowerOfTwo(allocsize - 16) == bucket)
allocsize += 0x1000;
// then we allocate the virtual memory
void* page = memory::kernelPageDirectory.bindFirstFreeVirtualPages(KERNEL_END_VIRTUAL, allocsize / 0x1000);
// give it the the allocator, and try to allocate some memory
if (page != nullptr) {
init(page, allocsize);
mem = mallocOneTry(size);
}
}
// and return the allocated memory, this might be null if nothing was found
lock.release();
STI();
return mem;
}
byte I2CSendAddress(void)
{
// If you call this and don't then send or receive data, the unit will say busy.
CLI();
IIC1C1_TX = 1;
I2C_Status |= CHAN_BUSY;
WriteBufferSize = 0;
if(IIC1C1_MST)
{
// If we are already in master mode, the do a repeat start
IIC1C1_RSTA = 1;
}
else
{
// This also generates a start signal.
IIC1C1_MST = 1;
}
IIC1D = DeviceAddress+1;
STI();
return ERROR_NONE;
}
void
monpanic(vm_t *vm, char *fmt, ...)
{
monprint(vm, "plex86 panic: ");
if (fmt)
{
va_list args;
va_start(args, fmt);
mon_vprint(vm, fmt, args);
va_end(args);
}
loop:
CLI();
vm->mon_request = MonReqPanic;
vm->guest.__mon2host();
/* mon2host() should never return in this case. In case it ever */
/* does because our logic is broken, keep returning back to */
/* the host so we at least don't hang the machine. */
goto loop;
}
void add_timer(struct Timer_dec * timer)
{
// The variables this function changes are used by the
// Handle_Timers interrupt and so this function
// must be atomic
CLI();
if(!timer)
return;
// Link in the new timer
// n->|<-base-><-n
// n-><-timer-><-base-><-n
//
timer->Next = &base;
timer->Previous = base.Previous;
base.Previous->Next = timer;
base.Previous = timer;
// Reset its ticks
timer->Ticks = 0;
STI();
}
