typedef TAILQ_HEAD(clknode_list, clknode) clknode_list_t; typedef TAILQ_HEAD(clkdom_list, clkdom) clkdom_list_t; /* Default clock methods. */ static int clknode_method_init(struct clknode *clk, device_t dev); static int clknode_method_recalc_freq(struct clknode *clk, uint64_t *freq); static int clknode_method_set_freq(struct clknode *clk, uint64_t fin, uint64_t *fout, int flags, int *stop); static int clknode_method_set_gate(struct clknode *clk, bool enable); static int clknode_method_set_mux(struct clknode *clk, int idx); /* * Clock controller methods. */ static clknode_method_t clknode_methods[] = { CLKNODEMETHOD(clknode_init, clknode_method_init), CLKNODEMETHOD(clknode_recalc_freq, clknode_method_recalc_freq), CLKNODEMETHOD(clknode_set_freq, clknode_method_set_freq), CLKNODEMETHOD(clknode_set_gate, clknode_method_set_gate), CLKNODEMETHOD(clknode_set_mux, clknode_method_set_mux), CLKNODEMETHOD_END }; DEFINE_CLASS_0(clknode, clknode_class, clknode_methods, 0); /* * Clock node - basic element for modeling SOC clock graph. It holds the clock * provider's data about the clock, and the links for the clock's membership in * various lists. */ struct clknode {
static int super_mux_init(struct clknode *clk, device_t dev); static int super_mux_set_mux(struct clknode *clk, int idx); struct super_mux_sc { device_t clkdev; uint32_t base_reg; int src_pllx; int src_div2; uint32_t flags; int mux; }; static clknode_method_t super_mux_methods[] = { /* Device interface */ CLKNODEMETHOD(clknode_init, super_mux_init), CLKNODEMETHOD(clknode_set_mux, super_mux_set_mux), CLKNODEMETHOD_END }; DEFINE_CLASS_1(tegra124_super_mux, tegra124_super_mux_class, super_mux_methods, sizeof(struct super_mux_sc), clknode_class); /* Mux status. */ #define SUPER_MUX_STATE_STDBY 0 #define SUPER_MUX_STATE_IDLE 1 #define SUPER_MUX_STATE_RUN 2 #define SUPER_MUX_STATE_IRQ 3 #define SUPER_MUX_STATE_FIQ 4 /* Mux register bits. */ #define SUPER_MUX_STATE_BIT_SHIFT 28
#define DEVICE_LOCK(_sc) mtx_lock((_sc)->mtx) #define DEVICE_UNLOCK(_sc) mtx_unlock((_sc)->mtx) static int clknode_fixed_init(struct clknode *clk, device_t dev); static int clknode_fixed_recalc(struct clknode *clk, uint64_t *freq); struct clknode_fixed_sc { struct mtx *mtx; int fixed_flags; uint64_t freq; uint32_t mult; uint32_t div; }; static clknode_method_t clknode_fixed_methods[] = { /* Device interface */ CLKNODEMETHOD(clknode_init, clknode_fixed_init), CLKNODEMETHOD(clknode_recalc_freq, clknode_fixed_recalc), CLKNODEMETHOD_END }; DEFINE_CLASS_1(clknode_fixed, clknode_fixed_class, clknode_fixed_methods, sizeof(struct clknode_fixed_sc), clknode_class); static int clknode_fixed_init(struct clknode *clk, device_t dev) { struct clknode_fixed_sc *sc; sc = clknode_get_softc(clk); if (sc->freq == 0) clknode_init_parent_idx(clk, 0); return(0);
device_t clkdev; uint32_t base_reg; uint32_t div_shift; uint32_t div_width; uint32_t div_mask; uint32_t div_f_width; uint32_t div_f_mask; uint32_t flags; uint32_t divider; int mux; }; static clknode_method_t periph_methods[] = { /* Device interface */ CLKNODEMETHOD(clknode_init, periph_init), CLKNODEMETHOD(clknode_recalc_freq, periph_recalc), CLKNODEMETHOD(clknode_set_freq, periph_set_freq), CLKNODEMETHOD(clknode_set_mux, periph_set_mux), CLKNODEMETHOD_END }; DEFINE_CLASS_1(tegra124_periph, tegra124_periph_class, periph_methods, sizeof(struct periph_sc), clknode_class); static int periph_init(struct clknode *clk, device_t dev) { struct periph_sc *sc; uint32_t reg; sc = clknode_get_softc(clk);
static int jz4780_clk_pll_init(struct clknode *clk, device_t dev); static int jz4780_clk_pll_recalc_freq(struct clknode *clk, uint64_t *freq); static int jz4780_clk_pll_set_freq(struct clknode *clk, uint64_t fin, uint64_t *fout, int flags, int *stop); struct jz4780_clk_pll_sc { struct mtx *clk_mtx; struct resource *clk_res; uint32_t clk_reg; }; /* * JZ4780 PLL clock methods */ static clknode_method_t jz4780_clk_pll_methods[] = { CLKNODEMETHOD(clknode_init, jz4780_clk_pll_init), CLKNODEMETHOD(clknode_recalc_freq, jz4780_clk_pll_recalc_freq), CLKNODEMETHOD(clknode_set_freq, jz4780_clk_pll_set_freq), CLKNODEMETHOD_END }; DEFINE_CLASS_1(jz4780_clk_pll, jz4780_clk_pll_class, jz4780_clk_pll_methods, sizeof(struct jz4780_clk_pll_sc), clknode_class); static int jz4780_clk_pll_init(struct clknode *clk, device_t dev) { struct jz4780_clk_pll_sc *sc; uint32_t reg; sc = clknode_get_softc(clk);