Exemple #1
0
char system_clocks_init(void)
{

	 /******************************************************************
   * System Clock 32MHz (XOSC Quarz 16MHz, PLL Faktor 2)
   ******************************************************************/

  /* Nach dem Reset ist die Quelle des Systemtaktes der interne
     2MHz RC-Oszillator (System Clock Selection: RC2MHz)
  */

  // Oszillator XOSC konfigurieren (12..16MHz, 256 clocks startup time)
  CLKSYS_XOSC_Config( OSC_FRQRANGE_12TO16_gc,
                      false,
                      OSC_XOSCSEL_XTAL_256CLK_gc );

  // Oszillator XOSC enable
  CLKSYS_Enable( OSC_XOSCEN_bm );

  // Warten bis der Oszillator bereit ist
  do {} while ( CLKSYS_IsReady( OSC_XOSCRDY_bm ) == 0 );

  // PLL source ist XOSC, Multiplikator x2
  CLKSYS_PLL_Config( OSC_PLLSRC_XOSC_gc, 2 );

  // Enable PLL
  CLKSYS_Enable( OSC_PLLEN_bm );

  // Prescalers konfigurieren
  CLKSYS_Prescalers_Config(CLK_PSADIV_1_gc, CLK_PSBCDIV_1_1_gc );

  // Warten bis PLL locked
  do {} while ( CLKSYS_IsReady( OSC_PLLRDY_bm ) == 0 );

  // Main Clock Source ist Ausgang von PLL
  CLKSYS_Main_ClockSource_Select( CLK_SCLKSEL_PLL_gc );

  // Nun ist der System Clock 32MHz !

  /* Hinweis:
     32kHz TOSC kann nicht in Verbindung mit PLL genutzt werden, da
     die minimale Eingangsfrequenz des PLLs 400kHz beträgt.
  */

	return(1);	
} // Sets System Clock to 32MHz
Exemple #2
0
void configClock (void) {
	// enable 32mhz oscillator 
	CLKSYS_Enable( OSC_RC32MEN_bm );
	do {} while ( CLKSYS_IsReady( OSC_RC32MRDY_bm ) == 0 );

	// configure pll source = 32mhz oscillator/4 * 16 = 4*32mhz = 128mhz output
	CLKSYS_PLL_Config( OSC_PLLSRC_RC32M_gc, 16 );

	// enable pll
	CLKSYS_Enable( OSC_PLLEN_bm );
	do {} while ( CLKSYS_IsReady( OSC_PLLEN_bm ) == 0 );

	// enable prescale by 2 and 2 again to generate 2x and 4x clocks
	CCP = CCP_IOREG_gc;
	CLK.PSCTRL = CLK_PSBCDIV_2_2_gc;

	// select main clock source as pll output
	CLKSYS_Main_ClockSource_Select( CLK_SCLKSEL_PLL_gc );
}
/*! \brief This function enables the internal 32MHz oscillator and the
 *         prescalers needed by the HiRes extension.
 *
 *  \note  The optimization of the compiler must be set above low to ensure
 *         that the setting of the CLK register is set within 4 clock cylcles
 *         after the CCP register is set.
 */
void ConfigClockSystem( void )
{
	/*  Enable internal 32 MHz ring oscillator and wait until it's
	 *  stable.
	 */
	CLKSYS_Enable( OSC_RC32MEN_bm );
	do {} while ( CLKSYS_IsReady( OSC_RC32MRDY_bm ) == 0 );
	
	CLKSYS_Main_ClockSource_Select( CLK_SCLKSEL_RC32M_gc );
	
	/*  Configure PLL with the 32 MHz ring oscillator/4 as source and
	 *  multiply by 16 to get 128 MHz PLL clock and enable it. Wait
	 *  for it to be stable and set prescalers B and C to divide by four
	 *  to set the CPU clock to 32 MHz.
	 */
	CLKSYS_PLL_Config( OSC_PLLSRC_RC32M_gc, 16 );
	CLKSYS_Enable( OSC_PLLEN_bm );
	CLKSYS_Prescalers_Config( CLK_PSADIV_1_gc, CLK_PSBCDIV_2_2_gc );
	do {} while ( CLKSYS_IsReady( OSC_PLLRDY_bm ) == 0 );
		
	CLKSYS_Main_ClockSource_Select( CLK_SCLKSEL_PLL_gc );
}
Exemple #4
0
void InitClock ()
{
	/* Clock Setup */
	
	/* Enable for external 2-9 MHz crystal with quick startup time
		* (256CLK). Check if it's stable and set it as the PLL input.
		*/
	CLKSYS_XOSC_Config( OSC_FRQRANGE_2TO9_gc, false, OSC_XOSCSEL_EXTCLK_gc );
	CLKSYS_Enable( OSC_XOSCEN_bm );
	do {} while ( CLKSYS_IsReady( OSC_XOSCRDY_bm ) == 0 );
	
	/*  Configure PLL with the 8 MHz external clock as source and
		*  multiply by 4 to get 32 MHz PLL clock and enable it. Wait
		*  for it to be stable and set prescaler C to divide by two
		*  to set the CPU clock to 16 MHz.
		*/
	CLKSYS_PLL_Config(OSC_PLLSRC_XOSC_gc, 4 );
	CLKSYS_Enable( OSC_PLLEN_bm );
	CLKSYS_Prescalers_Config( CLK_PSADIV_1_gc, CLK_PSBCDIV_1_2_gc );
	do {} while ( CLKSYS_IsReady( OSC_PLLRDY_bm ) == 0 );
	CLKSYS_Main_ClockSource_Select( CLK_SCLKSEL_PLL_gc );
}
Exemple #5
0
int main(void)
{
	// Configure switches
	PORTCFG.MPCMASK = 0xFF; // Configure several PINxCTRL registers at the same time
	SWITCHPORTL.PIN0CTRL = (SWITCHPORTL.PIN0CTRL & ~PORT_OPC_gm) | PORT_OPC_PULLUP_gc; //Enable pull-up to get a defined level on the switches

	SWITCHPORTL.DIRCLR = 0xFF; // Set port as input

	// Configure LEDs
	PORTCFG.MPCMASK = 0xFF; // Configure several PINxCTRL registers at the same time
	LEDPORT.PIN0CTRL = PORT_INVEN_bm; // Invert input to turn STK600 leds on when port value is 1

	LEDPORT.DIRSET = 0xFF; 	// Set port as output
	LEDPORT.OUT = 0xA0;  // Set initial value

	unsigned int counter = 0;

	while (1)
	{

		/*  Change the clock source to the internal 2MHz. Disable PLL.
		 *  Configure PLL with the 2 MHz RC oscillator as source and
		 *  multiply by 15 to get 30 MHz PLL clock and enable it. Wait
		 *  for it to be stable and set prescaler C to divide by two
		 *  to set the CPU clock to 15 MHz
		 */
		if ( (SWITCHPORTL.IN & PIN0_bm) == 0 )
		{
			CLKSYS_Main_ClockSource_Select( CLK_SCLKSEL_RC2M_gc );

			CLKSYS_Disable( OSC_PLLEN_bm );

			CLKSYS_PLL_Config( OSC_PLLSRC_RC2M_gc, 15 );
			CLKSYS_Enable( OSC_PLLEN_bm );
			CLKSYS_Prescalers_Config( CLK_PSADIV_1_gc, CLK_PSBCDIV_1_2_gc );
			do {} while ( CLKSYS_IsReady( OSC_PLLRDY_bm ) == 0 );
			CLKSYS_Main_ClockSource_Select( CLK_SCLKSEL_PLL_gc );

			LEDPORT.OUTCLR = 0x1F;
			LEDPORT.OUTSET = PIN0_bm;
		}

		/*  Configure PLL with the 2 MHz RC oscillator as source and
		 *  multiply by 15 to get 30 MHz PLL clock and enable it. Wait
		 *  for it to be stable and set prescaler B and C to divide by two
		 *  to set the CPU clock to 7.5 MHz
		 */
		if ( (SWITCHPORTL.IN & PIN1_bm) == 0 )
		{
			CLKSYS_Main_ClockSource_Select( CLK_SCLKSEL_RC2M_gc );

			CLKSYS_Disable( OSC_PLLEN_bm );

			CLKSYS_PLL_Config( OSC_PLLSRC_RC2M_gc, 15 );
			CLKSYS_Enable( OSC_PLLEN_bm );
			CLKSYS_Prescalers_Config( CLK_PSADIV_1_gc, CLK_PSBCDIV_2_2_gc );
			do {} while ( CLKSYS_IsReady( OSC_PLLRDY_bm ) == 0 );
			CLKSYS_Main_ClockSource_Select( CLK_SCLKSEL_PLL_gc );

			LEDPORT.OUTCLR = 0x1F;
			LEDPORT.OUTSET = PIN1_bm;
		}


		/*  Configure PLL with the 2 MHz RC oscillator as source and
		 *  multiply by 6 to get 12 MHz PLL clock and enable it. Wait
		 *  for it to be stable and set prescaler B and C to divide by two
		 *  to set the CPU clock to 3 MHz
		 */
		if ( (SWITCHPORTL.IN & PIN2_bm) == 0 )
		{
			CLKSYS_Main_ClockSource_Select( CLK_SCLKSEL_RC2M_gc );

			CLKSYS_Disable( OSC_PLLEN_bm );

			CLKSYS_PLL_Config( OSC_PLLSRC_RC2M_gc, 6 );
			CLKSYS_Enable( OSC_PLLEN_bm );
			CLKSYS_Prescalers_Config( CLK_PSADIV_1_gc, CLK_PSBCDIV_2_2_gc );
			do {} while ( CLKSYS_IsReady( OSC_PLLRDY_bm ) == 0 );
			CLKSYS_Main_ClockSource_Select( CLK_SCLKSEL_PLL_gc );

			LEDPORT.OUTCLR = 0x1F;
			LEDPORT.OUTSET = PIN2_bm;
		}


		/*  Dynamically change prescaler:
		 *  Set prescaler A to divide by 2, prescaler B with no division,
		 *  and prescaler C to divide by 2. This will give the CPU a freqency
		 *  of 1/4th of the input freqency. Input freqency will depend on the
		 *  previous switch that has been pressed.
		 */
		if ( (SWITCHPORTL.IN & PIN3_bm) == 0 )
		{
			CLKSYS_Prescalers_Config( CLK_PSADIV_2_gc, CLK_PSBCDIV_1_2_gc );
			LEDPORT.OUTSET = PIN3_bm;
		}


		/*  
		 *  Add code here for generating 62 MHz to clkper4 and 15.5 MHz to the CPU
		 */
		if ( (SWITCHPORTL.IN & PIN4_bm) == 0 )
		{
			CLKSYS_Main_ClockSource_Select( CLK_SCLKSEL_RC2M_gc );

			CLKSYS_Disable( OSC_PLLEN_bm );

			CLKSYS_PLL_Config( OSC_PLLSRC_RC2M_gc, 31 );
			CLKSYS_Enable( OSC_PLLEN_bm );
			CLKSYS_Prescalers_Config( CLK_PSADIV_1_gc, CLK_PSBCDIV_2_2_gc );
			do {} while ( CLKSYS_IsReady( OSC_PLLRDY_bm ) == 0 );
			CLKSYS_Main_ClockSource_Select( CLK_SCLKSEL_PLL_gc );

			LEDPORT.OUTCLR = 0x1F;
			LEDPORT.OUTSET = PIN4_bm;

		}



		// Blink LEDS after the loop has been run several times
		// This gives us visual feedback on the MCU speed
		counter++;
		if (counter > 20000 )
		{
			LEDPORT.OUTTGL = 0xE0;
			counter=0;
		}


	}
}