long int initdram (int board_type) { int m, row, col, bank, i; unsigned long start, end; uint32_t mccr1; uint32_t mear1 = 0, emear1 = 0, msar1 = 0, emsar1 = 0; uint32_t mear2 = 0, emear2 = 0, msar2 = 0, emsar2 = 0; uint8_t mber = 0; i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE); if (i2c_reg_read (0x50, 2) != 0x04) return 0; /* Memory type */ m = i2c_reg_read (0x50, 5); /* # of physical banks */ row = i2c_reg_read (0x50, 3); /* # of rows */ col = i2c_reg_read (0x50, 4); /* # of columns */ bank = i2c_reg_read (0x50, 17); /* # of logical banks */ CONFIG_READ_WORD(MCCR1, mccr1); mccr1 &= 0xffff0000; start = CFG_SDRAM_BASE; end = start + (1 << (col + row + 3) ) * bank - 1; for (i = 0; i < m; i++) { mccr1 |= ((row == 13)? 2 : (bank == 4)? 0 : 3) << i * 2; if (i < 4) { msar1 |= ((start >> 20) & 0xff) << i * 8; emsar1 |= ((start >> 28) & 0xff) << i * 8; mear1 |= ((end >> 20) & 0xff) << i * 8; emear1 |= ((end >> 28) & 0xff) << i * 8; } else {
unsigned long setdram(int m, int row, int col, int bank) { int i; unsigned long start, end; uint32_t mccr1; uint32_t mear1 = 0, emear1 = 0, msar1 = 0, emsar1 = 0; uint32_t mear2 = 0, emear2 = 0, msar2 = 0, emsar2 = 0; uint8_t mber = 0; CONFIG_READ_WORD(MCCR1, mccr1); mccr1 &= 0xffff0000; start = CFG_SDRAM_BASE; end = start + (1 << (col + row + 3) ) * bank - 1; for (i = 0; i < m; i++) { mccr1 |= ((row == 13)? 2 : (bank == 4)? 0 : 3) << i * 2; if (i < 4) { msar1 |= ((start >> 20) & 0xff) << i * 8; emsar1 |= ((start >> 28) & 0xff) << i * 8; mear1 |= ((end >> 20) & 0xff) << i * 8; emear1 |= ((end >> 28) & 0xff) << i * 8; } else {