static void coresight_restore_mpinfo(void) { coresight_enable_access(); writel_relaxed(cst_info.etb_ffcr, GLOBAL_ETB_REG(0x304)); writel_relaxed(cst_info.cstf_pcr, CSTF_REG(0x4)); writel_relaxed(cst_info.cstf_fcr, CSTF_REG(0x0)); writel_relaxed(cst_info.etb_ctrl, GLOBAL_ETB_REG(0x20)); coresight_disable_access(); }
static void __init coresight_mp_init(u32 enable_mask) { coresight_enable_access(); writel_relaxed(0x1, GLOBAL_ETB_REG(0x304)); writel_relaxed(0x0, CSTF_REG(0x4)); writel_relaxed(enable_mask, CSTF_REG(0x0)); writel_relaxed(0x1, GLOBAL_ETB_REG(0x20)); coresight_disable_access(); }
static void coresight_save_mpinfo(void) { coresight_enable_access(); cst_info.etb_ffcr = readl_relaxed(GLOBAL_ETB_REG(0x304)); cst_info.cstf_pcr = readl_relaxed(CSTF_REG(0x4)); cst_info.cstf_fcr = readl_relaxed(CSTF_REG(0x0)); cst_info.etb_ctrl = readl_relaxed(GLOBAL_ETB_REG(0x20)); coresight_disable_access(); }
static void coresight_restore(void) { coresight_enable_access(); writel_relaxed(cst_info.tpiu_ffcr, TPIU_REG(0x304)); writel_relaxed(cst_info.etb_ffcr, ETB_REG(0x304)); writel_relaxed(cst_info.cstf_pcr, CSTF_REG(0x4)); writel_relaxed(cst_info.cstf_fcr, CSTF_REG(0x0)); writel_relaxed(cst_info.etb_ctrl, ETB_REG(0x20)); coresight_disable_access(); }
static void coresight_save(void) { coresight_enable_access(); cst_info.tpiu_ffcr = readl_relaxed(TPIU_REG(0x304)); cst_info.etb_ffcr = readl_relaxed(ETB_REG(0x304)); cst_info.cstf_pcr = readl_relaxed(CSTF_REG(0x4)); cst_info.cstf_fcr = readl_relaxed(CSTF_REG(0x0)); cst_info.etb_ctrl = readl_relaxed(ETB_REG(0x20)); coresight_disable_access(); }
static inline void coresight_disable_access(void) { writel_relaxed(0x0, CSTF_REG(0xFB0)); writel_relaxed(0x0, GLOBAL_ETB_REG(0xFB0)); }
static inline void coresight_enable_access(void) { writel_relaxed(0xC5ACCE55, CSTF_REG(0xFB0)); writel_relaxed(0xC5ACCE55, GLOBAL_ETB_REG(0xFB0)); }