Exemple #1
0
static void ehci_octeon_start(void)
{
	union cvmx_uctlx_ehci_ctl ehci_ctl;

	octeon2_usb_clocks_start();

	ehci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_EHCI_CTL(0));
	/* Use 64-bit addressing. */
	ehci_ctl.s.ehci_64b_addr_en = 1;
	ehci_ctl.s.l2c_addr_msb = 0;
	ehci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */
	ehci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */
	cvmx_write_csr(CVMX_UCTLX_EHCI_CTL(0), ehci_ctl.u64);
}
Exemple #2
0
static void ehci_octeon_start(struct device *dev)
{
	union cvmx_uctlx_ehci_ctl ehci_ctl;

	octeon2_usb_clocks_start(dev);

	ehci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_EHCI_CTL(0));
	/* Use 64-bit addressing. */
	ehci_ctl.s.ehci_64b_addr_en = 1;
	ehci_ctl.s.l2c_addr_msb = 0;
#ifdef __BIG_ENDIAN
	ehci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */
	ehci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */
#else
	ehci_ctl.s.l2c_buff_emod = 0; /* not swapped. */
	ehci_ctl.s.l2c_desc_emod = 0; /* not swapped. */
	ehci_ctl.s.inv_reg_a2 = 1;
#endif
	cvmx_write_csr(CVMX_UCTLX_EHCI_CTL(0), ehci_ctl.u64);
}
Exemple #3
0
int ehci_hcd_init(int index, enum usb_init_type init,
		  struct ehci_hccr **hccr, struct ehci_hcor **hcor)
{
	union cvmx_uctlx_ehci_ctl ehci_ctl;

	/* Make sure USB is present in the device tree */
	if (fdt_node_offset_by_compatible(gd->fdt_blob, 0,
					  "cavium,octeon-6335-uctl") < 0) {
		puts("USB not present.\n");
		return -1;
	}

	octeon2_usb_clock_start();

	debug("%s(%d, %p (%p), %p (%p))\n", __func__, index, hccr, *hccr,
	      hcor, *hcor);

	/* ehci byte swap */
	ehci_ctl.u64 = cvmx_read_csr(CVMX_UCTLX_EHCI_CTL(0));
	/* For 64-bit addressing, we do it here rather than EHCI */
	ehci_ctl.s.ehci_64b_addr_en = 1;    /* Add 64-bit addressing in EHCI */
	ehci_ctl.s.l2c_addr_msb = 0;
	ehci_ctl.s.l2c_buff_emod = 1; /* Byte swapped. */
	ehci_ctl.s.l2c_desc_emod = 1; /* Byte swapped. */
	cvmx_write_csr(CVMX_UCTLX_EHCI_CTL(0), ehci_ctl.u64);

	*hccr = (struct ehci_hccr *)NULL;	/* We use the correct address in the access funcs */
	*hcor = CASTPTR(struct ehci_hcor,
			(u32)(*hccr) + HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
	debug("%s: hccr: 0x%p, hcor: 0x%p\n", __func__, *hccr, *hcor);
	if (octeon_bist_6XXX_usb()) {
		puts("Error: USB failed BIST test!\n");
		return -1;
	}

	return 0;
}