/* Basic Ethernet interface initialization */ void Chip_ENET_Init(void) { LPC_CREG->CREG6 &= ~0x7; /* Enable ethernet clock */ Chip_Clock_EnableOpts(CLK_MX_ETHERNET, true, true, 1); /* PHY TX/RX base clock routing is setup as part of SystemInit() */ #if defined(USE_RMII) LPC_CREG->CREG6 |= 0x4; #endif /* Reset ethernet and wait for reset to complete */ Chip_RGU_TriggerReset(RGU_ETHERNET_RST); while (Chip_RGU_InReset(RGU_ETHERNET_RST)) {} /* Reset ethernet peripheral */ Chip_ENET_Reset(); /* Setup MII link divider to /102 and PHY address 1 */ Chip_ENET_Setup_MII(4, 1); IP_ENET_Init(LPC_ETHERNET); }
/* * @Brief Initialize Timer peripheral * @param timerNumber: Timer number, 0 to 3 * @param ticks: Number of ticks required to finish the cycle. * @param voidFunctionPointer: function to be executed at the end of the timer cycle * @return nothing * @note For the 'ticks' parameter, see function Timer_microsecondsToTicks */ void Timer_Init( uint8_t timerNumber, uint32_t ticks, voidFunctionPointer_t voidFunctionPointer){ /* Source: http://docs.lpcware.com/lpcopen/v1.03/lpc18xx__43xx_2examples_2periph_2periph__blinky_2blinky_8c_source.html */ /*If timer period = CompareMatch0 Period = 0 => ERROR*/ if (ticks==0){ errorOcurred(); } /* Enable timer clock and reset it */ Chip_TIMER_Init(timer_sd[timerNumber].name); Chip_RGU_TriggerReset(timer_sd[timerNumber].RGU); while (Chip_RGU_InReset(timer_sd[timerNumber].RGU)) {} Chip_TIMER_Reset(timer_sd[timerNumber].name); /* Update the defalut function pointer name of the Compare match 0*/ timer_dd[timerNumber].timerCompareMatchFunctionPointer[TIMERCOMPAREMATCH0] = voidFunctionPointer; /* Initialize compare match with the specified ticks (number of counts needed to clear the match counter) */ Chip_TIMER_MatchEnableInt(timer_sd[timerNumber].name, TIMERCOMPAREMATCH0); Chip_TIMER_SetMatch(timer_sd[timerNumber].name, TIMERCOMPAREMATCH0, ticks); /* Makes Timer Match 0 period the timer period*/ Chip_TIMER_ResetOnMatchEnable(timer_sd[timerNumber].name, TIMERCOMPAREMATCH0); /*Enable timer*/ Chip_TIMER_Enable(timer_sd[timerNumber].name); /* Enable timer interrupt */ NVIC_SetPriority(timer_sd[timerNumber].IRQn, MAX_SYSCALL_INTERRUPT_PRIORITY+1); NVIC_EnableIRQ(timer_sd[timerNumber].IRQn); NVIC_ClearPendingIRQ(timer_sd[timerNumber].IRQn); }
STATIC INLINE void reset(LPC_ENET_T *pENET) { Chip_RGU_TriggerReset(RGU_ETHERNET_RST); while (Chip_RGU_InReset(RGU_ETHERNET_RST)) {} /* Reset ethernet peripheral */ Chip_ENET_Reset(pENET); }
/* Shutdown ADC */ void Chip_HSADC_DeInit(LPC_HSADC_T *pHSADC) { /* Power down */ Chip_HSADC_DisablePower(pHSADC); /* Reset HSADC and wait for clear, will auto-clear */ Chip_RGU_TriggerReset(RGU_ADCHS_RST); while (Chip_RGU_InReset(RGU_ADCHS_RST)) {} /* SHutdown HSADC clock after reset is complete */ Chip_Clock_Disable(CLK_MX_ADCHS); }
void vConfigureTimerForRunTimeStats( void ) { uint32_t timerFreq; /* Enable timer 1 clock and reset it */ Chip_TIMER_Init(LPC_TIMER1); Chip_RGU_TriggerReset(RGU_TIMER1_RST); while (Chip_RGU_InReset(RGU_TIMER1_RST)) {} /* Get timer 1 peripheral clock rate */ timerFreq = Chip_Clock_GetRate(CLK_MX_TIMER1); /* Timer setup for match and interrupt at TICKRATE_HZ */ Chip_TIMER_Reset(LPC_TIMER1); Chip_TIMER_SetMatch(LPC_TIMER1, 1, (timerFreq / TICKRATE_HZ)); Chip_TIMER_ResetOnMatchEnable(LPC_TIMER1, 1); Chip_TIMER_Enable(LPC_TIMER1); }