Exemple #1
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/**
 * @brief	Main routine for SSP example
 * @return	Nothing
 */
int main(void)
{
	SystemCoreClockUpdate();
	Board_Init();

	/* SSP initialization */
	Board_SSP_Init(LPC_SSP);

	Chip_SSP_Init(LPC_SSP);

	ssp_format.frameFormat = SSP_FRAMEFORMAT_SPI;
	ssp_format.bits = SSP_DATA_BITS;
	ssp_format.clockMode = SSP_CLOCK_MODE0;
	Chip_SSP_SetFormat(LPC_SSP, ssp_format.bits, ssp_format.frameFormat, ssp_format.clockMode);

	Chip_SSP_Enable(LPC_SSP);

	/* Initialize GPDMA controller */
	Chip_GPDMA_Init(LPC_GPDMA);

	/* Setting GPDMA interrupt */
	NVIC_DisableIRQ(DMA_IRQn);
	NVIC_SetPriority(DMA_IRQn, ((0x01 << 3) | 0x01));
	NVIC_EnableIRQ(DMA_IRQn);

	/* Setting SSP interrupt */
	NVIC_EnableIRQ(SSP_IRQ);

	appSSPMainMenu();

	/* DeInitialize SSP peripheral */
	Chip_SSP_DeInit(LPC_SSP);

	return 0;
}
Exemple #2
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int
spi_init(spi_id_t spi_dev_id)
{
	Chip_SSP_Init(spi_dev_map[spi_dev_id]);

	return 0;
}
Exemple #3
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void initialize_spi(
    LPC_SSP_T *spi
)
{
    Chip_SSP_Init(spi);
    Chip_SSP_SetMaster(spi, false);
    Chip_SSP_SetFormat(spi, SSP_BITS_8, SSP_FRAMEFORMAT_SPI, SSP_CLOCK_CPHA0_CPOL0);
    Chip_SSP_Int_Enable(spi);
    Chip_SSP_Enable(spi);
}
Exemple #4
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/*****************************************************************************
 * Public types/enumerations/variables
 ****************************************************************************/
void SPI_Init()
{
	/* SSP initialization */
	Init_SSP_PinMux();
	Chip_SSP_Init(LPC_SSP0);

	Chip_SSP_SetFormat(LPC_SSP0, SSP_BITS_8, SSP_FRAMEFORMAT_SPI, SSP_CLOCK_MODE0);
	Chip_SSP_SetMaster(LPC_SSP0, true);
	Chip_SSP_SetBitRate(LPC_SSP0, 10000000); // 10MHz
	Chip_SSP_Enable(LPC_SSP0);
}
Exemple #5
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int main(void) {

#if defined (__USE_LPCOPEN)
#if !defined(NO_BOARD_LIB)

    SystemCoreClockUpdate();			/* Read clock settings and update SystemCoreClock variable
    									 * Set up and initialize all required blocks and
    									 * functions related to the board hardware */
    Board_Init();
#endif
#endif


	/* SSP initialization */
	Board_SSP_Init(LPC_SSP);			/* enable */
	Chip_SSP_Init(LPC_SSP);
	Chip_Clock_SetSSP0ClockDiv(18);

	/* define peripherals options */
	ssp_format.frameFormat = SSP_FRAMEFORMAT_SPI;
	ssp_format.bits = SSP_DATA_BITS;
	ssp_format.clockMode = SSP_CLOCK_MODE0;

	/* set parameters to peripherals SSP0 */
	Chip_SSP_SetFormat(LPC_SSP, ssp_format.bits, ssp_format.frameFormat, ssp_format.clockMode);

	/* Set the SSP operating modes, master or slave */
	Chip_SSP_SetMaster(LPC_SSP, SSP_MODE_TEST);

	/* Enable SSP operation */
	Chip_SSP_Enable(LPC_SSP);

	Chip_SSP_SendFrame(LPC_SSP, flipByte(0xB0));

	//Chip_SSP_SendFrame(LPC_SSP, 0b00001101);	// load address 0
	//_delay_ms(1);
	Chip_SSP_SendFrame(LPC_SSP, 0b01110000);  // load D letter
	//_delay_ms(1);
	Chip_SSP_SendFrame(LPC_SSP, 0b11001100);
	//_delay_ms(1);
	Chip_SSP_SendFrame(LPC_SSP, 0b10101010);
	//_delay_ms(1);
	Chip_SSP_SendFrame(LPC_SSP, 0b10011110);
	//_delay_ms(1);
	Chip_SSP_SendFrame(LPC_SSP, 0b01110001);





    return 0 ;
}
Exemple #6
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void App_SSP_Init (void)
{
	//Setup pin muxing for SPI pins.
	//Note: CS pins are not set up here
	Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 10, (IOCON_FUNC2 | IOCON_MODE_PULLUP));	/* SCK0 */
	Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 8, (IOCON_FUNC1 | IOCON_MODE_PULLUP));	/* MISO0 */
	Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 9, (IOCON_FUNC1 | IOCON_MODE_PULLUP));	/* MOSI0 */

	Chip_SSP_Init(LPC_SSP0);
	Chip_SSP_SetFormat(LPC_SSP0, SSP_BITS_8, SSP_FRAMEFORMAT_SPI, SSP_CLOCK_CPHA1_CPOL1);
	Chip_SSP_SetMaster(LPC_SSP0, 1);		//Set to master mode
	Chip_SSP_SetBitRate(LPC_SSP0, 8000000);	//Set SSP0 frequency to 8MHz
	Chip_SSP_Enable(LPC_SSP0);

	return;
}
/******************************************************************************
 *
 * Description:
 *    Initialize the touch controller
 *
 *****************************************************************************/
void touch_init (void)
{
  uint8_t data[3];
  //SSP_CFG_Type SSP_ConfigStruct;
  //SSP_DATA_SETUP_Type sspCfg;

  pinConfig();
  CS_OFF;

	// initialize SSP configuration structure to default
	//SSP_ConfigStructInit(&SSP_ConfigStruct);

  // set clock rate
//  SSP_ConfigStruct.ClockRate = SSP_CLOCK;
//  SSP_ConfigStruct.CPHA = SSP_CPHA_SECOND;
//  SSP_ConfigStruct.CPOL = SSP_CPOL_LO;
//
//	// Initialize SSP peripheral with parameter given in structure above
//	SSP_Init(SSP_PORT, &SSP_ConfigStruct);
//
//	// Enable SSP peripheral
//	SSP_Cmd(SSP_PORT, ENABLE);

  // initialize SSP
  Chip_SSP_Init(SSP_ID);
  Chip_SSP_SetMaster(SSP_ID, true);
  Chip_SSP_SetBitRate(SSP_ID, SSP_CLOCK);
  Chip_SSP_SetFormat(SSP_ID, SSP_BITS_8, SSP_FRAMEFORMAT_SPI, SSP_CLOCK_MODE3);
  Chip_SSP_Enable(SSP_ID);


  data[0] = REF_ON;
  data[1] = (READ_12BIT_SER(ADS_A2A1A0_vaux) | ADS_PD10_ALL_ON);
  data[2] = PWRDOWN;
  CS_ON;

  //sspCfg.tx_data = data;
  //sspCfg.rx_data = NULL;
  //sspCfg.length  = 3;

  //SSP_ReadWrite (SSP_PORT, &sspCfg, SSP_TRANSFER_POLLING);
  Chip_SSP_WriteFrames_Blocking(SSP_ID, data, 3);
  CS_OFF;
}
Exemple #8
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/* Initialize Pin Muxing for LCD */
void Board_LCD_Init(void)
{
	uint32_t val;

	Board_SSP_Init(LCD_SSP);
	val = LCD_SSP->CR0 & 0xFFFF;
	Chip_SCU_PinMuxSet(LCD_CDM_PORT, LCD_CMD_PIN, LCD_CMD_CFG);
	Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT, LCD_CMD_GPIO_PORT, LCD_CMD_GPIO_PIN);
	Chip_GPIO_SetPinOutHigh(LPC_GPIO_PORT, LCD_CMD_GPIO_PORT, LCD_CMD_GPIO_PIN);

	/* Enable the SSP interface */
	Chip_SSP_Init(LCD_SSP);
	Chip_SSP_Set_Mode(LCD_SSP, SSP_MODE_MASTER);
	Chip_SSP_SetFormat(LCD_SSP, SSP_BITS_8, SSP_FRAMEFORMAT_SPI, SSP_CLOCK_CPHA1_CPOL1);
	Chip_SSP_SetBitRate(LCD_SSP, LCD_BIT_RATE);
	Chip_SSP_Enable(LCD_SSP);

	lcd_cfg_val = LCD_SSP->CR0 & 0xFFFF;
	LCD_SSP->CR0 = val;
}
Exemple #9
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void Board_SSP_config(uint8_t bits, uint8_t clockMode, uint32_t bitrate)
{
	uint32_t bitsConfig= SSP_BITS_8;
	switch(bits)
	{
		case 4: bitsConfig=SSP_BITS_4;break;
		case 8: bitsConfig=SSP_BITS_8;break;
		case 16: bitsConfig=SSP_BITS_16;break;
	}
	uint32_t clockModeConfig = SSP_CLOCK_CPHA0_CPOL0;
	switch(clockMode)
	{
		case 0: clockModeConfig = SSP_CLOCK_CPHA0_CPOL0;break;
		case 1: clockModeConfig = SSP_CLOCK_CPHA1_CPOL0;break;
		case 2: clockModeConfig = SSP_CLOCK_CPHA0_CPOL1;break;
		case 3: clockModeConfig = SSP_CLOCK_CPHA1_CPOL1;break;
	}
        Chip_SSP_Init(LPC_SSP1);
        Chip_SSP_SetFormat(LPC_SSP1, bitsConfig, SSP_FRAMEFORMAT_SPI, clockModeConfig);
        Chip_SSP_SetBitRate(LPC_SSP1, bitrate);
        Chip_SSP_Enable(LPC_SSP1);
}
Exemple #10
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void ssp_init( uint8_t id, uint32_t bitrate, uint8_t frame_sz, bool master_mode, bool poll )
{
    ssp_cfg[id].polling = poll;
    ssp_cfg[id].frame_size = frame_sz;
    ssp_cfg[id].master_mode = master_mode;
    ssp_cfg[id].bitrate = bitrate;

    /* Set up clock and muxing for SSP0/1 interface */
    /* Slave Select (SSEL/FCS_B) is left as GPIO so we can send more than one byte without this pin going high (default operation of SSP interface) */

    Chip_IOCON_Init(LPC_IOCON);

    Chip_IOCON_PinMux(LPC_IOCON, ssp_pins[id].port, ssp_pins[id].sck_pin, IOCON_MODE_PULLDOWN, ssp_pins[id].sck_func);
    Chip_IOCON_PinMux(LPC_IOCON, ssp_pins[id].port, ssp_pins[id].ssel_pin, IOCON_MODE_PULLUP, ssp_pins[id].ssel_func);
    Chip_IOCON_PinMux(LPC_IOCON, ssp_pins[id].port, ssp_pins[id].mosi_pin, IOCON_MODE_INACT, ssp_pins[id].mosi_func);
    Chip_IOCON_PinMux(LPC_IOCON, ssp_pins[id].port, ssp_pins[id].miso_pin, IOCON_MODE_INACT, ssp_pins[id].miso_func);

    if (ssp_pins[id].ssel_func == 0) {
        gpio_set_pin_dir( ssp_pins[id].port, ssp_pins[id].ssel_pin, OUTPUT);
        gpio_set_pin_state( ssp_pins[id].port, ssp_pins[id].ssel_pin, HIGH);
    }

    Chip_SSP_Init(ssp_cfg[id].lpc_id);
    Chip_SSP_SetBitRate(ssp_cfg[id].lpc_id, bitrate);
    Chip_SSP_SetMaster(ssp_cfg[id].lpc_id, master_mode);
    Chip_SSP_SetFormat(ssp_cfg[id].lpc_id, (frame_sz-1), SSP_FRAMEFORMAT_SPI, SSP_CLOCK_CPHA0_CPOL0);
    Chip_SSP_Enable(ssp_cfg[id].lpc_id);

    if (!poll) {
        /* Configure interruption priority and enable it */
        NVIC_SetPriority( ssp_cfg[id].irq, configMAX_SYSCALL_INTERRUPT_PRIORITY );
        NVIC_EnableIRQ( ssp_cfg[id].irq );
    }

    if (ssp_cfg[id].lpc_id == LPC_SSP0) {
        active_SSP0 = id;
    }
}
Exemple #11
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void spi_init(LPC_SSP_T* id_in) {
    // Set up global state
    spi_id = id_in;

    // Set up pins
    spi_pin_mux();

    // Setup format
    ssp_format.bits = SSP_BITS_8;
    ssp_format.frameFormat = SSP_FRAMEFORMAT_SPI;
    ssp_format.clockMode = SSP_CLOCK_MODE0;

    // Set up buffers
    xf_setup.rx_data = spi_rx_buf;
    xf_setup.tx_data = spi_tx_buf;

    // Chip library calls
    Chip_SSP_Init(spi_id);
    Chip_SSP_SetMaster(spi_id, 1);
    Chip_SSP_SetFormat(spi_id, ssp_format.bits, ssp_format.frameFormat, ssp_format.clockMode);
    Chip_SSP_Enable(spi_id);
    Chip_SSP_SetBitRate(spi_id, SPI_SPEED_LOW);
}
Exemple #12
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void spi_setup_device(spi_device_t* device, uint32_t bits, uint32_t frameFormat, uint32_t clockMode, bool master) {
	Chip_SSP_Init(device->ssp_device);
	Chip_SSP_SetMaster(device->ssp_device, master);
	Chip_SSP_SetFormat(device->ssp_device, bits, frameFormat, clockMode);
	spi_enable(device);
}
Exemple #13
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void Chip_ADS1248_Init()
{
	Chip_SSP_DeInit(ADS_SSP);																													//Clear previous setup
	Chip_GPIO_Init(LPC_GPIO);																													//Init GPIO
	
	Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON);
	
	Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_SCLK, IOCON_FUNC2); 													//SCLK
	Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_MOSI, IOCON_FUNC2); 													//MOSI
	Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_MISO, IOCON_FUNC2); 													//MISO
	Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nSSEL1, IOCON_FUNC0 | IOCON_MODE_PULLUP);			
	Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_START1, IOCON_FUNC0 | IOCON_MODE_PULLUP); 		
	Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nRESET1,IOCON_FUNC0	| IOCON_MODE_PULLUP);
	Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nSSEL0, IOCON_FUNC0 | IOCON_MODE_PULLUP);			
	Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_START0, IOCON_FUNC0 | IOCON_MODE_PULLUP); 		
	Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nRESET0,IOCON_FUNC0	| IOCON_MODE_PULLUP);
	Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nDRDY0, IOCON_FUNC0 | IOCON_MODE_PULLUP);
	Chip_IOCON_PinMuxSet(LPC_IOCON, ADS_nDRDY1, IOCON_FUNC0 | IOCON_MODE_PULLUP);
	
	Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_nSSEL1);
	Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_START1);
	Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_nRESET1);	
	Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_nSSEL0);
	Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_START0);
	Chip_GPIO_SetPinDIROutput(LPC_GPIO, ADS_nRESET0);
	Chip_GPIO_SetPinDIRInput(LPC_GPIO,  ADS_nDRDY0);
	Chip_GPIO_SetPinDIRInput(LPC_GPIO,  ADS_nDRDY1);
	
	Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_nSSEL1);
	Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_nRESET1);
	Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_START1);
	Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_nSSEL0);
	Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_nRESET0);
	Chip_GPIO_SetPinOutHigh(LPC_GPIO, ADS_START0);
			
	Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_PINT);
	Chip_SYSCTL_SetPinInterrupt(0, ADS_nDRDY0);
	Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(0));
	Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(0));
	Chip_SYSCTL_EnablePINTWakeup(0);
			
	Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_PINT);
	Chip_SYSCTL_SetPinInterrupt(1, ADS_nDRDY1);
	Chip_PININT_SetPinModeEdge(LPC_PININT, PININTCH(1));
	Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(1));
	Chip_SYSCTL_EnablePINTWakeup(1);
		
	Chip_SSP_Init(ADS_SSP);	
	ssp_format.frameFormat = SSP_FRAMEFORMAT_SPI;																			//SPI Frame
	ssp_format.bits = SSP_BITS_8;																											//8bits 
	ssp_format.clockMode = SSP_CLOCK_CPHA1_CPOL0;																			//CPHA=1, CPOL=0	
	Chip_SSP_SetFormat(ADS_SSP, ssp_format.bits, ssp_format.frameFormat, ssp_format.clockMode);		
	Chip_SSP_Set_Mode(ADS_SSP, SSP_MODE_MASTER);
	
	Chip_SSP_SetClockRate(ADS_SSP, 1, 16);		
	Chip_Clock_SetSSP1ClockDiv(1);																										
	
	Chip_SSP_Enable(ADS_SSP);
	
	ADS1248_PeriphInit(CHIP_U1);
	ADS1248_PeriphInit(CHIP_U3);
}