/* Board UART Initialisation function */
void Board_UART_Init(LPC_USART_T *pUART)
{
/* Enable the clock to the Switch Matrix */
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SWM);
Chip_Clock_SetUARTClockDiv(1); /* divided by 1 */
if (pUART == LPC_USART0) {
/*connect the U0_TXD_O and U0_RXD_I signals to port pins(P0.4, P0.0) */
Chip_SWM_FixedPinEnable(ACMP_I1, DISABLE);
Chip_SWM_MovablePinAssign(SWM_U0_TXD_O, PIO4);
Chip_SWM_MovablePinAssign(SWM_U0_RXD_I, PIO0);
/* Enable USART0 clock */
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_UART0); // FIXME UART clocking and reset need to be part of CHIP driver
/* Peripheral reset control to USART0, a "1" bring it out of reset. */
Chip_SYSCTL_PeriphReset(RESET_USART0);
}
else if (pUART == LPC_USART1) {
/*connect the U1_TXD_O and U1_RXD_I signals to port pins(P0.13, P0.14) */
Chip_SWM_MovablePinAssign(SWM_U1_TXD_O, PIO13);
Chip_SWM_MovablePinAssign(SWM_U1_RXD_I, PIO14);
/* Enable USART1 clock */
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_UART1); // FIXME UART clocking and reset need to be part of CHIP driver
/* Peripheral reset control to USART1, a "1" bring it out of reset. */
Chip_SYSCTL_PeriphReset(RESET_USART1);
}
else {
/*connect the U2_TXD_O and U2_RXD_I signals to port pins(P0.13, P0.14) */
Chip_SWM_MovablePinAssign(SWM_U2_TXD_O, PIO13);
Chip_SWM_MovablePinAssign(SWM_U2_RXD_I, PIO14);
/* Enable USART2 clock */
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_UART2); // FIXME UART clocking and reset need to be part of CHIP driver
/* Peripheral reset control to USART2, a "1" bring it out of reset. */
Chip_SYSCTL_PeriphReset(RESET_USART2);
}
}
static void Init_I2C_PinMux(void)
{
#if (defined(BOARD_NXP_XPRESSO_11U14) || defined(BOARD_NGX_BLUEBOARD_11U24))
Chip_SYSCTL_PeriphReset(RESET_I2C0);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 4, IOCON_FUNC1 | I2C_FASTPLUS_BIT);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 5, IOCON_FUNC1 | I2C_FASTPLUS_BIT);
#elif (defined(BOARD_NXP_XPRESSO_11C24) || defined(BOARD_MCORE48_1125))
Chip_SYSCTL_PeriphReset(RESET_I2C0);
Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO0_4, IOCON_FUNC1 | I2C_FASTPLUS_BIT);
Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO0_5, IOCON_FUNC1 | I2C_FASTPLUS_BIT);
#else
#error "No Pin Muxing defined for I2C operation"
#endif
}
/* Initialize SCT */
void Chip_SCT_Init(LPC_SCT_T *pSCT)
{
if (sctUsedCount == 0) {
/* Does not handle unbalanced Init() and DeInit() calls */
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SCT0_1);
}
sctUsedCount++;
if (pSCT == LPC_SCT0) {
Chip_SYSCTL_PeriphReset(RESET_SCT0);
}
else {
Chip_SYSCTL_PeriphReset(RESET_SCT1);
}
}
/* Initializes the SDC card controller */
void Chip_SDC_Init(LPC_SDC_T *pSDC)
{
uint32_t i = 0;
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SDC);
Chip_SYSCTL_PeriphReset(SYSCTL_RESET_PCSDC);
/* Initialize GPDMA controller */
Chip_GPDMA_Init(LPC_GPDMA);
/* Initialize SDC peripheral */
SDC_Init(pSDC);
/* Power-up SDC Peripheral */
Chip_SDC_PowerControl(pSDC, SDC_POWER_UP, 0);
/* delays for the supply output is stable*/
for ( i = 0; i < 0x80000; i++ ) {}
Chip_SDC_SetClock(pSDC, SDC_IDENT_CLOCK_RATE);
Chip_SDC_ClockControl(pSDC, SDC_CLOCK_ENABLE, ENABLE);
/* Power-on SDC Interface */
Chip_SDC_PowerControl(pSDC, SDC_POWER_ON, 0);
}
/* Initialize I2C Interface */
void Chip_I2C_Init(void)
{
/* Enable I2C clock */
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_I2C);
/* Peripheral reset control to I2C */
Chip_SYSCTL_PeriphReset(RESET_I2C);
}
/* Initialize the SPI */
void Chip_SPI_Init(LPC_SPI_T *pSPI, SPI_CONFIG_T *pConfig)
{
uint32_t EnStat = pSPI->CFG & SPI_CFG_SPI_EN;
Chip_Clock_EnablePeriphClock((pSPI == LPC_SPI1) ? SYSCTL_CLOCK_SPI1 : SYSCTL_CLOCK_SPI0);
Chip_SYSCTL_PeriphReset((pSPI == LPC_SPI1) ? RESET_SPI1 : RESET_SPI0);
/* Disable before update CFG register */
if (EnStat) {
Chip_SPI_Disable(pSPI);
}
/* SPI Configurate */
pSPI->CFG = ((uint32_t) pConfig->ClockMode) | ((uint32_t) pConfig->DataOrder) | ((uint32_t) pConfig->Mode) |
((uint32_t) pConfig->SSELPol);
/* Rate Divider setting */
pSPI->DIV = SPI_DIV_VAL(pConfig->ClkDiv);
/* Clear status flag*/
Chip_SPI_ClearStatus(pSPI, SPI_STAT_CLR_RXOV | SPI_STAT_CLR_TXUR | SPI_STAT_CLR_SSA | SPI_STAT_CLR_SSD);
/* Return the previous state */
if (EnStat) {
Chip_SPI_Enable(pSPI);
}
}
void Chip_USB_Init(void)
{
/* Set USB PLL input to main oscillator */
Chip_Clock_SetUSBPLLSource(SYSCTL_PLLCLKSRC_MAINOSC);
/* Setup USB PLL (FCLKIN = 12MHz) * 4 = 48MHz
MSEL = 3 (this is pre-decremented), PSEL = 1 (for P = 2)
FCLKOUT = FCLKIN * (MSEL + 1) = 12MHz * 4 = 48MHz
FCCO = FCLKOUT * 2 * P = 48MHz * 2 * 2 = 192MHz (within FCCO range) */
Chip_Clock_SetupUSBPLL(3, 1);
/* Powerup USB PLL */
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPLL_PD);
/* Wait for PLL to lock */
while (!Chip_Clock_IsUSBPLLLocked()) {}
/* enable USB main clock */
Chip_Clock_SetUSBClockSource(SYSCTL_USBCLKSRC_PLLOUT, 1);
/* Enable AHB clock to the USB block. */
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_USB);
/* power UP USB Phy */
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_USBPHY_PD);
/* Reset USB block */
Chip_SYSCTL_PeriphReset(RESET_USB);
}
// Initialize the push button
void pb_init(void){
// Set initial values
pbState = READY;
pbTenths = 0;
pbLongPress = false;
pbShortPress = false;
// Set up timer interrupt
Chip_MRT_IntClear(LPC_MRT_CH(0));
Chip_MRT_SetEnabled(LPC_MRT_CH(0));
// Set up pin interrupt
Chip_PININT_Init(LPC_GPIO_PIN_INT);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_PININT);
Chip_SYSCTL_PeriphReset(RESET_PININT);
Chip_INMUX_PinIntSel(0, 0, PWR_PB_SENSE);
Chip_PININT_ClearIntStatus(LPC_GPIO_PIN_INT, 1 << 0);
Chip_PININT_SetPinModeLevel(LPC_GPIO_PIN_INT, 1 << 0);
PININT_EnableLevelInt(LPC_GPIO_PIN_INT, 1 << 0);
PININT_LowActive(LPC_GPIO_PIN_INT, 1 << 0); // Enable low first so that initial press is not detected
NVIC_ClearPendingIRQ(PIN_INT0_IRQn);
NVIC_EnableIRQ(PIN_INT0_IRQn);
NVIC_SetPriority(PIN_INT0_IRQn, 0x02); // Set higher than systick, but lower than sampling
}
/* Initialize GPIO block */
void Chip_GPIO_Init(LPC_GPIO_T *pGPIO)
{
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_GPIO0);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_GPIO1);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_GPIO2);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_MUX);
Chip_SYSCTL_PeriphReset(RESET_MUX);
}
/* Initialize the DAC peripheral */
void Chip_DAC_Init(LPC_DAC_T *pDAC)
{
#if defined(CHIP_LPC177X_8X) || defined(CHIP_LPC40XX)
Chip_SYSCTL_PeriphReset(SYSCTL_RESET_DAC);
#endif
/* Set maximum update rate 1MHz */
Chip_DAC_SetBias(pDAC, DAC_MAX_UPDATE_RATE_1MHz);
}
/* Initialize the UART peripheral */
void Chip_UART_Init(LPC_USART_T *pUART)
{
/* Enable USART clock */
Chip_Clock_EnablePeriphClock(getUARTClockID(pUART));
/* UART reset */
if (pUART == LPC_USART0) {
/* Peripheral reset control to USART0 */
Chip_SYSCTL_PeriphReset(RESET_USART0);
}
else if (pUART == LPC_USART1) {
/* Peripheral reset control to USART1 */
Chip_SYSCTL_PeriphReset(RESET_USART1);
}
else {
/* Peripheral reset control to USART2 */
Chip_SYSCTL_PeriphReset(RESET_USART2);
}
}
void Board_I2C_Init(void) {
Chip_SYSCTL_PeriphReset(RESET_I2C0);
Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO0_4, (IOCON_FUNC1));
Chip_IOCON_PinMuxSet(LPC_IOCON, IOCON_PIO0_5, (IOCON_FUNC1));
Chip_SYSCTL_DeassertPeriphReset(RESET_I2C0);
Chip_I2C_Init(DEFAULT_I2C);
Chip_I2C_SetClockRate(DEFAULT_I2C, SPEED_100KHZ);
Chip_I2C_SetMasterEventHandler(DEFAULT_I2C, Chip_I2C_EventHandler);
NVIC_EnableIRQ(I2C0_IRQn);
}
/* Initialize the Watchdog timer */
void Chip_WWDT_Init(LPC_WWDT_T *pWWDT)
{
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_WWDT);
Chip_SYSCTL_PeriphReset(RESET_WWDT);
/* Disable watchdog */
pWWDT->MOD = 0;
pWWDT->TC = 0xFF;
pWWDT->WARNINT = 0x3FF;
pWWDT->WINDOW = 0xFFFFFF;
}
/* Initialize the ADC peripheral */
void Chip_ADC_Init(LPC_ADC_T *pADC, uint32_t flags)
{
/* Power up ADC and enable ADC base clock */
if (pADC == LPC_ADC0) {
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_ADC0_PD);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ADC0);
Chip_SYSCTL_PeriphReset(RESET_ADC0);
}
else {
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_ADC1_PD);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ADC1);
Chip_SYSCTL_PeriphReset(RESET_ADC1);
}
/* Disable ADC interrupts */
pADC->INTEN = 0;
/* Set ADC control options */
pADC->CTRL = flags;
}
static inline void resetENET(LPC_ENET_T *pENET)
{
volatile uint32_t i;
#if defined(CHIP_LPC177X_8X) || defined(CHIP_LPC40XX)
Chip_SYSCTL_PeriphReset(SYSCTL_RESET_ENET);
#endif
/* Reset ethernet peripheral */
Chip_ENET_Reset(pENET);
for (i = 0; i < 100; i++) {}
}
static void Init_I2C_PinMux(void)
{
Chip_SYSCTL_PeriphReset(RESET_I2C0);
#if defined(BOARD_MANLEY_11U68)
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 4, IOCON_FUNC1 | I2C_FASTPLUS_BIT);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 5, IOCON_FUNC1 | I2C_FASTPLUS_BIT);
#elif defined(BOARD_NXP_LPCXPRESSO_11U68)
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 4,
(IOCON_FUNC1 | I2C_FASTPLUS_BIT) | IOCON_DIGMODE_EN);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 5,
(IOCON_FUNC1 | I2C_FASTPLUS_BIT) | IOCON_DIGMODE_EN);
#else
#warning "No I2C Pin Muxing defined for this example"
#endif
}
/**
* @brief main routine for EEPROM example
* @return Always returns 0
*/
int main(void)
{
uint8_t *ptr = (uint8_t *) buffer;
uint8_t ret_code;
/* Generic Initialization */
SystemCoreClockUpdate();
Board_Init();
/* Enable SysTick Timer */
SysTick_Config(SystemCoreClock / TICKRATE_HZ);
/* Enable EEPROM clock and reset EEPROM controller */
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_EEPROM);
Chip_SYSCTL_PeriphReset(RESET_EEPROM);
/* Data to be read from EEPROM */
ret_code = Chip_EEPROM_Read(EEPROM_ADDRESS, ptr, IAP_NUM_BYTES_TO_READ_WRITE);
/* Error checking */
if (ret_code != IAP_CMD_SUCCESS) {
DEBUGOUT("Command failed to execute, return code is: %x\r\n", ret_code);
}
/* Check and display string if it exists */
ShowString((char *) ptr);
/* Get a string to save */
MakeString(ptr);
/* Data to be written to EEPROM */
ret_code = Chip_EEPROM_Write(EEPROM_ADDRESS, ptr, IAP_NUM_BYTES_TO_READ_WRITE);
/* Error checking */
if (ret_code == IAP_CMD_SUCCESS) {
DEBUGSTR("EEPROM write passed\r\n");
}
else {
DEBUGOUT("EEPROM write failed, return code is: %x\r\n", ret_code);
}
return 0;
}
static void setup_pinmux() {
// SPI0 SDCard
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 21, (IOCON_FUNC2 | IOCON_MODE_INACT) | IOCON_DIGMODE_EN); // MOSI
Chip_IOCON_PinMuxSet(LPC_IOCON, 1, 20, (IOCON_FUNC2 | IOCON_MODE_INACT) | IOCON_DIGMODE_EN); // SCK
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 22, (IOCON_FUNC3 | IOCON_MODE_INACT) | IOCON_DIGMODE_EN); // MISO
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 23, (IOCON_FUNC4 | IOCON_MODE_INACT) | IOCON_DIGMODE_EN);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 16, (IOCON_FUNC0 | IOCON_MODE_INACT) | IOCON_DIGMODE_EN); // SSEL
// I2C on-board
Chip_SYSCTL_PeriphReset(RESET_I2C0);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 4,
(IOCON_FUNC1 | IOCON_FASTI2C_EN) | IOCON_DIGMODE_EN);
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 5,
(IOCON_FUNC1 | IOCON_FASTI2C_EN) | IOCON_DIGMODE_EN);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, 0, 20);
Chip_GPIO_SetPinDIROutput(LPC_GPIO, 0, 2);
}
/* Initialize the ADC peripheral */
void Chip_ADC_Init(LPC_ADC_T *pADC, uint32_t flags)
{
/* Power up ADC and enable ADC base clock */
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_ADC_PD);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ADC);
/* FIXME - LPC1125 UM describes ADC reset, but no ADC reset bit in SYSCTL.
It will be easier to init if ADC reset is there. */
#if 0
/* Reset ADC */
Chip_SYSCTL_PeriphReset(RESET_ADC0);
#else
/* Disable ADC interrupts */
pADC->INTEN = 0;
#endif
/* Set ADC control options */
pADC->CTRL = flags;
}
/* Initialize the UART peripheral */
void Chip_UARTN_Init(LPC_USARTN_T *pUART)
{
CHIP_SYSCTL_PERIPH_RESET_T resetID;
/* Enable USART clock */
Chip_UARTN_EnableClock(pUART);
/* Select UART reset */
if (pUART == LPC_USART1) {
resetID = RESET_USART1;
}
else if (pUART == LPC_USART2) {
resetID = RESET_USART2;
}
else if (pUART == LPC_USART3) {
resetID = RESET_USART3;
}
else {
resetID = RESET_USART4;
}
Chip_SYSCTL_PeriphReset(resetID);
}
/* Initialize SCT */
void Chip_SCT_Init(LPC_SCT_T *pSCT)
{
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SCT);
Chip_SYSCTL_PeriphReset(RESET_SCT);
}
int32_t main(void) {
int32_t i,cnt=0;
uint8_t RC5_System_prev=0;
uint8_t RC5_Command_prev=0;
CHIP_PMU_MCUPOWER_T mcupower=PMU_MCU_SLEEP;
SystemCoreClockUpdate();
// init GPIO
Chip_GPIO_Init(LPC_GPIO_PORT);
Chip_SYSCTL_PeriphReset(RESET_GPIO);
// init SPI0 at SystemCoreClock speed
Chip_SPI_Init(LPC_SPI0);
Chip_SPI_ConfigureSPI(LPC_SPI0,SPI_MODE_MASTER|
SPI_CLOCK_CPHA0_CPOL0|
SPI_DATA_MSB_FIRST|
SPI_SSEL_ACTIVE_LO);
LPC_SPI0->DIV=0;
Chip_SPI_Enable(LPC_SPI0);
// init MRT
Chip_MRT_Init();
// init SWM
Chip_SWM_Init();
Chip_SWM_DisableFixedPin(SWM_FIXED_SWCLK);//PIO0_3
Chip_SWM_DisableFixedPin(SWM_FIXED_SWDIO);//PIO0_2
Chip_SWM_DisableFixedPin(SWM_FIXED_ACMP_I2);//PIO0_1
Chip_SWM_DisableFixedPin(SWM_FIXED_ACMP_I1);//PIO0_0
Chip_SWM_MovablePinAssign(SWM_SPI0_SCK_IO,CLK_PIN);
Chip_SWM_MovablePinAssign(SWM_SPI0_MOSI_IO,MOSI_PIN);
Chip_SWM_MovablePinAssign(SWM_CTIN_0_I,IR_PIN);
Chip_SWM_Deinit();
// init onboard LED
Chip_GPIO_SetPinState(LPC_GPIO_PORT,0,LED_PIN,true);
Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT,0,LED_PIN);
// init LCD reset pin
Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT,0,RESET_PIN);
// init LCD
LCDInit();
LCDClearScreenBlack();
// init SCT
Chip_SCT_Init(LPC_SCT);
// set prescaler, SCT clock = 1 MHz, clear counter
LPC_SCT->CTRL_L |= SCT_CTRL_PRE_L(SystemCoreClock/1000000-1) | SCT_CTRL_CLRCTR_L;
sct_fsm_init();
NVIC_EnableIRQ(SCT_IRQn);
// init PIO0_3 pin interrupt for wakeup from sleep mode
Chip_SYSCTL_SetPinInterrupt(IR_IRQ,IR_PIN);
Chip_PININT_EnableIntLow(LPC_PININT, PININTCH(IR_IRQ));
NVIC_EnableIRQ(PININT3_IRQn);
Chip_SYSCTL_EnablePINTWakeup(IR_IRQ);
// set sleep options
Chip_SYSCTL_SetDeepSleepPD(SYSCTL_DEEPSLP_BOD_PD | SYSCTL_DEEPSLP_WDTOSC_PD);
Chip_SYSCTL_SetWakeup(~(SYSCTL_SLPWAKE_IRCOUT_PD | SYSCTL_SLPWAKE_IRC_PD | SYSCTL_SLPWAKE_FLASH_PD ));
LCDPutStr("kbiva.wordpress.com", MAX_X / 2 + 50, 10, WHITE, BLACK);
LCDPutStr("RC5 Decoder", MAX_X / 2 + 35, 35, WHITE, BLACK);
LCDPutStr("Frame:", MAX_X / 2 + 20, 1, WHITE, BLACK);
LCDPutStr("System:", MAX_X / 2 + 5 , 1, WHITE, BLACK);
LCDPutStr("Cmd:", MAX_X / 2 - 10, 1, WHITE, BLACK);
LCDPutStr("Toggle:", MAX_X / 2 - 25, 1, WHITE, BLACK);
LCDPutStr("Count:", MAX_X / 2 - 40, 1, WHITE, BLACK);
while (1) {
// put chip to sleep
switch(mcupower) {
case PMU_MCU_SLEEP:
default:
LCDPutStr("SLEEP ", MAX_X / 2 - 60, 10, WHITE, BLACK);
Chip_PMU_SleepState(LPC_PMU);
break;
case PMU_MCU_DEEP_SLEEP:
LCDPutStr("DEEP-SLEEP", MAX_X / 2 - 60, 10, WHITE, BLACK);
Chip_PMU_DeepSleepState(LPC_PMU);
break;
case PMU_MCU_POWER_DOWN:
LCDPutStr("POWER-DOWN", MAX_X / 2 - 60, 10, WHITE, BLACK);
Chip_PMU_PowerDownState(LPC_PMU);
break;
}
// start MRT timer channel 0
Chip_MRT_SetInterval(LPC_MRT_CH0, SystemCoreClock | MRT_INTVAL_LOAD);
Chip_MRT_SetMode(LPC_MRT_CH0,MRT_MODE_ONESHOT);
Chip_MRT_SetEnabled(LPC_MRT_CH0);
// turn on onboard LED
Chip_GPIO_SetPinState(LPC_GPIO_PORT,0,LED_PIN,false);
// start SCT
LPC_SCT->CTRL_L &= ~SCT_CTRL_HALT_L;
// wait for timeout
while(!RC5_timeout)
{};
// stop SCT
LPC_SCT->CTRL_L |= SCT_CTRL_HALT_L;
if (RC5_flag) {
// if frame received, output information on LCD
if((RC5_System != RC5_System_prev) || (RC5_Command != RC5_Command_prev)) {
cnt = 1;
}
else {
cnt++;
}
for (i = 3; i >= 0; i--){
LCDPutChar(ascii[(RC5_Frame >> (i * 4)) & 0x0F],MAX_X / 2 + 20,80+(3-i)*7,WHITE, BLACK);
if(i < 2) {
if((RC5_System!=RC5_System_prev) || (RC5_Command!=RC5_Command_prev)){
LCDPutChar(ascii[(RC5_System >> (i * 4)) & 0x0F],MAX_X / 2 + 5,66+(3-i)*7,WHITE, BLACK);
LCDPutChar(ascii[(RC5_Command >> (i * 4)) & 0x0F],MAX_X / 2 - 10,66+(3-i)*7,WHITE, BLACK);
}
}
LCDPutChar(ascii[(cnt >> (i * 4)) & 0x0F],MAX_X / 2 - 40,80+(3-i)*7,WHITE, BLACK);
}
LCDPutStr(RC5_Toggle ? "ON ":"OFF", MAX_X / 2 - 25, 80, WHITE, BLACK);
switch(RC5_Command) {
case 0x50:
mcupower = PMU_MCU_SLEEP;
break;
case 0x55:
if(RC5_Toggle){
spi0Transfer(SLEEPOUT);
spi0Transfer(DISPON);
}
else {
spi0Transfer(DISPOFF);
spi0Transfer(SLEEPIN);
}
break;
case 0x56:
mcupower = PMU_MCU_DEEP_SLEEP;
break;
case 0x6B:
mcupower = PMU_MCU_POWER_DOWN;
break;
}
RC5_System_prev = RC5_System;
RC5_Command_prev = RC5_Command;
}
// turn off onboard LED
Chip_GPIO_SetPinState(LPC_GPIO_PORT,0,LED_PIN,true);
// clear flags
RC5_flag = 0;
RC5_timeout = 0;
}
/**
* @brief Main UART/DMA program body
* @return Does not exit
*/
int main(void)
{
int bytes = 0, idx;
uint8_t buff[UARTRXBUFFSIZE];
SystemCoreClockUpdate();
Board_Init();
Init_UART_PinMux();
Board_LED_Set(0, false);
#if defined(USE_INTEGER_CLOCK)
/* Use main clock rate as base for UART baud rate divider */
Chip_Clock_SetUARTBaseClockRate(Chip_Clock_GetMainClockRate(), false);
#else
/* Use 128x expected UART baud rate for fractional baud mode. */
Chip_Clock_SetUARTBaseClockRate((115200 * 128), true);
#endif
/* Setup UART */
Chip_UART_Init(LPC_USART0);
Chip_UART_ConfigData(LPC_USART0, UART_CFG_DATALEN_8 | UART_CFG_PARITY_NONE | UART_CFG_STOPLEN_1);
Chip_UART_SetBaud(LPC_USART0, 115200);
/* Optional for low clock rates only: Chip_UART_SetBaudWithRTC32K(LPC_USART, 300); */
Chip_UART_Enable(LPC_USART0);
Chip_UART_TXEnable(LPC_USART0);
/* DMA initialization - enable DMA clocking and reset DMA if needed */
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_DMA);
Chip_SYSCTL_PeriphReset(RESET_DMA);
/* Initialize ROM API pointer */
pDMAApi = LPC_DMAD_API;
size_in_bytes = pDMAApi->dma_get_mem_size();
if (size_in_bytes > RAMBLOCK) {
/* Adjust RAMBLOCK size in this case */
return 1;
}
/* Setup DMA ROM driver, provided RAM blocks for DMA Handle */
dma_handle = pDMAApi->dma_setup(LPC_DMA_BASE, dma_ram_block);
/* Init UART 0 TX descriptor */
countTXDescUsed = 0;
/* Enable the DMA IRQ */
NVIC_EnableIRQ(DMA_IRQn);
/* Enqueue a bunch of strings in DMA transmit descriptors and start
transmit. In this use of DMA, the descriptors aren't chained, so
the DMA restarts the next queued descriptor in the DMA interrupt
handler. */
for (idx = 0; idx < DMASENDSTRCNT; idx++) {
sprintf(dmaSendStr[idx], "DMA send string (unlinked) #%d\r\n", idx);
dmaTXSend((uint8_t *) dmaSendStr[idx], strlen(dmaSendStr[idx]));
}
/* Wait for UART TX DMA channel to go inactive */
while (1) {
__WFI();
if (countTXDescUsed == 0) {
break;
}
}
/* Receive buffers are queued. The DMA interrupt will only trigger on a
full DMA buffer receive, so if the UART is idle, but the DMA is only
partially complete, the DMA interrupt won't fire. For UART data
receive where data is not continuous, a timeout method will be
required to flush the DMA when the DMA has pending data and no
data has been received on the UART in a specified timeout */
dmaRXQueue();
/* Get RX data via DMA and send it out on TX via DMA */
while (1) {
/* Sleep until something happens */
__WFI();
/* Did any data come in? */
bytes = checkRxData(buff);
if (bytes > 0) {
/* RX data received, send it via TX DMA */
dmaTXSend(buff, bytes);
}
}
return 1;
}
/**
* @brief main routine for ADC example
* @return Function should not exit
*/
int main(void)
{
SystemCoreClockUpdate();
Board_Init();
DEBUGSTR("ADC ROM sequencer demo\r\n");
/* Power up, enable clock and reset ADC0 */
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_ADC0_PD);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ADC0);
Chip_SYSCTL_PeriphReset(RESET_ADC0);
/* Power up, enable clock and reset ADC1 */
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_ADC1_PD);
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ADC1);
Chip_SYSCTL_PeriphReset(RESET_ADC1);
/* Power up the internal temperature sensor */
Chip_SYSCTL_PowerUp(SYSCTL_POWERDOWN_TS_PD);
#if defined(BOARD_NXP_LPCXPRESSO_1549)
/* Disables pullups/pulldowns and disable digital mode */
Chip_IOCON_PinMuxSet(LPC_IOCON, 0, 9, (IOCON_MODE_INACT | IOCON_ADMODE_EN));
/* Assign ADC1_1 to PIO0_9 via SWM (fixed pin) */
Chip_SWM_EnableFixedPin(SWM_FIXED_ADC1_1);
#else
#warning "No ADC setup for this example"
#endif
/* Initialize ROM API base address for ADC */
pAdcApi = LPC_ADCD_API;
size_in_bytes = pAdcApi->adc_get_mem_size();
if (size_in_bytes / 4 > RAMBLOCK_H) {
/* Adjust RAMBLOCK size in this case */
return 1;
}
/* ADC Handle Setup*/
adc_handle[0] = pAdcApi->adc_setup(LPC_ADC0_BASE, (uint8_t *) start_of_ram_block[0]);
adc_handle[1] = pAdcApi->adc_setup(LPC_ADC1_BASE, (uint8_t *) start_of_ram_block[1]);
/* ADC0 Config */
adc_cfg[0].system_clock = SystemCoreClock; /* System clock */
adc_cfg[0].adc_clock = 500000; /* ADC clock set to 500KHz for calibration*/
/* ADC1 Config */
adc_cfg[1].system_clock = SystemCoreClock; /* System clock */
adc_cfg[1].adc_clock = 500000; /* ADC clock set to 500KHz for calibration*/
pAdcApi->adc_calibration(adc_handle[0], &adc_cfg[0]);
pAdcApi->adc_calibration(adc_handle[1], &adc_cfg[1]);
/* ADC0 Config for Init */
adc_cfg[0].system_clock = SystemCoreClock; /* System clock */
adc_cfg[0].adc_clock = ADC_CLOCK_RATE; /* ADC clock */
adc_cfg[0].async_mode = 0; /* Synchronous mode */
adc_cfg[0].tenbit_mode = 0; /* 12 Bit ADC mode */
adc_cfg[0].lpwr_mode = 0; /* Disable low power mode */
adc_cfg[0].input_sel = ADC_INSEL_TS;
adc_cfg[0].seqa_ctrl = (ADC_SEQ_CTRL_CHANSEL(0) | ADC_SEQ_CTRL_MODE_EOS);
adc_cfg[0].channel_num = 1; /* Channel number is one higher than the maximum channel number used */
/* ADC1 Config for Init */
adc_cfg[1].system_clock = SystemCoreClock; /* System clock */
adc_cfg[1].adc_clock = ADC_CLOCK_RATE; /* ADC clock */
adc_cfg[1].async_mode = 0; /* Synchronous mode */
adc_cfg[1].tenbit_mode = 0; /* 12 Bit ADC mode */
adc_cfg[1].lpwr_mode = 0; /* Disable low power mode */
adc_cfg[1].seqa_ctrl = (ADC_SEQ_CTRL_CHANSEL(BOARD_ADC_CH) | ADC_SEQ_CTRL_MODE_EOS);
adc_cfg[1].thrsel = 0;
adc_cfg[1].thr0_low = ((1 * 0xFFF) / 4) << 4;
adc_cfg[1].thr0_high = ((3 * 0xFFF) / 4) << 4;
adc_cfg[1].thcmp_en = ADC_INTEN_CMP_ENABLE(ADC_INTEN_CMP_CROSSTH, BOARD_ADC_CH);
adc_cfg[1].channel_num = BOARD_ADC_CH + 1; /* Channel number is one higher than the maximum channel number used */
pAdcApi->adc_init(adc_handle[0], &adc_cfg[0]);
pAdcApi->adc_init(adc_handle[1], &adc_cfg[1]);
/* When using ADC ROM API's lower the priority of ADC Sequence completion interrupt when compared to the threshold interrupt*/
NVIC_SetPriority(ADC1_SEQA_IRQn, 1);
/* Enable related ADC NVIC interrupts */
NVIC_EnableIRQ(ADC0_SEQA_IRQn);
NVIC_EnableIRQ(ADC1_SEQA_IRQn);
NVIC_EnableIRQ(ADC1_THCMP);
/* This example uses the periodic sysTick to manually trigger the ADC,
but a periodic timer can be used in a match configuration to start
an ADC sequence without software intervention. */
SysTick_Config(Chip_Clock_GetSysTickClockRate() / TICKRATE_HZ);
/* Endless loop */
while (1) {
/* Sleep until something happens */
__WFI();
if (threshold1Crossed) {
threshold1Crossed = false;
DEBUGSTR("********ADC1 threshold event********\r\n");
}
/* Is a conversion sequence complete? */
if (sequence0Complete) {
sequence0Complete = false;
showValudeADC(LPC_ADC0);
}
if (sequence1Complete) {
sequence1Complete = false;
showValudeADC(LPC_ADC1);
}
}
/* Should not run to here */
return 0;
}
/* Initialize CRC engine */
void Chip_CRC_Init(void)
{
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_CRC);
Chip_SYSCTL_PeriphReset(RESET_CRC);
}
/**
* @brief Main program body
* @return Does not return
*/
int main(void)
{
uint32_t regVal;
/* Generic Initialization */
SystemCoreClockUpdate();
Board_Init();
/* Alarm/wake timer as chip wakeup source */
Chip_SYSCTL_EnablePeriphWakeup(SYSCTL_WAKEUP_WKTINT);
/* Enable and reset WKT clock */
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_WKT);
Chip_SYSCTL_PeriphReset(RESET_WKT);
/* Disable wakeup pad */
Chip_PMU_ClearPowerDownControl(LPC_PMU, PMU_DPDCTRL_WAKEPAD | PMU_DPDCTRL_LPOSCDPDEN);
/* Disable wakeup hysteresis by setting the bit (set to disable),
enable 10KHz oscillator for all power down modes including deep
power-down */
Chip_PMU_SetPowerDownControl(LPC_PMU, PMU_DPDCTRL_WAKEUPPHYS | PMU_DPDCTRL_LPOSCEN |
PMU_DPDCTRL_LPOSCDPDEN);
/* Enable WKT interrupt */
NVIC_EnableIRQ(WKT_IRQn);
/*
* Note that deep power down causes a reset when it wakes up.
* If the CPU was in deep power-down before the reset,
* then PCON, DPDFLAG will be set.
*
* This code clears DPDFLAG (by writing a one to it)
* then sets the RED LED for about 500ms.
*/
if (LPC_PMU->PCON & PMU_PCON_DPDFLAG) {
regVal = LPC_PMU->PCON;
regVal |= PMU_PCON_DPDFLAG;
LPC_PMU->PCON = regVal;
Board_LED_Set(0, true);
delay(0x100000);
}
/* Loop various tests */
while (1) {
/* You'll probably lose the debugger connection in the following
statements as the MCU goes into low power mode. */
/* Wakeup test with 10KHz clock, 1s wakeup, and PMU sleep state */
WakeupTest(WKT_CLKSRC_10KHZ, 1, PMU_MCU_SLEEP);
/* Wakeup test with 10KHz clock, 1s wakeup, and PMU deep sleep state */
WakeupTest(WKT_CLKSRC_10KHZ, 1, PMU_MCU_DEEP_SLEEP);
/* Wakeup test with 10KHz clock, 1s wakeup, and PMU MCU power down state */
WakeupTest(WKT_CLKSRC_10KHZ, 1, PMU_MCU_POWER_DOWN);
/* Wakeup test with 10KHz clock, 1s wakeup, and PMU MCU deep power down state */
WakeupTest(WKT_CLKSRC_10KHZ, 1, PMU_MCU_DEEP_PWRDOWN);
}
}
int main(void) {
USBD_API_INIT_PARAM_T usb_param;
USB_CORE_DESCS_T desc;
USBD_MSC_INIT_PARAM_T msc_param;
ErrorCode_t ret = LPC_OK;
USB_INTERFACE_DESCRIPTOR* pIntfDesc;
/* Initialize board and chip */
Board_Init();
Board_LED_Set(0, false);
Board_LED_Set(1, false);
Board_LED_Set(2, false);
/* Enable EEPROM clock and reset EEPROM controller */
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_EEPROM);
Chip_SYSCTL_PeriphReset(RESET_EEPROM);
/* enable clocks */
Chip_USB_Init();
/* initialize USBD ROM API pointer. */
g_pUsbApi = (const USBD_API_T *) LPC_ROM_API->pUSBD;
/* initialize call back structures */
memset((void *) &usb_param, 0, sizeof(USBD_API_INIT_PARAM_T));
usb_param.usb_reg_base = LPC_USB0_BASE;
/* WORKAROUND for artf44835 ROM driver BUG:
Code clearing STALL bits in endpoint reset routine corrupts memory area
next to the endpoint control data. For example When EP0, EP1_IN, EP1_OUT,
EP2_IN are used we need to specify 3 here. But as a workaround for this
issue specify 4. So that extra EPs control structure acts as padding buffer
to avoid data corruption. Corruption of padding memory doesn’t affect the
stack/program behaviour.
*/
usb_param.max_num_ep = 2 + 1;
usb_param.mem_base = USB_STACK_MEM_BASE;
usb_param.mem_size = USB_STACK_MEM_SIZE;
/* Set the USB descriptors */
desc.device_desc = (uint8_t *) USB_DeviceDescriptor;
desc.string_desc = (uint8_t *) USB_StringDescriptor;
/* Note, to pass USBCV test full-speed only devices should have both
* descriptor arrays point to same location and device_qualifier set
* to 0.
*/
desc.high_speed_desc = USB_FsConfigDescriptor;
desc.full_speed_desc = USB_FsConfigDescriptor;
desc.device_qualifier = 0;
/* USB Initialization */
ret = USBD_API->hw->Init(&g_hUsb, &desc, &usb_param);
if(ret == LPC_OK) {
usbd_msc_init();
memset((void *) &msc_param, 0, sizeof(USBD_MSC_INIT_PARAM_T));
msc_param.mem_base = usb_param.mem_base;
msc_param.mem_size = usb_param.mem_size;
msc_param.InquiryStr = InquiryStr;
msc_param.BlockCount = USBD_MSC_MemorySize / USBD_MSC_BlockSize;
msc_param.BlockSize = USBD_MSC_BlockSize;
msc_param.MemorySize = USBD_MSC_MemorySize;
pIntfDesc = (USB_INTERFACE_DESCRIPTOR*)((uint32_t)desc.high_speed_desc + USB_CONFIGURATION_DESC_SIZE);
// check we are referencing to the proper interface descriptor
if((pIntfDesc == 0) || (pIntfDesc->bInterfaceClass != USB_DEVICE_CLASS_STORAGE) || (pIntfDesc->bInterfaceSubClass != MSC_SUBCLASS_SCSI)) {
errorUSB();
}
msc_param.intf_desc = (uint8_t*)pIntfDesc;
// user defined functions
msc_param.MSC_Write = MSC_Write;
msc_param.MSC_Read = MSC_Read;
msc_param.MSC_Verify = MSC_Verify;
ret = USBD_API->msc->init(g_hUsb, &msc_param);
if(ret == LPC_OK) {
// enable USB interrupts
NVIC_EnableIRQ(USB0_IRQn);
// now connect
USBD_API->hw->Connect(g_hUsb, 1);
}
else {
errorUSB();
}
}
else {
errorUSB();
}
while (1) {
__WFI();
}
}
int main(void) {
uint32_t sysTickRate;
Board_Init();
#ifdef DEBUG
// Set up UART for debug
init_uart(115200);
putLineUART("\n");
#endif
// Enable EEPROM clock and reset EEPROM controller
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_EEPROM);
Chip_SYSCTL_PeriphReset(RESET_EEPROM);
// Set up clocking for SD lib
SystemCoreClockUpdate();
DWT_Init();
// Set up the FatFS Object
f_mount(fatfs,"",0);
// Initialize SD card
Board_LED_Color(LED_CYAN);
if(sd_reset(&cardinfo) != SD_OK) {
error(ERROR_SD_INIT);
}
sd_state = SD_READY;
// Setup config
Board_LED_Color(LED_CYAN);
configStart();
Board_LED_Color(LED_GREEN);
// Allow MSC mode on startup
msc_state = MSC_ENABLED;
// Log startup
log_string("Startup");
// Set up ADC for reading battery voltage
read_vBat_setup();
// Initialize ring buffer used to buffer raw data samples
rawBuff = RingBuffer_initWithBuffer(RAW_BUFF_SIZE, RAM1_BASE);
// Set up MRT used by pb and daq
Chip_MRT_Init();
NVIC_ClearPendingIRQ(MRT_IRQn);
NVIC_EnableIRQ(MRT_IRQn);
NVIC_SetPriority(MRT_IRQn, 0x02); // Set higher than systick, but lower than sampling
// Initialize push button
pb_init();
// Enable and setup SysTick Timer at a periodic rate
Chip_Clock_SetSysTickClockDiv(1);
sysTickRate = Chip_Clock_GetSysTickClockRate();
SysTick_Config(sysTickRate / TICKRATE_HZ1);
// Idle and run systick loop until triggered or plugged in as a USB device
system_state = STATE_IDLE;
enterIdleTime = Chip_RTC_GetCount(LPC_RTC);
// Wait for interrupts
while (1) {
__WFI();
}
return 0 ;
}
