/* UART read function for interrupt mode (using ring buffers) */
uint32_t Chip_UART_Interrupt_Receive(LPC_USART_Type *UARTx, uint8_t *rxbuf, uint8_t buflen)
{
uint8_t *data = (uint8_t *) rxbuf;
uint32_t bytes = 0;
/* Temporarily lock out UART receive interrupts during this
read so the UART receive interrupt won't cause problems
with the index values */
Chip_UART_IntConfig(UARTx, UART_INTCFG_RBR, DISABLE);
/* Loop until receive buffer ring is empty or
until max_bytes expires */
while ((buflen > 0) && (!(__BUF_IS_EMPTY(rb.rx_head, rb.rx_tail)))) {
/* Read data from ring buffer into user buffer */
*data = rb.rx[rb.rx_tail];
data++;
/* Update tail pointer */
__BUF_INCR(rb.rx_tail);
/* Increment data count and decrement buffer size count */
bytes++;
buflen--;
}
/* Re-enable UART interrupts */
Chip_UART_IntConfig(UARTx, UART_INTCFG_RBR, ENABLE);
return bytes;
}
/* DeInitialize Interrupt for UART */
static void App_Interrupt_DeInit(void)
{
/* Disable UART Rx interrupt */
Chip_UART_IntConfig(LPC_UART, UART_INTCFG_RBR, DISABLE);
/* Disable UART line status interrupt */
Chip_UART_IntConfig(LPC_UART, UART_INTCFG_RLS, DISABLE);
/* Disable Interrupt for UART channel */
NVIC_DisableIRQ(UARTx_IRQn);
}
/* Initialize Interrupt for UART */
static void App_Interrupt_Init(void)
{
/* Enable UART Rx interrupt */
Chip_UART_IntConfig(LPC_UART, UART_INTCFG_RBR, ENABLE);
/* Enable UART line status interrupt */
Chip_UART_IntConfig(LPC_UART, UART_INTCFG_RLS, ENABLE);
/*
* Do not enable transmit interrupt here, since it is handled by
* UART_Send() function, just to reset Tx Interrupt state for the
* first time
*/
Chip_UART_InitRingBuffer(LPC_UART);
/* Enable Interrupt for UART channel */
/* Priority = 1 */
NVIC_SetPriority(UARTx_IRQn, 1);
/* Enable Interrupt for UART channel */
NVIC_EnableIRQ(UARTx_IRQn);
}
/**
* @brief Main UART program body
* @return Always returns -1
*/
int main(void)
{
FlagStatus exitflag;
uint8_t buffer[10];
int ret = 0;
uint32_t len;
/* UART FIFO configuration Struct variable */
UART_FIFO_CFG_T UARTFIFOConfigStruct;
/* Auto baudrate configuration structure */
UART_AB_CFG_T ABConfig;
Board_Init();
Board_UART_Init(LPC_UART);
//#if (UARTNum != 0)
Chip_UART_Init(LPC_UART);
Chip_UART_SetBaud(LPC_UART, 115200);
Chip_UART_ConfigData(LPC_UART, UART_DATABIT_8, UART_PARITY_NONE, UART_STOPBIT_1); /* Default 8-N-1 */
/* Enable UART Transmit */
Chip_UART_TxCmd(LPC_UART, ENABLE);
//#endif
Chip_UART_Send(LPC_UART, "F**K OFF\n",10, BLOCKING);
Chip_UART_FIFOConfigStructInit(LPC_UART, &UARTFIFOConfigStruct);
/* Enable DMA mode in UART */
UARTFIFOConfigStruct.FIFO_DMAMode = ENABLE;
/* Initialize FIFO for UART0 peripheral */
Chip_UART_FIFOConfig(LPC_UART, &UARTFIFOConfigStruct);
/* Enable UART End of Auto baudrate interrupt */
Chip_UART_IntConfig(LPC_UART, UART_INTCFG_ABEO, ENABLE);
/* Enable UART Auto baudrate timeout interrupt */
Chip_UART_IntConfig(LPC_UART, UART_INTCFG_ABTO, ENABLE);
/* preemption = 1, sub-priority = 1 */
NVIC_SetPriority(UARTx_IRQn, 1);
/* Enable Interrupt for UART0 channel */
NVIC_EnableIRQ(UARTx_IRQn);
// /* ---------------------- Auto baud rate section ----------------------- */
// /* Configure Auto baud rate mode */
// ABConfig.ABMode = UART_AUTOBAUD_MODE0;
// ABConfig.AutoRestart = ENABLE;
//
// /* Start auto baudrate mode */
// Chip_UART_ABCmd(LPC_UART, &ABConfig, ENABLE);
//
//
// /* Loop until auto baudrate mode complete */
// while (Chip_UART_GetABEOStatus(LPC_UART) == RESET) {}
//
// Chip_UART_Send(LPC_UART, uartABComplete, sizeof(uartABComplete), BLOCKING);
/* Disable UART Interrupt */
NVIC_DisableIRQ(UARTx_IRQn);
/* Print welcome screen */
Print_Menu_Polling();
exitflag = RESET;
/* Read some data from the buffer */
while (exitflag == RESET) {
len = 0;
while (len == 0) {
len = Chip_UART_Receive(LPC_UART, buffer, 1, NONE_BLOCKING);
}
if (buffer[0] == 27) {
/* ESC key, set exit flag */
Chip_UART_Send(LPC_UART, uartPolling_menu3, sizeof(uartPolling_menu3), BLOCKING);
ret = -1;
exitflag = SET;
}
else if (buffer[0] == 'c') {
Chip_UART_Send(LPC_UART, uartPolling_menu4, sizeof(uartPolling_menu4), BLOCKING);
len = 0;
while (len == 0) {
len = Chip_UART_Receive(LPC_UART, buffer, sizeof(buffer), NONE_BLOCKING);
if ((buffer[0] != '1') && (buffer[0] != '2') && (buffer[0] != '3')) {
len = 0;
}
}
switch (buffer[0]) {
case '1': /* Polling Mode */
Chip_UART_Send(LPC_UART, uartPolling_menu5, sizeof(uartPolling_menu5), BLOCKING);
break;
case '2': /* Interrupt Mode */
ret = 2;
/* Exitflag = SET; */
App_Interrupt_Test();
Print_Menu_Polling();
break;
case '3': /* DMA mode */
ret = 3;
App_DMA_Test();
Print_Menu_Polling();
break;
}
}
}
/* Wait for current transmission complete - THR must be empty */
while (Chip_UART_CheckBusy(LPC_UART) == SET) {}
/* DeInitialize UART0 peripheral */
Chip_UART_DeInit(LPC_UART);
return ret;
}
platform_result_t platform_uart_init( platform_uart_driver_t* driver, const platform_uart_t* interface, const platform_uart_config_t* config, wiced_ring_buffer_t* optional_ring_buffer )
{
uint32_t uart_number;
UART_FIFO_CFG_T UARTFIFOConfigStruct;
config_uart_data_t config_uart_data;
wiced_assert( "bad argument", ( driver != NULL ) && ( interface != NULL ) && ( config != NULL ) );
Chip_Clock_EnablePeriphClock( SYSCTL_CLOCK_UART0 );
uart_number = platform_uart_get_port_number(interface->uart_base);
driver->rx_size = 0;
driver->tx_size = 0;
driver->last_transmit_result = PLATFORM_SUCCESS;
driver->last_receive_result = PLATFORM_SUCCESS;
driver->interface = (platform_uart_t*)interface;
host_rtos_init_semaphore( &driver->tx_complete );
host_rtos_init_semaphore( &driver->rx_complete );
platform_gpio_set_alternate_function( &driver->interface->tx_pin);
platform_gpio_set_alternate_function( &driver->interface->rx_pin);
/* Initialise USART peripheral */
Chip_UART_FIFOConfigStructInit( driver->interface->uart_base, &UARTFIFOConfigStruct );
Chip_UART_Init( driver->interface->uart_base );
Chip_UART_SetBaud( driver->interface->uart_base, config->baud_rate );
config_uart_data.databits = ( ( config->data_width == DATA_WIDTH_8BIT ) || ( ( config->data_width == DATA_WIDTH_7BIT ) && ( config->parity != NO_PARITY ) ) ) ? UART_DATABIT_8 : UART_DATABIT_7;
config_uart_data.stopbits = ( config->stop_bits == STOP_BITS_1 ) ? UART_STOPBIT_1 : UART_STOPBIT_2;
switch ( config->parity )
{
case NO_PARITY:
config_uart_data.parity = UART_PARITY_NONE;
break;
case EVEN_PARITY:
config_uart_data.parity = UART_PARITY_EVEN;
break;
case ODD_PARITY:
config_uart_data.parity = UART_PARITY_ODD;
break;
default:
return WICED_BADARG;
}
Chip_UART_ConfigData( driver->interface->uart_base, config_uart_data.databits, config_uart_data.parity, config_uart_data.stopbits );
Chip_UART_TxCmd( driver->interface->uart_base, ENABLE );
/* Enable receive data and line status interrupt */
/* Initialize FIFO for UART0 peripheral */
Chip_UART_FIFOConfig( driver->interface->uart_base, &UARTFIFOConfigStruct );
/* Enable UART Rx interrupt */
Chip_UART_IntConfig( driver->interface->uart_base, UART_INTCFG_RBR, ENABLE );
/* Enable UART line status interrupt */
Chip_UART_IntConfig( driver->interface->uart_base, UART_INTCFG_RLS, ENABLE );
/* Enable Interrupt for UART channel */
NVIC_DisableIRQ( uart_irq_vectors[ uart_number ] );
NVIC_ClearPendingIRQ( uart_irq_vectors[ uart_number ] );
/*Note the LPC uses 5 bits for interrupt priority levels*/
NVIC_EnableIRQ( uart_irq_vectors[ uart_number ] );
if ( optional_ring_buffer != NULL )
{
/* Note that the ring_buffer should've been initialised first */
driver->rx_buffer = optional_ring_buffer;
driver->rx_size = 0;
}
return PLATFORM_SUCCESS;
}
/* UART transmit function for interrupt mode (using ring buffers) */
uint32_t Chip_UART_Interrupt_Transmit(LPC_USART_Type *UARTx, uint8_t *txbuf, uint8_t buflen)
{
uint8_t *data = (uint8_t *) txbuf;
uint32_t bytes = 0;
/* Temporarily lock out UART transmit interrupts during this
read so the UART transmit interrupt won't cause problems
with the index values */
Chip_UART_IntConfig(UARTx, UART_INTCFG_THRE, DISABLE);
/* Loop until transmit run buffer is full or until n_bytes
expires */
while ((buflen > 0) && (!__BUF_IS_FULL(rb.tx_head, rb.tx_tail))) {
/* Write data from buffer into ring buffer */
rb.tx[rb.tx_head] = *data;
data++;
/* Increment head pointer */
__BUF_INCR(rb.tx_head);
/* Increment data count and decrement buffer size count */
bytes++;
buflen--;
}
/*
* Check if current Tx interrupt enable is reset,
* that means the Tx interrupt must be re-enabled
* due to call UART_IntTransmit() function to trigger
* this interrupt type
*/
if (TxIntStat == RESET) {
// Disable THRE interrupt
Chip_UART_IntConfig(UARTx, UART_INTCFG_THRE, DISABLE);
/* Wait for FIFO buffer empty, transfer UART_TX_FIFO_SIZE bytes
* of data or break whenever ring buffers are empty */
/* Wait until THR empty */
while (Chip_UART_CheckBusy(UARTx) == SET) ;
while (!__BUF_IS_EMPTY(rb.tx_head, rb.tx_tail)) {
/* Move a piece of data into the transmit FIFO */
if (Chip_UART_Send(UARTx, (uint8_t *) &rb.tx[rb.tx_tail], 1, NONE_BLOCKING)) {
/* Update transmit ring FIFO tail pointer */
__BUF_INCR(rb.tx_tail);
}
else {
break;
}
}
/* If there is no more data to send, disable the transmit
interrupt - else enable it or keep it enabled */
if (__BUF_IS_EMPTY(rb.tx_head, rb.tx_tail)) {
Chip_UART_IntConfig(UARTx, UART_INTCFG_THRE, DISABLE);
/* Reset Tx Interrupt state */
TxIntStat = RESET;
}
else {
/* Set Tx Interrupt state */
TxIntStat = SET;
Chip_UART_IntConfig(UARTx, UART_INTCFG_THRE, ENABLE);
}
}
/*
* Otherwise, re-enables Tx Interrupt
*/
else {
Chip_UART_IntConfig(UARTx, UART_INTCFG_THRE, ENABLE);
}
return bytes;
}
/* UART interrupt service routine */
void Chip_UART_Interrupt_Handler(LPC_USART_Type *UARTx)
{
uint8_t tmpc;
uint32_t rLen;
UART_INT_STATUS_Type Sts = Chip_UART_GetIntStatus(UARTx);
if (Sts == UART_INTSTS_ERROR) {
return; /* error */
}
if (Sts & UART_INTSTS_RTR) { /* ready for Read Data */
while (1) {
/* Call UART read function in UART driver */
rLen = Chip_UART_Receive(UARTx, &tmpc, 1, NONE_BLOCKING);
/* If data received */
if (rLen) {
/* Check if buffer is more space
* If no more space, remaining character will be trimmed out
*/
if (!__BUF_IS_FULL(rb.rx_head, rb.rx_tail)) {
rb.rx[rb.rx_head] = tmpc;
__BUF_INCR(rb.rx_head);
}
}
/* no more data */
else {
break;
}
}
}
if (Sts & UART_INTSTS_RTS) { /* ready for Write Data */
/* Disable THRE interrupt */
Chip_UART_IntConfig(UARTx, UART_INTCFG_THRE, DISABLE);
/* Wait for FIFO buffer empty, transfer UART_TX_FIFO_SIZE bytes
* of data or break whenever ring buffers are empty */
/* Wait until THR empty */
while (Chip_UART_CheckBusy(UARTx) == SET) ;
while (!__BUF_IS_EMPTY(rb.tx_head, rb.tx_tail)) {
/* Move a piece of data into the transmit FIFO */
if (Chip_UART_Send(UARTx, (uint8_t *) &rb.tx[rb.tx_tail], 1, NONE_BLOCKING)) {
/* Update transmit ring FIFO tail pointer */
__BUF_INCR(rb.tx_tail);
}
else {
break;
}
}
/* If there is no more data to send, disable the transmit
interrupt - else enable it or keep it enabled */
if (__BUF_IS_EMPTY(rb.tx_head, rb.tx_tail)) {
Chip_UART_IntConfig(UARTx, UART_INTCFG_THRE, DISABLE);
// Reset Tx Interrupt state
TxIntStat = RESET;
}
else {
/* Set Tx Interrupt state */
TxIntStat = SET;
Chip_UART_IntConfig(UARTx, UART_INTCFG_THRE, ENABLE);
}
}
if(Sts & UART_INTSTS_ABEO)
Chip_UART_ABClearIntPending(UARTx, UART_INTSTS_ABEO);
if (Sts & UART_INTSTS_ABTO)
Chip_UART_ABClearIntPending(UARTx, UART_INTSTS_ABTO);
if (ABsyncSts == RESET)
{
/* Interrupt caused by End of auto-baud */
if (Sts & UART_INTSTS_ABEO){
// Disable AB interrupt
Chip_UART_IntConfig(UARTx, UART_INTCFG_ABEO, DISABLE);
// Set Sync flag
ABsyncSts = SET;
}
/* Auto-Baudrate Time-Out interrupt (not implemented) */
if (Sts & UART_INTSTS_ABTO) {
/* Disable this interrupt - Add your code here */
Chip_UART_IntConfig(UARTx, UART_INTCFG_ABTO, DISABLE);
}
}
}