uint8_t cc1101_t::ReadFIFO(void *Ptr, int8_t *PRssi) {
uint8_t b, *p = (uint8_t*)Ptr;
// Check if received successfully
b = ReadRegister(CC_PKTSTATUS);
// Uart.Printf("St: %X ", b);
if(b & 0x80) { // CRC OK
// Read FIFO
CsLo(); // Start transmission
if(BusyWait() != OK) { // Wait for chip to become ready
CsHi();
return FAILURE;
}
ISpi.ReadWriteByte(CC_FIFO|CC_READ_FLAG|CC_BURST_FLAG); // Address with read & burst flags
for(uint8_t i=0; i<IPktSz; i++) { // Read bytes
b = ISpi.ReadWriteByte(0);
*p++ = b;
// Uart.Printf(" %X", b);
}
// Receive two additional info bytes
b = ISpi.ReadWriteByte(0); // RSSI
ISpi.ReadWriteByte(0); // LQI
CsHi(); // End transmission
if(PRssi != nullptr) *PRssi = RSSI_dBm(b);
return OK;
}
else return FAILURE;
}
uint8_t cc1101_t::ReadRegister (uint8_t ARegAddr) {
CsLo(); // Start transmission
if(BusyWait() != OK) { // Wait for chip to become ready
CsHi();
return FAILURE;
}
ISpi.ReadWriteByte(ARegAddr | CC_READ_FLAG); // Transmit header byte
uint8_t FReply = ISpi.ReadWriteByte(0); // Read reply
CsHi(); // End transmission
return FReply;
}
uint8_t cc1101_t::WriteRegister (uint8_t ARegAddr, uint8_t AData) {
CsLo(); // Start transmission
if(BusyWait() != OK) { // Wait for chip to become ready
CsHi();
return FAILURE;
}
ISpi.ReadWriteByte(ARegAddr); // Transmit header byte
ISpi.ReadWriteByte(AData); // Write data
CsHi(); // End transmission
return OK;
}
uint8_t cc1101_t::WriteStrobe (uint8_t AStrobe) {
CsLo(); // Start transmission
if(BusyWait() != OK) { // Wait for chip to become ready
CsHi();
return FAILURE;
}
IState = ISpi.ReadWriteByte(AStrobe); // Write strobe
CsHi(); // End transmission
IState &= 0b01110000; // Mask needed bits
return OK;
}
void cc1101_t::Init() {
// ==== GPIO ====
PinSetupOut (GPIOA, CC_CS, omPushPull, pudNone);
PinSetupAlterFunc(GPIOA, CC_SCK, omPushPull, pudNone, AF5);
PinSetupAlterFunc(GPIOA, CC_MISO, omPushPull, pudNone, AF5);
PinSetupAlterFunc(GPIOA, CC_MOSI, omPushPull, pudNone, AF5);
PinSetupIn (GPIOA, CC_GDO0, pudNone);
PinSetupIn (GPIOA, CC_GDO2, pudNone);
CsHi();
// ==== SPI ==== MSB first, master, SCK idle low, Baudrate=f/2
rccEnableSPI1(FALSE);
// NoCRC, FullDuplex, 8bit, MSB, Baudrate, Master, ClkLowIdle(CPOL=0),
// FirstEdge(CPHA=0), NSS software controlled and is 1
CC_SPI->CR1 = SPI_CR1_SSM | SPI_CR1_SSI | SPI_CR1_MSTR;
CC_SPI->CR2 = 0;
CC_SPI->I2SCFGR &= ~((uint16_t)SPI_I2SCFGR_I2SMOD);
CC_SPI->CR1 |= SPI_CR1_SPE; // Enable SPI
// ==== Init CC ====
CReset();
FlushRxFIFO();
RfConfig();
// ==== IRQ ====
rccEnableAPB2(RCC_APB2ENR_SYSCFGEN, FALSE); // Enable sys cfg controller
SYSCFG->EXTICR[1] &= 0xFFFFFFF0; // EXTI4 is connected to PortA
// Configure EXTI line
EXTI->IMR |= GPIO0_IRQ_MASK; // Interrupt mode enabled
EXTI->EMR &= ~GPIO0_IRQ_MASK; // Event mode disabled
EXTI->RTSR &= ~GPIO0_IRQ_MASK; // Rising trigger disabled
EXTI->FTSR |= GPIO0_IRQ_MASK; // Falling trigger enabled
EXTI->PR = GPIO0_IRQ_MASK; // Clean irq flag
nvicEnableVector(EXTI4_IRQn, CORTEX_PRIORITY_MASK(STM32_EXT_EXTI4_IRQ_PRIORITY));
}
void cc1101_t::WriteStrobe (uint8_t AStrobe) {
CsLo(); // Start transmission
BusyWait(); // Wait for chip to become ready
IState = ISpi.ReadWriteByte(AStrobe); // Write strobe
CsHi(); // End transmission
IState &= 0b01110000; // Mask needed bits
}
uint8_t cc1101_t::Init() {
// ==== GPIO ====
PinSetupOut (CC_GPIO, CC_CS, omPushPull);
PinSetupAlterFunc(CC_GPIO, CC_SCK, omPushPull, pudNone, CC_SPI_AF);
PinSetupAlterFunc(CC_GPIO, CC_MISO, omPushPull, pudNone, CC_SPI_AF);
PinSetupAlterFunc(CC_GPIO, CC_MOSI, omPushPull, pudNone, CC_SPI_AF);
IGdo0.Init(ttFalling);
//PinSetupAnalog (CC_GPIO, CC_GDO2); // GDO2 not used
CsHi();
// ==== SPI ====
// MSB first, master, ClkLowIdle, FirstEdge, Baudrate no more than 6.5MHz
ISpi.Setup(boMSB, cpolIdleLow, cphaFirstEdge, sbFdiv16);
ISpi.Enable();
// ==== Init CC ====
if(Reset() != OK) {
ISpi.Disable();
Uart.Printf("\rCC Rst Fail");
return FAILURE;
}
// Check if success
WriteRegister(CC_PKTLEN, 7);
uint8_t Rpl = ReadRegister(CC_PKTLEN);
if(Rpl != 7) {
ISpi.Disable();
Uart.Printf("\rCC R/W Fail; rpl=%u", Rpl);
return FAILURE;
}
// Proceed with init
FlushRxFIFO();
RfConfig();
IGdo0.EnableIrq(IRQ_PRIO_HIGH);
return OK;
}
void cc1101_t::WriteRegister (uint8_t ARegAddr, uint8_t AData) {
CsLo(); // Start transmission
BusyWait(); // Wait for chip to become ready
ISpi.ReadWriteByte(ARegAddr); // Transmit header byte
ISpi.ReadWriteByte(AData); // Write data
CsHi(); // End transmission
}
uint8_t cc1101_t::WriteTX(uint8_t* Ptr, uint8_t Length) {
CsLo(); // Start transmission
if(BusyWait() != OK) { // Wait for chip to become ready
CsHi();
return FAILURE;
}
ISpi.ReadWriteByte(CC_FIFO|CC_WRITE_FLAG|CC_BURST_FLAG); // Address with write & burst flags
//Uart.Printf("TX: ");
for(uint8_t i=0; i<Length; i++) {
uint8_t b = *Ptr++;
ISpi.ReadWriteByte(b); // Write bytes
// Uart.Printf("%X ", b);
}
CsHi(); // End transmission
//Uart.Printf("\r");
return OK;
}
void Adc_t::IrqDmaHandler() {
chSysLockFromISR();
ISpi.Disable();
CsHi();
dmaStreamDisable(DMA_ADC);
IRslt = __REV(IRslt);
IRslt >>= 10;
IRslt &= 0xFFFF;
Rslt = IRslt;
// Uart.PrintfI("%u\r", Rslt);
App.SignalEvtI(EVTMSK_ADC_DONE);
chSysUnlockFromISR();
}
void cc1101_t::WriteTX(uint8_t* Ptr, uint8_t Length) {
CsLo(); // Start transmission
BusyWait(); // Wait for chip to become ready
ReadWriteByte(CC_FIFO|CC_WRITE_FLAG|CC_BURST_FLAG); // Address with write & burst flags
uint8_t b;
//Uart.Printf("TX: ");
for (uint8_t i=0; i<Length; i++) {
b = *Ptr++;
ReadWriteByte(b); // Write bytes
// Uart.Printf("%X ", b);
}
CsHi(); // End transmission
//Uart.Printf("\r");
}
void Adc_t::Init() {
PinSetupOut(ADC_GPIO, ADC_CSIN_PIN, omPushPull, pudNone);
PinSetupAlterFunc(ADC_GPIO, ADC_SCK_PIN, omPushPull, pudNone, ADC_SPI_AF);
PinSetupAlterFunc(ADC_GPIO, ADC_DOUT_PIN, omPushPull, pudNone, ADC_SPI_AF);
CsHi();
// ==== SPI ==== MSB first, master, ClkLowIdle, FirstEdge, Baudrate=...
// Select baudrate (2.4MHz max): APB=32MHz => div = 16
ISpi.Setup(SPI_ADC, boMSB, cpolIdleLow, cphaFirstEdge, sbFdiv16);
ISpi.SetRxOnly();
ISpi.EnableRxDma();
// ==== DMA ====
dmaStreamAllocate (DMA_ADC, IRQ_PRIO_MEDIUM, SIrqDmaHandler, NULL);
dmaStreamSetPeripheral(DMA_ADC, &SPI_ADC->DR);
dmaStreamSetMode (DMA_ADC, ADC_DMA_MODE);
}
uint16_t Adc_t::Measure() {
ISpi.Enable();
CsLo();
uint8_t b;
uint32_t r = 0;
b = ISpi.ReadWriteByte(0);
r = b;
b = ISpi.ReadWriteByte(0);
r = (r << 8) | b;
b = ISpi.ReadWriteByte(0);
r = (r << 8) | b;
CsHi();
ISpi.Disable();
r >>= 2;
r &= 0xFFFF;
return r;
}
uint8_t cc1101_t::ReadFifo(uint8_t *PBuf, uint8_t Length) {
uint8_t b, Cnt=0;
Cnt = ReadRegister(CC_RXBYTES);
b = ReadRegister(CC_PKTSTATUS);
//Uart.Printf("Sz: %X; st: %X\r", Cnt, b);
if(b & 0x80) {
CsLo(); // Start transmission
//BusyWait(); // Wait for chip to become ready
ReadWriteByte(CC_FIFO|CC_READ_FLAG|CC_BURST_FLAG); // Address with read & burst flags
for (uint8_t i=0; i<Length; i++) { // Read bytes
b = ReadWriteByte(0);
*PBuf++ = b;
//Uart.Printf(" %X", b);
}
CsHi(); // End transmission
}
else Cnt = 0; // Signal that nothing was read
FlushRxFIFO();
return 1;
}
void cc1101_t::Init() {
// ==== GPIO ====
PinSetupOut (CC_GPIO, CC_CS, omPushPull, pudNone);
PinSetupAlterFunc(CC_GPIO, CC_SCK, omPushPull, pudNone, AF5);
PinSetupAlterFunc(CC_GPIO, CC_MISO, omPushPull, pudNone, AF5);
PinSetupAlterFunc(CC_GPIO, CC_MOSI, omPushPull, pudNone, AF5);
PinSetupIn (CC_GPIO, CC_GDO0, pudNone);
PinSetupIn (CC_GPIO, CC_GDO2, pudNone);
CsHi();
// ==== SPI ==== MSB first, master, ClkLowIdle, FirstEdge, Baudrate=f/2
ISpi.Setup(CC_SPI, boMSB, cpolIdleLow, cphaFirstEdge, sbFdiv2);
ISpi.Enable();
// ==== Init CC ====
CReset();
FlushRxFIFO();
RfConfig();
PWaitingThread = nullptr;
// ==== IRQ ====
IGdo0.Setup(CC_GPIO, CC_GDO0, ttFalling);
IGdo0.EnableIrq(IRQ_PRIO_HIGH);
}
uint8_t cc1101_t::ReadFIFO(rPkt_t *pPkt) {
uint8_t b, *p = (uint8_t*)pPkt;
// Check if received successfully
b = ReadRegister(CC_PKTSTATUS);
// Uart.Printf("St: %X ", b);
if(b & 0x80) { // CRC OK
// Read FIFO
CsLo(); // Start transmission
BusyWait(); // Wait for chip to become ready
ReadWriteByte(CC_FIFO|CC_READ_FLAG|CC_BURST_FLAG); // Address with read & burst flags
for(uint8_t i=0; i<RPKT_LEN; i++) { // Read bytes
b = ReadWriteByte(0);
*p++ = b;
// Uart.Printf(" %X", b);
}
// Receive two additional info bytes
b = ReadWriteByte(0); // RSSI
ReadWriteByte(0); // LQI
CsHi(); // End transmission
pPkt->RSSI = RSSI_dBm(b);
return OK;
}
else return FAILURE;
}
void cc1101_t::Init() {
// ==== GPIO ====
PinSetupOut(GPIOA, CC_CS, omPushPull);
PinSetupAlterFuncOutput(GPIOA, CC_SCK, omPushPull);
PinSetupAlterFuncOutput(GPIOA, CC_MISO, omPushPull);
PinSetupAlterFuncOutput(GPIOA, CC_MOSI, omPushPull);
PinSetupIn(GPIOA, CC_GDO0, pudNone);
PinSetupIn(GPIOA, CC_GDO2, pudNone);
CsHi();
// ==== SPI ==== MSB first, master, ClkLowIdle, FirstEdge, Baudrate=f/2
SpiSetup(CC_SPI, boMSB, cpolIdleLow, cphaFirstEdge, sbFdiv2);
SpiEnable(CC_SPI);
// ==== Init CC ====
CReset();
FlushRxFIFO();
RfConfig();
chEvtInit(&IEvtSrcRx);
chEvtInit(&IEvtSrcTx);
State = ccIdle;
// ==== IRQ ====
RCC->APB2ENR |= RCC_APB2ENR_AFIOEN; // Enable AFIO clock
uint8_t tmp = CC_GDO0 / 4; // Indx of EXTICR register
uint8_t Shift = (CC_GDO0 & 0x03) * 4;
AFIO->EXTICR[tmp] &= ~((uint32_t)0b1111 << Shift); // Clear bits and leave clear to select GPIOA
tmp = 1<<CC_GDO0; // IRQ mask
// Configure EXTI line
EXTI->IMR |= tmp; // Interrupt mode enabled
EXTI->EMR &= ~tmp; // Event mode disabled
EXTI->RTSR &= ~tmp; // Rising trigger disabled
EXTI->FTSR |= tmp; // Falling trigger enabled
EXTI->PR = tmp; // Clean irq flag
nvicEnableVector(EXTI4_IRQn, CORTEX_PRIORITY_MASK(IRQ_PRIO_MEDIUM));
}
