static void qdev_pci_bridge_dev_reset(DeviceState *qdev) { PCIDevice *dev = PCI_DEVICE(qdev); pci_bridge_reset(qdev); if (shpc_present(dev)) { shpc_reset(dev); } } static Property pci_bridge_dev_properties[] = { /* Note: 0 is not a legal chassis number. */ DEFINE_PROP_UINT8(PCI_BRIDGE_DEV_PROP_CHASSIS_NR, PCIBridgeDev, chassis_nr, 0), DEFINE_PROP_ON_OFF_AUTO(PCI_BRIDGE_DEV_PROP_MSI, PCIBridgeDev, msi, ON_OFF_AUTO_AUTO), DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_SHPC, PCIBridgeDev, flags, PCI_BRIDGE_DEV_F_SHPC_REQ, true), DEFINE_PROP_END_OF_LIST(), }; static bool pci_device_shpc_present(void *opaque, int version_id) { PCIDevice *dev = opaque; return shpc_present(dev); } static const VMStateDescription pci_bridge_dev_vmstate = { .name = "pci_bridge", .fields = (VMStateField[]) {
static const VMStateDescription ivshmem_plain_vmsd = { .name = TYPE_IVSHMEM_PLAIN, .version_id = 0, .minimum_version_id = 0, .pre_load = ivshmem_pre_load, .post_load = ivshmem_post_load, .fields = (VMStateField[]) { VMSTATE_PCI_DEVICE(parent_obj, IVShmemState), VMSTATE_UINT32(intrstatus, IVShmemState), VMSTATE_UINT32(intrmask, IVShmemState), VMSTATE_END_OF_LIST() }, }; static Property ivshmem_plain_properties[] = { DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState, master, ON_OFF_AUTO_OFF), DEFINE_PROP_END_OF_LIST(), }; static void ivshmem_plain_init(Object *obj) { IVShmemState *s = IVSHMEM_PLAIN(obj); object_property_add_link(obj, "memdev", TYPE_MEMORY_BACKEND, (Object **)&s->hostmem, ivshmem_check_memdev_is_busy, OBJ_PROP_LINK_UNREF_ON_RELEASE, &error_abort); } static void ivshmem_plain_realize(PCIDevice *dev, Error **errp)