/**
* Set the register offset for the next Register Access Read/Write
*/
static ssize_t regoffset_store(struct device *_dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev);
uint32_t offset = simple_strtoul(buf, NULL, 16);
#if defined(LM_INTERFACE) || defined(PLATFORM_INTERFACE)
if (offset < SZ_256K) {
#elif defined(PCI_INTERFACE)
if (offset < 0x00040000) {
#endif
otg_dev->os_dep.reg_offset = offset;
} else {
dev_err(_dev, "invalid offset\n");
}
return count;
}
DEVICE_ATTR(regoffset, S_IRUGO | S_IWUSR, regoffset_show, regoffset_store);
/**
* Show the value of the register at the offset in the reg_offset
* attribute.
*/
static ssize_t regvalue_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
dwc_otg_device_t *otg_dev = dwc_otg_drvdev(_dev);
uint32_t val;
volatile uint32_t *addr;
if (otg_dev->os_dep.reg_offset != 0xFFFFFFFF && 0 != otg_dev->os_dep.base) {
/* Calculate the address */
addr = (uint32_t *) (otg_dev->os_dep.reg_offset +
(uint8_t *) otg_dev->os_dep.base);
val = DWC_READ_REG32(addr);
return snprintf(buf,
sizeof("Reg@0xFFFFFFFF = 0xFFFFFFFF\n") + 1,
"Reg@0x%06x = 0x%08x\n", otg_dev->os_dep.reg_offset,
val);
} else {
dev_err(_dev, "Invalid offset (0x%0x)\n", otg_dev->os_dep.reg_offset);
return sprintf(buf, "invalid offset\n");
}
}
/**
* Set the register offset for the next Register Access Read/Write
*/
static ssize_t regoffset_store(struct device *_dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
uint32_t offset = simple_strtoul(buf, NULL, 16);
#if defined(PCI_INTERFACE)
if (offset < 0x00040000) {
#else
if (offset < SZ_256K) {
#endif
otg_dev->reg_offset = offset;
} else {
dev_err(_dev, "invalid offset\n");
}
return count;
}
DEVICE_ATTR(regoffset, S_IRUGO | S_IWUSR, regoffset_show, regoffset_store);
/**
* Show the value of the register at the offset in the reg_offset
* attribute.
*/
static ssize_t regvalue_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
uint32_t val;
volatile uint32_t *addr;
if (otg_dev->reg_offset != 0xFFFFFFFF && 0 != otg_dev->base) {
/* Calculate the address */
addr = (uint32_t *)(otg_dev->reg_offset +
(uint8_t *)otg_dev->base);
val = dwc_read_reg32(addr);
return snprintf(buf,
sizeof("Reg@0xFFFFFFFF = 0xFFFFFFFF\n") + 1,
"Reg@0x%06x = 0x%08x\n", otg_dev->reg_offset,
val);
} else {
dev_err(_dev, "Invalid offset (0x%0x)\n", otg_dev->reg_offset);
return sprintf(buf, "invalid offset\n");
}
}
/**
* Store the value in the register at the offset in the reg_offset
* attribute.
*
*/
static ssize_t regvalue_store(struct device *_dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
volatile uint32_t *addr;
uint32_t val = simple_strtoul(buf, NULL, 16);
/* dev_dbg(_dev, "Offset=0x%08x Val=0x%08x\n", otg_dev->reg_offset, val); */
if (otg_dev->reg_offset != 0xFFFFFFFF && 0 != otg_dev->base) {
/* Calculate the address */
addr = (uint32_t *)(otg_dev->reg_offset +
(uint8_t *)otg_dev->base);
dwc_write_reg32(addr, val);
} else {
dev_err(_dev, "Invalid Register Offset (0x%08x)\n",
otg_dev->reg_offset);
}
return count;
}
DEVICE_ATTR(regvalue, S_IRUGO | S_IWUSR, regvalue_show, regvalue_store);
/*
* Attributes
*/
DWC_OTG_DEVICE_ATTR_BITFIELD_RO(mode, "Mode");
DWC_OTG_DEVICE_ATTR_BITFIELD_RW(hnpcapable, "HNPCapable");
DWC_OTG_DEVICE_ATTR_BITFIELD_RW(srpcapable, "SRPCapable");
DWC_OTG_DEVICE_ATTR_BITFIELD_RW(hsic_connect, "HSIC Connect");
DWC_OTG_DEVICE_ATTR_BITFIELD_RW(inv_sel_hsic, "Invert Select HSIC");
/* DWC_OTG_DEVICE_ATTR_BITFIELD_RW(buspower,&(otg_dev->core_if->core_global_regs->gotgctl),(1<<8),8,"Mode"); */
/* DWC_OTG_DEVICE_ATTR_BITFIELD_RW(bussuspend,&(otg_dev->core_if->core_global_regs->gotgctl),(1<<8),8,"Mode"); */
DWC_OTG_DEVICE_ATTR_BITFIELD_RO(busconnected, "Bus Connected");
DWC_OTG_DEVICE_ATTR_REG32_RW(gotgctl, 0, "GOTGCTL");
DWC_OTG_DEVICE_ATTR_REG32_RW(gusbcfg,
&(otg_dev->core_if->core_global_regs->gusbcfg),
"GUSBCFG");
DWC_OTG_DEVICE_ATTR_REG32_RW(grxfsiz,
&(otg_dev->core_if->core_global_regs->grxfsiz),
"GRXFSIZ");
DWC_OTG_DEVICE_ATTR_REG32_RW(gnptxfsiz,
&(otg_dev->core_if->core_global_regs->gnptxfsiz),
"GNPTXFSIZ");
DWC_OTG_DEVICE_ATTR_REG32_RW(gpvndctl,
&(otg_dev->core_if->core_global_regs->gpvndctl),
"GPVNDCTL");
DWC_OTG_DEVICE_ATTR_REG32_RW(ggpio,
&(otg_dev->core_if->core_global_regs->ggpio),
"GGPIO");
DWC_OTG_DEVICE_ATTR_REG32_RW(guid, &(otg_dev->core_if->core_global_regs->guid),
"GUID");
DWC_OTG_DEVICE_ATTR_REG32_RO(gsnpsid,
&(otg_dev->core_if->core_global_regs->gsnpsid),
"GSNPSID");
DWC_OTG_DEVICE_ATTR_BITFIELD_RW(devspeed, "Device Speed");
DWC_OTG_DEVICE_ATTR_BITFIELD_RO(enumspeed, "Device Enumeration Speed");
DWC_OTG_DEVICE_ATTR_REG32_RO(hptxfsiz,
&(otg_dev->core_if->core_global_regs->hptxfsiz),
"HPTXFSIZ");
DWC_OTG_DEVICE_ATTR_REG32_RW(hprt0, otg_dev->core_if->host_if->hprt0, "HPRT0");
/**
* @todo Add code to initiate the HNP.
*/
/**
* Show the HNP status bit
*/
static ssize_t hnp_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
return sprintf(buf, "HstNegScs = 0x%x\n",
dwc_otg_get_hnpstatus(otg_dev->core_if));
}
/**
* Set the HNP Request bit
*/
static ssize_t hnp_store(struct device *_dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
uint32_t in = simple_strtoul(buf, NULL, 16);
dwc_otg_set_hnpreq(otg_dev->core_if, in);
return count;
}
DEVICE_ATTR(hnp, 0644, hnp_show, hnp_store);
/**
* @todo Add code to initiate the SRP.
*/
/**
* Show the SRP status bit
*/
static ssize_t srp_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
#ifndef DWC_HOST_ONLY
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
return sprintf(buf, "SesReqScs = 0x%x\n",
dwc_otg_get_srpstatus(otg_dev->core_if));
#else
return sprintf(buf, "Host Only Mode!\n");
#endif
}
/**
* Set the SRP Request bit
*/
static ssize_t srp_store(struct device *_dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
#ifndef DWC_HOST_ONLY
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
if (NULL != otg_dev->pcd)
dwc_otg_pcd_initiate_srp(otg_dev->pcd);
#endif
return count;
}
DEVICE_ATTR(srp, 0644, srp_show, srp_store);
/**
* @todo Need to do more for power on/off?
*/
/**
* Show the Bus Power status
*/
static ssize_t buspower_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
return sprintf(buf, "Bus Power = 0x%x\n",
dwc_otg_get_prtpower(otg_dev->core_if));
}
/**
* Set the Bus Power status
*/
static ssize_t buspower_store(struct device *_dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
uint32_t on = simple_strtoul(buf, NULL, 16);
dwc_otg_set_prtpower(otg_dev->core_if, on);
return count;
}
DEVICE_ATTR(buspower, 0644, buspower_show, buspower_store);
/**
* @todo Need to do more for suspend?
*/
/**
* Show the Bus Suspend status
*/
static ssize_t bussuspend_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
return sprintf(buf, "Bus Suspend = 0x%x\n",
dwc_otg_get_prtsuspend(otg_dev->core_if));
}
/**
* Set the Bus Suspend status
*/
static ssize_t bussuspend_store(struct device *_dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
uint32_t in = simple_strtoul(buf, NULL, 16);
dwc_otg_set_prtsuspend(otg_dev->core_if, in);
return count;
}
DEVICE_ATTR(bussuspend, 0644, bussuspend_show, bussuspend_store);
/**
* Show the status of Remote Wakeup.
*/
static ssize_t remote_wakeup_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
#ifndef DWC_HOST_ONLY
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
return sprintf(buf,
"Remote Wakeup Sig = %d Enabled = %d LPM Remote Wakeup = %d\n",
dwc_otg_get_remotewakesig(otg_dev->core_if),
dwc_otg_pcd_get_rmwkup_enable(otg_dev->pcd),
dwc_otg_get_lpm_remotewakeenabled(otg_dev->core_if));
#else
return sprintf(buf, "Host Only Mode!\n");
#endif /* DWC_HOST_ONLY */
}
/**
* Initiate a remote wakeup of the host. The Device control register
* Remote Wakeup Signal bit is written if the PCD Remote wakeup enable
* flag is set.
*
*/
static ssize_t remote_wakeup_store(struct device *_dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
#ifndef DWC_HOST_ONLY
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
uint32_t val = simple_strtoul(buf, NULL, 16);
if (val & 1)
dwc_otg_pcd_remote_wakeup(otg_dev->pcd, 1);
else
dwc_otg_pcd_remote_wakeup(otg_dev->pcd, 0);
#endif /* DWC_HOST_ONLY */
return count;
}
DEVICE_ATTR(remote_wakeup, S_IRUGO | S_IWUSR, remote_wakeup_show,
remote_wakeup_store);
/**
* Show the whether core is hibernated or not.
*/
static ssize_t rem_wakeup_pwrdn_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
#ifndef DWC_HOST_ONLY
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
if (dwc_otg_get_core_state(otg_dev->core_if))
DWC_PRINTF("Core is in hibernation\n");
else
DWC_PRINTF("Core is not in hibernation\n");
#endif /* DWC_HOST_ONLY */
return 0;
}
/**
* Initiate a remote wakeup of the device to exit from hibernation.
*/
static ssize_t rem_wakeup_pwrdn_store(struct device *_dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
#ifndef DWC_HOST_ONLY
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
dwc_otg_device_hibernation_restore(otg_dev->core_if, 1, 0);
#endif
return count;
}
DEVICE_ATTR(rem_wakeup_pwrdn, S_IRUGO | S_IWUSR, rem_wakeup_pwrdn_show,
rem_wakeup_pwrdn_store);
static ssize_t disconnect_us(struct device *_dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
#ifndef DWC_HOST_ONLY
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
uint32_t val = simple_strtoul(buf, NULL, 16);
DWC_PRINTF("The Passed value is %04x\n", val);
dwc_otg_pcd_disconnect_us(otg_dev->pcd, 50);
#endif /* DWC_HOST_ONLY */
return count;
}
DEVICE_ATTR(disconnect_us, S_IWUSR, 0, disconnect_us);
/**
* Dump global registers and either host or device registers (depending on the
* current mode of the core).
*/
static ssize_t regdump_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
#ifdef CONFIG_KONA_USB_CONTROL
/* We want to be able to do this with and without
* USB-PMU-xceiver interface so use direct API
*/
bcm_hsotgctrl_en_clock(true);
dwc_otg_dump_global_registers(otg_dev->core_if);
if (dwc_otg_is_host_mode(otg_dev->core_if))
dwc_otg_dump_host_registers(otg_dev->core_if);
else
dwc_otg_dump_dev_registers(otg_dev->core_if);
bcm_hsotgctrl_en_clock(false);
#else
dwc_otg_dump_global_registers(otg_dev->core_if);
if (dwc_otg_is_host_mode(otg_dev->core_if))
dwc_otg_dump_host_registers(otg_dev->core_if);
else
dwc_otg_dump_dev_registers(otg_dev->core_if);
#endif
return sprintf(buf, "Register Dump\n");
}
DEVICE_ATTR(regdump, S_IRUGO | S_IWUSR, regdump_show, 0);
/**
* Dump global registers and either host or device registers (depending on the
* current mode of the core).
*/
static ssize_t spramdump_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
dwc_otg_dump_spram(otg_dev->core_if);
return sprintf(buf, "SPRAM Dump\n");
}
DEVICE_ATTR(spramdump, S_IRUGO | S_IWUSR, spramdump_show, 0);
/**
* Dump the current hcd state.
*/
static ssize_t hcddump_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
#ifndef DWC_DEVICE_ONLY
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
dwc_otg_hcd_dump_state(otg_dev->hcd);
#endif /* DWC_DEVICE_ONLY */
return sprintf(buf, "HCD Dump\n");
}
DEVICE_ATTR(hcddump, S_IRUGO | S_IWUSR, hcddump_show, 0);
/**
* Dump the average frame remaining at SOF. This can be used to
* determine average interrupt latency. Frame remaining is also shown for
* start transfer and two additional sample points.
*/
static ssize_t hcd_frrem_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
#ifndef DWC_DEVICE_ONLY
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
dwc_otg_hcd_dump_frrem(otg_dev->hcd);
#endif /* DWC_DEVICE_ONLY */
return sprintf(buf, "HCD Dump Frame Remaining\n");
}
DEVICE_ATTR(hcd_frrem, S_IRUGO | S_IWUSR, hcd_frrem_show, 0);
/**
* Displays the time required to read the GNPTXFSIZ register many times (the
* output shows the number of times the register is read).
*/
#define RW_REG_COUNT 10000000
#define MSEC_PER_JIFFIE (1000/HZ)
static ssize_t rd_reg_test_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
int i;
int time;
int start_jiffies;
pr_info("HZ %d, MSEC_PER_JIFFIE %d, loops_per_jiffy %lu\n",
HZ, MSEC_PER_JIFFIE, loops_per_jiffy);
start_jiffies = jiffies;
for (i = 0; i < RW_REG_COUNT; i++)
dwc_otg_get_gnptxfsiz(otg_dev->core_if);
time = jiffies - start_jiffies;
return sprintf(buf,
"Time to read GNPTXFSIZ reg %d times: %d msecs (%d jiffies)\n",
RW_REG_COUNT, time * MSEC_PER_JIFFIE, time);
}
DEVICE_ATTR(rd_reg_test, S_IRUGO | S_IWUSR, rd_reg_test_show, 0);
/**
* Displays the time required to write the GNPTXFSIZ register many times (the
* output shows the number of times the register is written).
*/
static ssize_t wr_reg_test_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
uint32_t reg_val;
int i;
int time;
int start_jiffies;
pr_info("HZ %d, MSEC_PER_JIFFIE %d, loops_per_jiffy %lu\n",
HZ, MSEC_PER_JIFFIE, loops_per_jiffy);
reg_val = dwc_otg_get_gnptxfsiz(otg_dev->core_if);
start_jiffies = jiffies;
for (i = 0; i < RW_REG_COUNT; i++)
dwc_otg_set_gnptxfsiz(otg_dev->core_if, reg_val);
time = jiffies - start_jiffies;
return sprintf(buf,
"Time to write GNPTXFSIZ reg %d times: %d msecs (%d jiffies)\n",
RW_REG_COUNT, time * MSEC_PER_JIFFIE, time);
}
DEVICE_ATTR(wr_reg_test, S_IRUGO | S_IWUSR, wr_reg_test_show, 0);
#ifdef CONFIG_USB_DWC_OTG_LPM
/**
* Show the lpm_response attribute.
*/
static ssize_t lpmresp_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
if (!dwc_otg_get_param_lpm_enable(otg_dev->core_if))
return sprintf(buf, "** LPM is DISABLED **\n");
if (!dwc_otg_is_device_mode(otg_dev->core_if))
return sprintf(buf, "** Current mode is not device mode\n");
return sprintf(buf, "lpm_response = %d\n",
dwc_otg_get_lpmresponse(otg_dev->core_if));
}
/**
* Store the lpm_response attribute.
*/
static ssize_t lpmresp_store(struct device *_dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
uint32_t val = simple_strtoul(buf, NULL, 16);
if (!dwc_otg_get_param_lpm_enable(otg_dev->core_if))
return 0;
if (!dwc_otg_is_device_mode(otg_dev->core_if))
return 0;
dwc_otg_set_lpmresponse(otg_dev->core_if, val);
return count;
}
DEVICE_ATTR(lpm_response, S_IRUGO | S_IWUSR, lpmresp_show, lpmresp_store);
/**
* Show the sleep_status attribute.
*/
static ssize_t sleepstatus_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
return sprintf(buf, "Sleep Status = %d\n",
dwc_otg_get_lpm_portsleepstatus(otg_dev->core_if));
}
/**
* Store the sleep_status attribure.
*/
static ssize_t sleepstatus_store(struct device *_dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
dwc_otg_core_if_t *core_if = otg_dev->core_if;
if (dwc_otg_get_lpm_portsleepstatus(otg_dev->core_if)) {
if (dwc_otg_is_host_mode(core_if)) {
DWC_PRINTF("Host initiated resume\n");
dwc_otg_set_prtresume(otg_dev->core_if, 1);
}
}
return count;
}
DEVICE_ATTR(sleep_status, S_IRUGO | S_IWUSR, sleepstatus_show,
sleepstatus_store);
#endif /* CONFIG_USB_DWC_OTG_LPM_ENABLE */
/**
* Show the value of Host mode Connection Timeout.
*/
static ssize_t h_conn_wait_tmout_show(struct device *_dev,
struct device_attribute *attr, char *buf)
{
#ifndef DWC_DEVICE_ONLY
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
return sprintf(buf, "Connection wait timeout in ms = %d\n",
otg_dev->hcd->conn_wait_timeout);
#else
return sprintf(buf, "Device Only Mode!\n");
#endif /* #ifndef DWC_DEVICE_ONLY */
}
/**
* Set the value of host mode connection timeout
*
*/
static ssize_t h_conn_wait_tmout_store(struct device *_dev,
struct device_attribute *attr,
const char *buf, size_t count)
{
#ifndef DWC_DEVICE_ONLY
#ifdef LM_INTERFACE
struct lm_device *lm_dev = container_of(_dev, struct lm_device, dev);
dwc_otg_device_t *otg_dev = lm_get_drvdata(lm_dev);
#elif defined(PCI_INTERFACE)
dwc_otg_device_t *otg_dev = dev_get_drvdata(_dev);
#else
struct platform_device *platform_dev =
container_of(_dev, struct platform_device, dev);
dwc_otg_device_t *otg_dev = platform_get_drvdata(platform_dev);
#endif
otg_dev->hcd->conn_wait_timeout = simple_strtoul(buf, NULL, 10);
#endif
return count;
}
DEVICE_ATTR(h_conn_wait_tmout, S_IRUGO | S_IWUSR, h_conn_wait_tmout_show,
h_conn_wait_tmout_store);
/**@}*/
/**
* Create the device files
*/
void dwc_otg_attr_create(
#ifdef LM_INTERFACE
struct lm_device *dev
#elif defined(PCI_INTERFACE)
struct pci_dev *dev
#else
struct platform_device *dev
#endif
)
{
int error;
error = device_create_file(&dev->dev, &dev_attr_regoffset);
error = device_create_file(&dev->dev, &dev_attr_regvalue);
error = device_create_file(&dev->dev, &dev_attr_mode);
error = device_create_file(&dev->dev, &dev_attr_hnpcapable);
error = device_create_file(&dev->dev, &dev_attr_srpcapable);
error = device_create_file(&dev->dev, &dev_attr_hsic_connect);
error = device_create_file(&dev->dev, &dev_attr_inv_sel_hsic);
error = device_create_file(&dev->dev, &dev_attr_hnp);
error = device_create_file(&dev->dev, &dev_attr_srp);
error = device_create_file(&dev->dev, &dev_attr_buspower);
error = device_create_file(&dev->dev, &dev_attr_bussuspend);
error = device_create_file(&dev->dev, &dev_attr_busconnected);
error = device_create_file(&dev->dev, &dev_attr_gotgctl);
error = device_create_file(&dev->dev, &dev_attr_gusbcfg);
error = device_create_file(&dev->dev, &dev_attr_grxfsiz);
error = device_create_file(&dev->dev, &dev_attr_gnptxfsiz);
error = device_create_file(&dev->dev, &dev_attr_gpvndctl);
error = device_create_file(&dev->dev, &dev_attr_ggpio);
error = device_create_file(&dev->dev, &dev_attr_guid);
error = device_create_file(&dev->dev, &dev_attr_gsnpsid);
error = device_create_file(&dev->dev, &dev_attr_devspeed);
error = device_create_file(&dev->dev, &dev_attr_enumspeed);
error = device_create_file(&dev->dev, &dev_attr_hptxfsiz);
error = device_create_file(&dev->dev, &dev_attr_hprt0);
error = device_create_file(&dev->dev, &dev_attr_remote_wakeup);
error = device_create_file(&dev->dev, &dev_attr_rem_wakeup_pwrdn);
error = device_create_file(&dev->dev, &dev_attr_disconnect_us);
error = device_create_file(&dev->dev, &dev_attr_regdump);
error = device_create_file(&dev->dev, &dev_attr_spramdump);
error = device_create_file(&dev->dev, &dev_attr_hcddump);
error = device_create_file(&dev->dev, &dev_attr_hcd_frrem);
error = device_create_file(&dev->dev, &dev_attr_rd_reg_test);
error = device_create_file(&dev->dev, &dev_attr_wr_reg_test);
#ifdef CONFIG_USB_DWC_OTG_LPM
error = device_create_file(&dev->dev, &dev_attr_lpm_response);
error = device_create_file(&dev->dev, &dev_attr_sleep_status);
#endif
error = device_create_file(&dev->dev, &dev_attr_h_conn_wait_tmout);
}
/**
* Remove the device files
*/
void dwc_otg_attr_remove(
#ifdef LM_INTERFACE
struct lm_device *dev
#elif defined(PCI_INTERFACE)
struct pci_dev *dev
#else
struct platform_device *dev
#endif
)
{
device_remove_file(&dev->dev, &dev_attr_regoffset);
device_remove_file(&dev->dev, &dev_attr_regvalue);
device_remove_file(&dev->dev, &dev_attr_mode);
device_remove_file(&dev->dev, &dev_attr_hnpcapable);
device_remove_file(&dev->dev, &dev_attr_srpcapable);
device_remove_file(&dev->dev, &dev_attr_hsic_connect);
device_remove_file(&dev->dev, &dev_attr_inv_sel_hsic);
device_remove_file(&dev->dev, &dev_attr_hnp);
device_remove_file(&dev->dev, &dev_attr_srp);
device_remove_file(&dev->dev, &dev_attr_buspower);
device_remove_file(&dev->dev, &dev_attr_bussuspend);
device_remove_file(&dev->dev, &dev_attr_busconnected);
device_remove_file(&dev->dev, &dev_attr_gotgctl);
device_remove_file(&dev->dev, &dev_attr_gusbcfg);
device_remove_file(&dev->dev, &dev_attr_grxfsiz);
device_remove_file(&dev->dev, &dev_attr_gnptxfsiz);
device_remove_file(&dev->dev, &dev_attr_gpvndctl);
device_remove_file(&dev->dev, &dev_attr_ggpio);
device_remove_file(&dev->dev, &dev_attr_guid);
device_remove_file(&dev->dev, &dev_attr_gsnpsid);
device_remove_file(&dev->dev, &dev_attr_devspeed);
device_remove_file(&dev->dev, &dev_attr_enumspeed);
device_remove_file(&dev->dev, &dev_attr_hptxfsiz);
device_remove_file(&dev->dev, &dev_attr_hprt0);
device_remove_file(&dev->dev, &dev_attr_remote_wakeup);
device_remove_file(&dev->dev, &dev_attr_rem_wakeup_pwrdn);
device_remove_file(&dev->dev, &dev_attr_disconnect_us);
device_remove_file(&dev->dev, &dev_attr_regdump);
device_remove_file(&dev->dev, &dev_attr_spramdump);
device_remove_file(&dev->dev, &dev_attr_hcddump);
device_remove_file(&dev->dev, &dev_attr_hcd_frrem);
device_remove_file(&dev->dev, &dev_attr_rd_reg_test);
device_remove_file(&dev->dev, &dev_attr_wr_reg_test);
#ifdef CONFIG_USB_DWC_OTG_LPM
device_remove_file(&dev->dev, &dev_attr_lpm_response);
device_remove_file(&dev->dev, &dev_attr_sleep_status);
#endif
device_remove_file(&dev->dev, &dev_attr_h_conn_wait_tmout);
}
static int
micveth_probe_int(micveth_info_t *veth_info, mic_ctx_t *mic_ctx)
{
struct net_device *dev_veth;
ring_queue_t *queue;
ring_desc_t *desc;
ring_packet_t *packet;
int idx;
int err = 0;
veth_info->vi_pdev = mic_ctx->bi_pdev;
veth_info->vi_sbox = (uint8_t *)((unsigned long)mic_ctx->mmio.va +
HOST_SBOX_BASE_ADDRESS);
veth_info->vi_scratch14 = (uint32_t *)((unsigned long)mic_ctx->mmio.va +
HOST_SBOX_BASE_ADDRESS + SBOX_SCRATCH14);
veth_info->vi_scratch15 = (uint32_t *)((unsigned long)mic_ctx->mmio.va +
HOST_SBOX_BASE_ADDRESS + SBOX_SCRATCH15);
veth_info->mic_ctx = mic_ctx;
mic_ctx->bi_vethinfo = (void *)veth_info;
spin_lock_init(&veth_info->vi_txlock);
spin_lock_init(&veth_info->vi_rxlock);
if (mic_vnet_mode == VNET_MODE_POLL)
INIT_DELAYED_WORK(&veth_info->vi_poll, micveth_poll);
// Set the current sk_buff allocation size
veth_info->vi_skb_mtu = MICVETH_MAX_PACKET_SIZE + 32;
// Get the physical memory address for the ring descriptors
veth_info->vi_ring.phys = mic_ctx_map_single(veth_to_ctx(veth_info), &veth_info->vi_ring.ring,
sizeof(veth_ring_t));
veth_info->vi_ring.length = sizeof(veth_ring_t);
queue = &veth_info->vi_ring.ring.r_tx;
queue->rq_head = 0;
queue->rq_tail = 0;
queue->rq_length = MICVETH_TRANSFER_FIFO_SIZE;
veth_info->vi_pend = 0;
packet = &veth_info->vi_tx_desc[0];
for (idx = 0; idx < queue->rq_length; idx++) {
desc = &queue->rq_descs[idx];
packet[idx].pd_skb = NULL;
packet[idx].pd_phys = 0;
packet[idx].pd_length = 0;
desc->rd_phys = 0;
desc->rd_length = 0;
desc->rd_valid = 0;
}
// This is the recieve end.
queue = &veth_info->vi_ring.ring.r_rx;
queue->rq_head = 0;
queue->rq_tail = 0;
queue->rq_length = MICVETH_TRANSFER_FIFO_SIZE;
packet = &veth_info->vi_rx_desc[0];
for (idx = 0; idx < queue->rq_length; idx++) {
desc = &queue->rq_descs[idx];
if (!(packet[idx].pd_skb = dev_alloc_skb(veth_info->vi_skb_mtu)))
return -ENOMEM;
packet[idx].pd_phys = mic_ctx_map_single(veth_to_ctx(veth_info), packet[idx].pd_skb->data,
veth_info->vi_skb_mtu);
packet[idx].pd_length = veth_info->vi_skb_mtu;
desc->rd_phys = packet[idx].pd_phys;
desc->rd_length = packet[idx].pd_length;
desc->rd_valid = 1;
}
#if LINUX_VERSION_CODE > KERNEL_VERSION(3,14,4)
if ((dev_veth = alloc_netdev(sizeof(micveth_info_t), "mic%d", NET_NAME_ENUM, micveth_setup)) == NULL) {
#else
if ((dev_veth = alloc_netdev(sizeof(micveth_info_t), "mic%d", micveth_setup)) == NULL) {
#endif
return -ENOMEM;
}
veth_info->vi_netdev = dev_veth;
dev_veth->ml_priv = veth_info;
dev_veth->rtnl_link_ops = &micveth_link_ops;
if ((err = register_netdev(dev_veth)) < 0) {
printk("register netdev failed %d\n", err);
free_netdev(dev_veth);
return err;
}
veth_info->vi_state = VETH_STATE_INITIALIZED;
return 0;
}
static ssize_t show_veth(struct device *dev,
struct device_attribute *attr, char *buf);
DEVICE_ATTR(veth, (S_IRUGO|S_IWUGO)&(~S_IWOTH), show_veth, NULL);
static int
micveth_init_int(int num_bds, struct device *dev)
{
int bd;
int err = 0;
micveth.lv_num_interfaces = num_bds;
micveth.lv_num_clients = num_bds;
micveth.lv_active_clients = 0;
micveth.lv_num_links_remaining = num_bds;
BUG_ON(rtnl_link_register(&micveth_link_ops));
// Allocate space for the control of each device in the system.
micveth.lv_info = kmalloc(sizeof(micveth_info_t) * num_bds, GFP_KERNEL);
// Initialize state mutex. Overloaded use for several fields.
mutex_init(&micveth.lv_state_mutex);
// Setup of timer for probeing active mic clients. When the total active board
// count is zero the poll is not running.
micveth.lv_pollstate = CLIENT_POLL_STOPPED;
INIT_DELAYED_WORK(&micveth.lv_poll, micveth_clientpoll);
init_waitqueue_head(&micveth.lv_wq);
// Init each of the existing boards.
for (bd = 0; bd < num_bds; bd++) {
micveth_probe_int(&micveth.lv_info[bd], &mic_data.dd_bi[bd]->bi_ctx);
}
err = device_create_file(dev, &dev_attr_veth);
return err;
}
static void dump_device(int index, cl_device_id device_id)
{
static struct {
cl_device_info info;
size_t size;
void *addr;
} catalog[] = {
DEVICE_ATTR(CL_DEVICE_ADDRESS_BITS, address_bits),
DEVICE_ATTR(CL_DEVICE_AVAILABLE, available),
DEVICE_ATTR(CL_DEVICE_COMPILER_AVAILABLE, compiler_available),
DEVICE_ATTR(CL_DEVICE_DOUBLE_FP_CONFIG, double_fp_config),
DEVICE_ATTR(CL_DEVICE_ENDIAN_LITTLE, endian_little),
DEVICE_ATTR(CL_DEVICE_ERROR_CORRECTION_SUPPORT,
error_correction_support),
DEVICE_ATTR(CL_DEVICE_EXECUTION_CAPABILITIES,
execution_capabilities),
DEVICE_ATTR(CL_DEVICE_EXTENSIONS, extensions),
DEVICE_ATTR(CL_DEVICE_GLOBAL_MEM_CACHE_SIZE, global_mem_cache_size),
DEVICE_ATTR(CL_DEVICE_GLOBAL_MEM_CACHE_TYPE, global_mem_cache_type),
DEVICE_ATTR(CL_DEVICE_GLOBAL_MEM_CACHELINE_SIZE,
global_mem_cacheline_size),
DEVICE_ATTR(CL_DEVICE_GLOBAL_MEM_SIZE, global_mem_size),
DEVICE_ATTR(CL_DEVICE_HALF_FP_CONFIG, half_fp_config),
DEVICE_ATTR(CL_DEVICE_HOST_UNIFIED_MEMORY, host_unified_memory),
DEVICE_ATTR(CL_DEVICE_IMAGE_SUPPORT, image_support),
DEVICE_ATTR(CL_DEVICE_IMAGE2D_MAX_HEIGHT, image2d_max_height),
DEVICE_ATTR(CL_DEVICE_IMAGE2D_MAX_WIDTH, image2d_max_width),
DEVICE_ATTR(CL_DEVICE_IMAGE3D_MAX_DEPTH, image3d_max_depth),
DEVICE_ATTR(CL_DEVICE_IMAGE3D_MAX_HEIGHT, image3d_max_height),
DEVICE_ATTR(CL_DEVICE_IMAGE3D_MAX_WIDTH, image3d_max_width),
DEVICE_ATTR(CL_DEVICE_LOCAL_MEM_SIZE, local_mem_size),
DEVICE_ATTR(CL_DEVICE_LOCAL_MEM_TYPE, local_mem_type),
DEVICE_ATTR(CL_DEVICE_MAX_CLOCK_FREQUENCY, max_clock_frequency),
DEVICE_ATTR(CL_DEVICE_MAX_COMPUTE_UNITS, max_compute_units),
DEVICE_ATTR(CL_DEVICE_MAX_CONSTANT_ARGS, max_constant_args),
DEVICE_ATTR(CL_DEVICE_MAX_CONSTANT_BUFFER_SIZE,
max_constant_buffer_size),
DEVICE_ATTR(CL_DEVICE_MAX_MEM_ALLOC_SIZE, max_mem_alloc_size),
DEVICE_ATTR(CL_DEVICE_MAX_PARAMETER_SIZE, max_parameter_size),
DEVICE_ATTR(CL_DEVICE_MAX_READ_IMAGE_ARGS, max_read_image_args),
DEVICE_ATTR(CL_DEVICE_MAX_SAMPLERS, max_samplers),
DEVICE_ATTR(CL_DEVICE_MAX_WORK_GROUP_SIZE, max_work_group_size),
DEVICE_ATTR(CL_DEVICE_MAX_WORK_ITEM_DIMENSIONS,
max_work_item_dimensions),
DEVICE_ATTR(CL_DEVICE_MAX_WORK_ITEM_SIZES, max_work_item_sizes),
DEVICE_ATTR(CL_DEVICE_MAX_WRITE_IMAGE_ARGS, max_write_image_args),
DEVICE_ATTR(CL_DEVICE_MEM_BASE_ADDR_ALIGN, mem_base_addr_align),
DEVICE_ATTR(CL_DEVICE_MIN_DATA_TYPE_ALIGN_SIZE,
min_data_type_align_size),
DEVICE_ATTR(CL_DEVICE_NAME, name),
DEVICE_ATTR(CL_DEVICE_NATIVE_VECTOR_WIDTH_CHAR,
native_vector_width_char),
DEVICE_ATTR(CL_DEVICE_NATIVE_VECTOR_WIDTH_SHORT,
native_vector_width_short),
DEVICE_ATTR(CL_DEVICE_NATIVE_VECTOR_WIDTH_INT,
native_vector_width_int),
DEVICE_ATTR(CL_DEVICE_NATIVE_VECTOR_WIDTH_LONG,
native_vector_width_long),
DEVICE_ATTR(CL_DEVICE_NATIVE_VECTOR_WIDTH_FLOAT,
native_vector_width_float),
DEVICE_ATTR(CL_DEVICE_NATIVE_VECTOR_WIDTH_DOUBLE,
native_vector_width_double),
DEVICE_ATTR(CL_DEVICE_NATIVE_VECTOR_WIDTH_HALF,
native_vector_width_half),
DEVICE_ATTR(CL_DEVICE_OPENCL_C_VERSION, opencl_c_version),
DEVICE_ATTR(CL_DEVICE_PREFERRED_VECTOR_WIDTH_CHAR,
preferred_vector_width_char),
DEVICE_ATTR(CL_DEVICE_PREFERRED_VECTOR_WIDTH_SHORT,
preferred_vector_width_short),
DEVICE_ATTR(CL_DEVICE_PREFERRED_VECTOR_WIDTH_INT,
preferred_vector_width_int),
DEVICE_ATTR(CL_DEVICE_PREFERRED_VECTOR_WIDTH_LONG,
preferred_vector_width_long),
DEVICE_ATTR(CL_DEVICE_PREFERRED_VECTOR_WIDTH_FLOAT,
preferred_vector_width_float),
DEVICE_ATTR(CL_DEVICE_PREFERRED_VECTOR_WIDTH_DOUBLE,
preferred_vector_width_double),
DEVICE_ATTR(CL_DEVICE_PREFERRED_VECTOR_WIDTH_HALF,
preferred_vector_width_half),
DEVICE_ATTR(CL_DEVICE_PROFILE, profile),
DEVICE_ATTR(CL_DEVICE_PROFILING_TIMER_RESOLUTION,
profiling_timer_resolution),
DEVICE_ATTR(CL_DEVICE_QUEUE_PROPERTIES, queue_properties),
DEVICE_ATTR(CL_DEVICE_SINGLE_FP_CONFIG, single_fp_config),
DEVICE_ATTR(CL_DEVICE_TYPE, type),
DEVICE_ATTR(CL_DEVICE_VENDOR, vendor),
DEVICE_ATTR(CL_DEVICE_VENDOR_ID, vendor_id),
DEVICE_ATTR(CL_DEVICE_VERSION, version),
DEVICE_ATTR(CL_DRIVER_VERSION, driver_version),
};
cl_int i, rc;
for (i=0; i < lengthof(catalog); i++)
{
rc = clGetDeviceInfo(device_id,
catalog[i].info,
catalog[i].size,
catalog[i].addr,
NULL);
if (rc != CL_SUCCESS &&
!(rc == CL_INVALID_VALUE &&
(catalog[i].info == CL_DEVICE_DOUBLE_FP_CONFIG ||
catalog[i].info == CL_DEVICE_HALF_FP_CONFIG)))
{
fprintf(stderr, "failed on clGetDeviceInfo (%s)\n",
opencl_strerror(rc));
exit(1);
}
}
if (only_list)
printf(" Device-%02d: %s / %s - %s\n",
index + 1,
dinfo.vendor,
dinfo.name,
dinfo.version);
else
{
printf(" Device-%02d\n", index + 1);
printf(" Device type: %s\n",
dev_type_str(dinfo.type));
printf(" Vendor: %s (id: %08x)\n",
dinfo.vendor, dinfo.vendor_id);
printf(" Name: %s\n",
dinfo.name);
printf(" Version: %s\n",
dinfo.version);
printf(" Driver version: %s\n",
dinfo.driver_version);
printf(" OpenCL C version: %s\n",
dinfo.opencl_c_version);
printf(" Profile: %s\n",
dinfo.profile);
printf(" Device available: %s\n",
dinfo.available ? "yes" : "no");
printf(" Address bits: %u\n",
dinfo.address_bits);
printf(" Compiler available: %s\n",
dinfo.compiler_available ? "yes" : "no");
if (strstr(dinfo.extensions, "cl_khr_fp64") != NULL)
printf(" Double FP config: %s\n",
dev_fp_config_str(dinfo.double_fp_config));
printf(" Endian: %s\n",
dinfo.endian_little ? "little" : "big");
printf(" Error correction support: %s\n",
dinfo.error_correction_support ? "yes" : "no");
printf(" Execution capability: %s\n",
dev_execution_capabilities_str(dinfo.execution_capabilities));
printf(" Extensions: %s\n",
dinfo.extensions);
printf(" Global memory cache size: %lu KB\n",
dinfo.global_mem_cache_size / 1024);
printf(" Global memory cache type: %s\n",
dev_mem_cache_type_str(dinfo.global_mem_cache_type));
printf(" Global memory cacheline size: %u\n",
dinfo.global_mem_cacheline_size);
printf(" Global memory size: %zu MB\n",
dinfo.global_mem_size / (1024 * 1024));
if (strstr(dinfo.extensions, "cl_khr_fp16") != NULL)
printf(" Half FP config: %s\n",
dev_fp_config_str(dinfo.half_fp_config));
printf(" Host unified memory: %s\n",
dinfo.host_unified_memory ? "yes" : "no");
printf(" Image support: %s\n",
dinfo.image_support ? "yes" : "no");
printf(" Image 2D max size: %lu x %lu\n",
dinfo.image2d_max_width,
dinfo.image2d_max_height);
printf(" Image 3D max size: %lu x %lu x %lu\n",
dinfo.image3d_max_width,
dinfo.image3d_max_height,
dinfo.image3d_max_depth);
printf(" Local memory size: %lu\n",
dinfo.local_mem_size);
printf(" Local memory type: %s\n",
dev_local_mem_type_str(dinfo.local_mem_type));
printf(" Max clock frequency: %u\n",
dinfo.max_clock_frequency);
printf(" Max compute units: %u\n",
dinfo.max_compute_units);
printf(" Max constant args: %u\n",
dinfo.max_constant_args);
printf(" Max constant buffer size: %zu\n",
dinfo.max_constant_buffer_size);
printf(" Max memory allocation size: %zu MB\n",
dinfo.max_mem_alloc_size / (1024 * 1024));
printf(" Max parameter size: %zu\n",
(cl_ulong)dinfo.max_parameter_size);
printf(" Max read image args: %u\n",
dinfo.max_read_image_args);
printf(" Max samplers: %u\n",
dinfo.max_samplers);
printf(" Max work-group size: %zu\n",
(cl_ulong)dinfo.max_work_group_size);
printf(" Max work-item sizes: {%u,%u,%u}\n",
(cl_uint) dinfo.max_work_item_sizes[0],
(cl_uint) dinfo.max_work_item_sizes[1],
(cl_uint) dinfo.max_work_item_sizes[2]);
printf(" Max write image args: %u\n",
dinfo.max_write_image_args);
printf(" Memory base address align: %u\n",
dinfo.mem_base_addr_align);
printf(" Min data type align size: %u\n",
dinfo.min_data_type_align_size);
printf(" Native vector width - char: %u\n",
dinfo.native_vector_width_char);
printf(" Native vector width - short: %u\n",
dinfo.native_vector_width_short);
printf(" Native vector width - int: %u\n",
dinfo.native_vector_width_int);
printf(" Native vector width - long: %u\n",
dinfo.native_vector_width_long);
printf(" Native vector width - float: %u\n",
dinfo.native_vector_width_float);
if (strstr(dinfo.extensions, "cl_khr_fp64") != NULL)
printf(" Native vector width - double: %u\n",
dinfo.native_vector_width_double);
if (strstr(dinfo.extensions, "cl_khr_fp16") != NULL)
printf(" Native vector width - half: %u\n",
dinfo.native_vector_width_half);
printf(" Preferred vector width - char: %u\n",
dinfo.preferred_vector_width_char);
printf(" Preferred vector width - short: %u\n",
dinfo.preferred_vector_width_short);
printf(" Preferred vector width - int: %u\n",
dinfo.preferred_vector_width_int);
printf(" Preferred vector width - long: %u\n",
dinfo.preferred_vector_width_long);
printf(" Preferred vector width - float: %u\n",
dinfo.preferred_vector_width_float);
if (strstr(dinfo.extensions, "cl_khr_fp64") != NULL)
printf(" Preferred vector width - double: %u\n",
dinfo.preferred_vector_width_double);
if (strstr(dinfo.extensions, "cl_khr_fp16") != NULL)
printf(" Preferred vector width - half: %u\n",
dinfo.preferred_vector_width_half);
printf(" Profiling timer resolution: %lu\n",
dinfo.profiling_timer_resolution);
printf(" Queue properties: %s\n",
dev_queue_properties_str(dinfo.queue_properties));
printf(" Sindle FP config: %s\n",
dev_fp_config_str(dinfo.single_fp_config));
}
}
