struct dynfn *r200_makeX86Color4ubv( GLcontext *ctx, const int *key )
{
struct dynfn *dfn = MALLOC_STRUCT( dynfn );
r200ContextPtr rmesa = R200_CONTEXT(ctx);
if (R200_DEBUG & DEBUG_CODEGEN)
fprintf(stderr, "%s 0x%08x\n", __FUNCTION__, key[0] );
if (VTX_COLOR(key[0],0) == R200_VTX_PK_RGBA) {
DFN ( _x86_Color4ubv_ub, rmesa->vb.dfn_cache.Color4ubv);
FIXUP(dfn->code, 5, 0x12345678, (int)vb.colorptr);
return dfn;
}
else {
DFN ( _x86_Color4ubv_4f, rmesa->vb.dfn_cache.Color4ubv);
FIXUP(dfn->code, 2, 0x00000000, (int)_mesa_ubyte_to_float_color_tab);
FIXUP(dfn->code, 27, 0xdeadbeaf, (int)vb.floatcolorptr);
FIXUP(dfn->code, 33, 0xdeadbeaf, (int)vb.floatcolorptr+4);
FIXUP(dfn->code, 55, 0xdeadbeaf, (int)vb.floatcolorptr+8);
FIXUP(dfn->code, 61, 0xdeadbeaf, (int)vb.floatcolorptr+12);
return dfn;
}
}
struct dynfn *radeon_makeX86Color4ubv( GLcontext *ctx, int key )
{
struct dynfn *dfn = MALLOC_STRUCT( dynfn );
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
if (RADEON_DEBUG & DEBUG_CODEGEN)
fprintf(stderr, "%s 0x%08x\n", __FUNCTION__, key );
if (key & RADEON_CP_VC_FRMT_PKCOLOR) {
DFN ( _x86_Color4ubv_ub, rmesa->vb.dfn_cache.Color4ubv);
FIXUP(dfn->code, 5, 0x12345678, (int)rmesa->vb.colorptr);
return dfn;
}
else {
DFN ( _x86_Color4ubv_4f, rmesa->vb.dfn_cache.Color4ubv);
FIXUP(dfn->code, 2, 0x00000000, (int)_mesa_ubyte_to_float_color_tab);
FIXUP(dfn->code, 27, 0xdeadbeaf, (int)rmesa->vb.floatcolorptr);
FIXUP(dfn->code, 33, 0xdeadbeaf, (int)rmesa->vb.floatcolorptr+4);
FIXUP(dfn->code, 55, 0xdeadbeaf, (int)rmesa->vb.floatcolorptr+8);
FIXUP(dfn->code, 61, 0xdeadbeaf, (int)rmesa->vb.floatcolorptr+12);
return dfn;
}
}
struct dynfn *r200_makeX86Vertex3fv( GLcontext *ctx, const int *key )
{
r200ContextPtr rmesa = R200_CONTEXT(ctx);
struct dynfn *dfn = MALLOC_STRUCT( dynfn );
if (R200_DEBUG & DEBUG_CODEGEN)
fprintf(stderr, "%s 0x%08x 0x%08x %d\n", __FUNCTION__,
key[0], key[1], vb.vertex_size );
switch (vb.vertex_size) {
case 6: {
DFN ( _x86_Vertex3fv_6, rmesa->vb.dfn_cache.Vertex3fv );
FIXUP(dfn->code, 1, 0x00000000, (int)&vb.dmaptr);
FIXUP(dfn->code, 27, 0x0000001c, (int)&vb.vertex[3]);
FIXUP(dfn->code, 33, 0x00000020, (int)&vb.vertex[4]);
FIXUP(dfn->code, 45, 0x00000024, (int)&vb.vertex[5]);
FIXUP(dfn->code, 56, 0x00000000, (int)&vb.dmaptr);
FIXUP(dfn->code, 61, 0x00000004, (int)&vb.counter);
FIXUP(dfn->code, 67, 0x00000004, (int)&vb.counter);
FIXUP(dfn->code, 76, 0x00000008, (int)&vb.notify);
break;
}
case 8: {
DFN ( _x86_Vertex3fv_8, rmesa->vb.dfn_cache.Vertex3fv );
FIXUP(dfn->code, 1, 0x00000000, (int)&vb.dmaptr);
FIXUP(dfn->code, 27, 0x0000001c, (int)&vb.vertex[3]);
FIXUP(dfn->code, 33, 0x00000020, (int)&vb.vertex[4]);
FIXUP(dfn->code, 45, 0x0000001c, (int)&vb.vertex[5]);
FIXUP(dfn->code, 51, 0x00000020, (int)&vb.vertex[6]);
FIXUP(dfn->code, 63, 0x00000024, (int)&vb.vertex[7]);
FIXUP(dfn->code, 74, 0x00000000, (int)&vb.dmaptr);
FIXUP(dfn->code, 79, 0x00000004, (int)&vb.counter);
FIXUP(dfn->code, 85, 0x00000004, (int)&vb.counter);
FIXUP(dfn->code, 94, 0x00000008, (int)&vb.notify);
break;
}
default: {
DFN ( _x86_Vertex3fv, rmesa->vb.dfn_cache.Vertex3fv );
FIXUP(dfn->code, 8, 0x01010101, (int)&vb.dmaptr);
FIXUP(dfn->code, 32, 0x00000006, vb.vertex_size-3);
FIXUP(dfn->code, 37, 0x00000058, (int)&vb.vertex[3]);
FIXUP(dfn->code, 45, 0x01010101, (int)&vb.dmaptr);
FIXUP(dfn->code, 50, 0x02020202, (int)&vb.counter);
FIXUP(dfn->code, 58, 0x02020202, (int)&vb.counter);
FIXUP(dfn->code, 67, 0x0, (int)&vb.notify);
break;
}
}
return dfn;
}
void pcibusWrite(pciTagRec tag, CARD32 reg, CARD32 data)
{
ENTER_KERNEL_CRITICAL_SECTION();
PCIBios$WriteConfigDWord(pcibios, BUS(tag.cfg1),
DFN(tag.cfg1), reg, data);
LEAVE_KERNEL_CRITICAL_SECTION();
TRC(printf("PCI WriteConfigDWord bus %x DFN %x reg %x data %x\n",
BUS(tag.cfg1),DFN(tag.cfg1), reg, data));
}
struct dynfn *r200_makeX86Vertex3f( GLcontext *ctx, const int *key )
{
r200ContextPtr rmesa = R200_CONTEXT(ctx);
struct dynfn *dfn = MALLOC_STRUCT( dynfn );
if (R200_DEBUG & DEBUG_CODEGEN)
fprintf(stderr, "%s 0x%08x 0x%08x %d\n", __FUNCTION__,
key[0], key[1], vb.vertex_size );
switch (vb.vertex_size) {
case 4: {
DFN ( _x86_Vertex3f_4, rmesa->vb.dfn_cache.Vertex3f );
FIXUP(dfn->code, 2, 0x0, (int)&vb.dmaptr);
FIXUP(dfn->code, 25, 0x0, (int)&vb.vertex[3]);
FIXUP(dfn->code, 36, 0x0, (int)&vb.counter);
FIXUP(dfn->code, 46, 0x0, (int)&vb.dmaptr);
FIXUP(dfn->code, 51, 0x0, (int)&vb.counter);
FIXUP(dfn->code, 60, 0x0, (int)&vb.notify);
break;
}
case 6: {
DFN ( _x86_Vertex3f_6, rmesa->vb.dfn_cache.Vertex3f );
FIXUP(dfn->code, 3, 0x0, (int)&vb.dmaptr);
FIXUP(dfn->code, 28, 0x0, (int)&vb.vertex[3]);
FIXUP(dfn->code, 34, 0x0, (int)&vb.vertex[4]);
FIXUP(dfn->code, 40, 0x0, (int)&vb.vertex[5]);
FIXUP(dfn->code, 57, 0x0, (int)&vb.counter);
FIXUP(dfn->code, 63, 0x0, (int)&vb.dmaptr);
FIXUP(dfn->code, 70, 0x0, (int)&vb.counter);
FIXUP(dfn->code, 79, 0x0, (int)&vb.notify);
break;
}
default: {
DFN ( _x86_Vertex3f, rmesa->vb.dfn_cache.Vertex3f );
FIXUP(dfn->code, 3, 0x0, (int)&vb.vertex[3]);
FIXUP(dfn->code, 9, 0x0, (int)&vb.dmaptr);
FIXUP(dfn->code, 37, 0x0, vb.vertex_size-3);
FIXUP(dfn->code, 44, 0x0, (int)&vb.counter);
FIXUP(dfn->code, 50, 0x0, (int)&vb.dmaptr);
FIXUP(dfn->code, 56, 0x0, (int)&vb.counter);
FIXUP(dfn->code, 67, 0x0, (int)&vb.notify);
break;
}
}
return dfn;
}
struct dynfn *r200_makeX86MultiTexCoord2fARB( GLcontext *ctx,
const int *key )
{
#if 0
static char temp[] = {
0x8b, 0x44, 0x24, 0x04, /* mov 0x4(%esp,1),%eax */
0x8b, 0x54, 0x24, 0x08, /* mov 0x8(%esp,1),%edx */
0x2d, 0xc0, 0x84, 0x00, 0x00, /* sub $0x84c0,%eax */
0x8b, 0x4c, 0x24, 0x0c, /* mov 0xc(%esp,1),%ecx */
0x83, 0xe0, 0x01, /* and $0x1,%eax */
0xc1, 0xe0, 0x03, /* shl $0x3,%eax */
0x89, 0x90, 0, 0, 0, 0, /* mov %edx,DEST(%eax) */
0x89, 0x88, 0, 0, 0, 0, /* mov %ecx,DEST+8(%eax) */
0xc3, /* ret */
};
static char temp2[] = {
0x8b, 0x44, 0x24, 0x04, /* mov 0x4(%esp,1),%eax */
0x8b, 0x54, 0x24, 0x08, /* mov 0x8(%esp,1),%edx */
0x2d, 0xc0, 0x84, 0x00, 0x00, /* sub $0x84c0,%eax */
0x8b, 0x4c, 0x24, 0x0c, /* mov 0xc(%esp,1),%ecx */
0x83, 0xe0, 0x01, /* and $0x1,%eax */
0x8b, 0x04, 0x85, 0, 0, 0, 0, /* mov DEST(,%eax,4),%eax */
0x89, 0x10, /* mov %edx,(%eax) */
0x89, 0x48, 0x04, /* mov %ecx,0x4(%eax) */
0xc3, /* ret */
};
#endif
struct dynfn *dfn = MALLOC_STRUCT( dynfn );
r200ContextPtr rmesa = R200_CONTEXT(ctx);
if (R200_DEBUG & DEBUG_CODEGEN)
fprintf(stderr, "%s 0x%08x 0x%08x\n", __FUNCTION__, key[0], key[1] );
if (vb.texcoordptr[1] == vb.texcoordptr[0]+4) {
DFN ( _x86_MultiTexCoord2fARB, rmesa->vb.dfn_cache.MultiTexCoord2fARB );
FIXUP(dfn->code, 25, 0xdeadbeef, (int)vb.texcoordptr[0]);
FIXUP(dfn->code, 31, 0xdeadbeef, (int)vb.texcoordptr[0]+4);
}
else {
/* Note: this might get generated multiple times, even though the
* actual emitted code is the same.
*/
DFN ( _x86_MultiTexCoord2fARB_2, rmesa->vb.dfn_cache.MultiTexCoord2fARB );
FIXUP(dfn->code, 23, 0x0, (int)vb.texcoordptr);
}
return dfn;
}
struct dynfn *r200_makeX86MultiTexCoord2fvARB( GLcontext *ctx, const int *key )
{
#if 0
static char temp[] = {
0x8b, 0x44, 0x24, 0x04, /* mov 0x4(%esp,1),%eax */
0x8b, 0x4c, 0x24, 0x08, /* mov 0x8(%esp,1),%ecx */
0x2d, 0xc0, 0x84, 0x00, 0x00, /* sub $0x84c0,%eax */
0x83, 0xe0, 0x01, /* and $0x1,%eax */
0x8b, 0x11, /* mov (%ecx),%edx */
0xc1, 0xe0, 0x03, /* shl $0x3,%eax */
0x8b, 0x49, 0x04, /* mov 0x4(%ecx),%ecx */
0x89, 0x90, 0, 0, 0, 0,/* mov %edx,DEST(%eax) */
0x89, 0x88, 0, 0, 0, 0,/* mov %ecx,DEST+8(%eax) */
0xc3, /* ret */
};
static char temp2[] = {
0x8b, 0x44, 0x24, 0x04, /* mov 0x4(%esp,1),%eax */
0x8b, 0x4c, 0x24, 0x08, /* mov 0x8(%esp,1),%ecx */
0x2d, 0xc0, 0x84, 0x00, 0x00, /* sub $0x84c0,%eax */
0x83, 0xe0, 0x01, /* and $0x1,%eax */
0x8b, 0x14, 0x85, 0, 0, 0, 0, /* mov DEST(,%eax,4),%edx */
0x8b, 0x01, /* mov (%ecx),%eax */
0x89, 0x02, /* mov %eax,(%edx) */
0x8b, 0x41, 0x04, /* mov 0x4(%ecx),%eax */
0x89, 0x42, 0x04, /* mov %eax,0x4(%edx) */
0xc3, /* ret */
};
#endif
struct dynfn *dfn = MALLOC_STRUCT( dynfn );
r200ContextPtr rmesa = R200_CONTEXT(ctx);
if (R200_DEBUG & DEBUG_CODEGEN)
fprintf(stderr, "%s 0x%08x 0x%08x\n", __FUNCTION__, key[0], key[1] );
if (vb.texcoordptr[1] == vb.texcoordptr[0]+4) {
DFN ( _x86_MultiTexCoord2fvARB, rmesa->vb.dfn_cache.MultiTexCoord2fvARB );
FIXUP(dfn->code, 26, 0xdeadbeef, (int)vb.texcoordptr[0]);
FIXUP(dfn->code, 32, 0xdeadbeef, (int)vb.texcoordptr[0]+4);
} else {
DFN ( _x86_MultiTexCoord2fvARB_2, rmesa->vb.dfn_cache.MultiTexCoord2fvARB );
FIXUP(dfn->code, 19, 0x0, (int)vb.texcoordptr);
}
return dfn;
}
static struct dynfn *radeon_makeSSEMultiTexCoord2f( GLcontext *ctx, int key )
{
struct dynfn *dfn = MALLOC_STRUCT( dynfn );
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
if (RADEON_DEBUG & DEBUG_CODEGEN)
fprintf(stderr, "%s 0x%08x\n", __FUNCTION__, key );
if ((key & (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1)) ==
(RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1)) {
DFN ( _sse_MultiTexCoord2f, rmesa->vb.dfn_cache.MultiTexCoord2fARB );
FIXUP(dfn->code, 16, 0xdeadbeef, (int)rmesa->vb.texcoordptr[0]);
} else {
DFN ( _sse_MultiTexCoord2f_2, rmesa->vb.dfn_cache.MultiTexCoord2fARB );
FIXUP(dfn->code, 15, 0x0, (int)rmesa->vb.texcoordptr);
}
return dfn;
}
static struct _tnl_dynfn *makeX86Attribute1fv( GLcontext *ctx, int dest )
{
TNLcontext *tnl = TNL_CONTEXT(ctx);
DFN ( _tnl_x86_Attribute1fv, tnl->vtx.cache.Attribute[1-1], dest );
FIXUP(dfn->code, 0, 0, dest);
return dfn;
}
struct dynfn *r200_makeX86Normal3f( GLcontext *ctx, const int *key )
{
struct dynfn *dfn = MALLOC_STRUCT( dynfn );
r200ContextPtr rmesa = R200_CONTEXT(ctx);
if (R200_DEBUG & DEBUG_CODEGEN)
fprintf(stderr, "%s 0x%08x\n", __FUNCTION__, key[0] );
DFN ( _x86_Normal3f, rmesa->vb.dfn_cache.Normal3f );
FIXUP(dfn->code, 1, 0x12345678, (int)vb.normalptr);
return dfn;
}
static struct dynfn *radeon_makeSSEAttribute2f( struct dynfn * cache, int key,
const char * name, void * dest )
{
struct dynfn *dfn = MALLOC_STRUCT( dynfn );
if (RADEON_DEBUG & DEBUG_CODEGEN)
fprintf(stderr, "%s 0x%08x\n", name, key );
DFN ( _sse_Attribute2f, (*cache) );
FIXUP(dfn->code, 8, 0x0, (int)dest);
return dfn;
}
static void
freebsdPciCfgWrite(PCITAG tag, int off, CARD32 val)
{
struct pci_io io;
io.pi_sel.pc_bus = BUS(tag);
io.pi_sel.pc_dev = DFN(tag) >> 3;
io.pi_sel.pc_func = DFN(tag) & 7;
io.pi_reg = off;
io.pi_width = 4;
io.pi_data = PCI_CPU(val);
ioctl(pciFd, PCIOCWRITE, &io);
}
struct dynfn *r200_makeX86TexCoord2fv( GLcontext *ctx, const int *key )
{
struct dynfn *dfn = MALLOC_STRUCT( dynfn );
r200ContextPtr rmesa = R200_CONTEXT(ctx);
if (R200_DEBUG & DEBUG_CODEGEN)
fprintf(stderr, "%s 0x%08x 0x%08x\n", __FUNCTION__, key[0], key[1] );
DFN ( _x86_TexCoord2fv, rmesa->vb.dfn_cache.TexCoord2fv );
FIXUP(dfn->code, 5, 0x12345678, (int)vb.texcoordptr[0]);
return dfn;
}
CARD32 pcibusRead(pciTagRec tag, CARD32 reg)
{
CARD32 data;
ENTER_KERNEL_CRITICAL_SECTION();
PCIBios$ReadConfigDWord(pcibios, BUS(tag.cfg1),
DFN(tag.cfg1), reg, &data);
LEAVE_KERNEL_CRITICAL_SECTION();
return data;
}
static CARD32
freebsdPciCfgRead(PCITAG tag, int off)
{
struct pci_io io;
int error;
io.pi_sel.pc_bus = BUS(tag);
io.pi_sel.pc_dev = DFN(tag) >> 3;
io.pi_sel.pc_func = DFN(tag) & 7;
io.pi_reg = off;
io.pi_width = 4;
error = ioctl(pciFd, PCIOCREAD, &io);
if (error)
return ~0;
return PCI_CPU(io.pi_data);
}
struct dynfn *radeon_makeX86MultiTexCoord2fARB( GLcontext *ctx,
int key )
{
struct dynfn *dfn = MALLOC_STRUCT( dynfn );
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
if (RADEON_DEBUG & DEBUG_CODEGEN)
fprintf(stderr, "%s 0x%08x\n", __FUNCTION__, key );
if ((key & (RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1)) ==
(RADEON_CP_VC_FRMT_ST0|RADEON_CP_VC_FRMT_ST1)) {
DFN ( _x86_MultiTexCoord2f, rmesa->vb.dfn_cache.MultiTexCoord2fARB );
FIXUP(dfn->code, 20, 0xdeadbeef, (int)rmesa->vb.texcoordptr[0]);
FIXUP(dfn->code, 26, 0xdeadbeef, (int)rmesa->vb.texcoordptr[0]+4);
}
else {
/* Note: this might get generated multiple times, even though the
* actual emitted code is the same.
*/
DFN ( _x86_MultiTexCoord2f_2, rmesa->vb.dfn_cache.MultiTexCoord2fARB );
FIXUP(dfn->code, 18, 0x0, (int)rmesa->vb.texcoordptr);
}
return dfn;
}
static struct _tnl_dynfn *makeX86Vertex4fv( GLcontext *ctx, int vertex_size )
{
TNLcontext *tnl = TNL_CONTEXT(ctx);
DFN ( _tnl_x86_Vertex4fv, tnl->vtx.cache.Vertex[4-1], vertex_size );
FIXUP(dfn->code, 0, 0, (int)&tnl->vtx.vbptr);
FIXUP(dfn->code, 0, 1, vertex_size - 4);
FIXUP(dfn->code, 0, 2, (int)&tnl->vtx.vertex[4]);
FIXUP(dfn->code, 0, 0, (int)&tnl->vtx.vbptr);
FIXUP(dfn->code, 0, 3, (int)&tnl->vtx.counter);
FIXUP(dfn->code, 0, 3, (int)&tnl->vtx.counter);
FIXUP(dfn->code, 0, 4, (int)ctx);
FIXUPREL(dfn->code, 0, 5, (int)&_tnl_wrap_filled_vertex);
return dfn;
}
static struct dynfn *
radeon_makeX86Attribute3f( struct dynfn * cache, int key,
const char * name, void * dest )
{
struct dynfn *dfn = MALLOC_STRUCT( dynfn );
if (RADEON_DEBUG & DEBUG_CODEGEN)
fprintf(stderr, "%s 0x%08x\n", name, key );
DFN ( _x86_Attribute3f, (*cache) );
FIXUP(dfn->code, 14, 0x0, (int)dest);
FIXUP(dfn->code, 20, 0x4, 4+(int)dest);
FIXUP(dfn->code, 25, 0x8, 8+(int)dest);
return dfn;
}
struct dynfn *r200_makeX86Color3f( GLcontext *ctx, const int *key )
{
if (VTX_COLOR(key[0],0) != R200_VTX_FP_RGB)
return 0;
else
{
struct dynfn *dfn = MALLOC_STRUCT( dynfn );
r200ContextPtr rmesa = R200_CONTEXT(ctx);
if (R200_DEBUG & DEBUG_CODEGEN)
fprintf(stderr, "%s 0x%08x\n", __FUNCTION__, key[0] );
DFN ( _x86_Color3f_3f, rmesa->vb.dfn_cache.Color3f );
FIXUP(dfn->code, 1, 0x12345678, (int)vb.floatcolorptr);
return dfn;
}
}
struct dynfn *r200_makeX86Normal3fv( GLcontext *ctx, const int *key )
{
struct dynfn *dfn = MALLOC_STRUCT( dynfn );
r200ContextPtr rmesa = R200_CONTEXT(ctx);
int i = 0;
if (R200_DEBUG & DEBUG_CODEGEN)
fprintf(stderr, "%s 0x%08x\n", __FUNCTION__, key[0] );
DFN ( _x86_Normal3fv, rmesa->vb.dfn_cache.Normal3fv );
FIXUP2(dfn->code, i, 0x0, (int)vb.normalptr);
FIXUP2(dfn->code, i, 0x4, 4+(int)vb.normalptr);
FIXUP2(dfn->code, i, 0x8, 8+(int)vb.normalptr);
fprintf(stderr, "%s done\n", __FUNCTION__);
return dfn;
}
struct dynfn *radeon_makeX86Color4ub( GLcontext *ctx, int key )
{
if (RADEON_DEBUG & DEBUG_CODEGEN)
fprintf(stderr, "%s 0x%08x\n", __FUNCTION__, key );
if (key & RADEON_CP_VC_FRMT_PKCOLOR) {
struct dynfn *dfn = MALLOC_STRUCT( dynfn );
radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
DFN ( _x86_Color4ub_ub, rmesa->vb.dfn_cache.Color4ub );
FIXUP(dfn->code, 18, 0x0, (int)rmesa->vb.colorptr);
FIXUP(dfn->code, 24, 0x0, (int)rmesa->vb.colorptr+1);
FIXUP(dfn->code, 30, 0x0, (int)rmesa->vb.colorptr+2);
FIXUP(dfn->code, 36, 0x0, (int)rmesa->vb.colorptr+3);
return dfn;
}
else
return 0;
}
struct dynfn *r200_makeX86Color4ub( GLcontext *ctx, const int *key )
{
if (R200_DEBUG & DEBUG_CODEGEN)
fprintf(stderr, "%s 0x%08x\n", __FUNCTION__, key[0] );
if (VTX_COLOR(key[0],0) == R200_VTX_PK_RGBA) {
struct dynfn *dfn = MALLOC_STRUCT( dynfn );
r200ContextPtr rmesa = R200_CONTEXT(ctx);
DFN ( _x86_Color4ub_ub, rmesa->vb.dfn_cache.Color4ub );
FIXUP(dfn->code, 18, 0x0, (int)vb.colorptr);
FIXUP(dfn->code, 24, 0x0, (int)vb.colorptr+1);
FIXUP(dfn->code, 30, 0x0, (int)vb.colorptr+2);
FIXUP(dfn->code, 36, 0x0, (int)vb.colorptr+3);
return dfn;
}
else
return 0;
}
