__interrupt void TIMER0_B1_VECTOR_ISR(void)
#endif
{
switch(__even_in_range(TB0IV,14))
{
case 0: break; // No interrupt
case 2: break; // CCR1 not used
case 4: break; // CCR2 not used
case 6: break; // CCR3 reserved
case 8: break; // CCR4 reserved
case 10: break; // CCR5 reserved
case 12: // CCR6
/* INLINED because we don't want extra overhead of a function call */
/* This requires ~10 us */
{
current = TB0CCR6;
#if DEBUG_SOFTWARE_FLL
/* set debug pulse after reading count value */
DEBUG3_HIGH();
#endif
difference = current - previous;
/* Get current dco_mod value ignoring reserved bits */
ucs_dco_mod = (UCSCTL0 & MOD_MASK);
if ( FirstPassComplete == 'F')
{
if ( difference > EXPECTED_DELTA )
{
DecrementMod();
}
else if ( difference < EXPECTED_DELTA )
{
IncrementMod();
}
/* Write the value to the register */
UCSCTL0 = (ucs_dco_mod & MOD_MASK);
}
else
{
/* set flag and wait for next time */
FirstPassComplete = 'F';
}
previous = current;
TB0CCTL6 &= ~CCIFG;
#if DEBUG_SOFTWARE_FLL
DEBUG3_LOW();
#endif
}
break;
default:
break;
}
}
/* 400 us when doing work else 40 us */
static void SoftwareFllCycleIsr(void)
{
// Get current dco_mod value ignoring reserved bits
// this requires majority vote?
ucs_dco_mod = (UCSCTL0 & MOD_MASK);
count_d1 = count_d0;
count_d0 = TA0R;
/* check to make sure the value has been updated */
if ( ucs_dco_mod == ucs_dco_mod_saved )
{
if ( count_d0 > count_d1 )
{
count_diff = count_d0 - count_d1;
}
else
{
count_diff = 0xffff - count_d1;
count_diff = count_d1 + count_d0;
}
PrintDecimal(count_diff);
/* if there are more counts than expected then the SMCLK is running to slow */
if ( count_diff > EXPECTED_COUNTS + 3 )
{
IncrementMod();
}
else if ( count_diff < EXPECTED_COUNTS - 3 )
{
DecrementMod();
}
else
{
PrintString(".");
}
// Write the value to the register
UCSCTL0 = (ucs_dco_mod & MOD_MASK);
ucs_dco_mod_saved = ucs_dco_mod & MOD_MASK;
}
else
{
PrintString("$");
}
}
