//=============================================================================
int main(void)
{
LIGHT_init();
LCD_init();
LIGHT_on();
LCD_clear();
BEEP_init();
RTC_init();
RTOS_init();
RC5_Init();
RC5_Reset();
ENC_init();
KBD_init();
bmp180Init();
dht22Init();
rda5807Init();
rda5807PowerOn();
rda5807SetMute(1);
ds18x20SearchDevices();
LCD_goto(0, 0);
LCD_puts("POGODNAY STATION");
LCD_goto(0, 1);
LCD_puts(" VERSION 1.0 ");
_delay_ms(1000);
LCD_clear();
LCD_load_bignum();
ds18x20Process();
if (bmp180HaveSensor()) bmp180Convert();
dht22Read();
#if (DEBUG == 1)
if ((BUT_1_PINX & (1<<(BUT_1_PIN))) == 0) {
_delay_ms(100);
if ((BUT_1_PINX & (1<<(BUT_1_PIN))) == 0) {
RTOS_setTask(EVENT_SET_STATE_OPTION, 0, 0);
BEEP_beep();
while (((BUT_1_PINX & (1<<(BUT_1_PIN))) == 0)) { }
BEEP_beep();
}
}
#else
RTOS_setTask(EVENT_SET_STATE_OPTION, 0, 0);
BEEP_beep();
#endif
RTOS_setTaskFunc(set_blink, 0, 1000); // моргание
RTOS_setTaskFunc(KBD_scan, 0, 5); // запускаем опрос кнопок
RTOS_setTaskFunc(ENC_poll, 0, 1); // запускаем опрос енкодера
RTOS_setTaskFunc(RC5_scan, 0, 5); // запускаем опрос RC5
RTOS_setTask(EVENT_SET_SHOW, 0, 0); // запуск шоу
sei(); // Разрешили прерывания
while(1) {
RTOS_dispatchTask(); // Вызываем диспетчер в цикле.
}
}
U8 Ethernet_init(pETHERNET_Device ethernetDevice){
if (&(ethernetDevice->mac) == 0) return ETHERNET_MAC_NULL_POINTER;
ethDevice = ethernetDevice;
ethDevice->ethernetDevice=&spi_enc28j60_dev;
ENC_init(ethDevice->ethernetDevice);
/*Reset Enc28j60 to default values*/
/*ENC_system_reset_command();*/
/*6.1 Receive Buffer*/
ENC_WRITE_REG16(B0_ERXSTL,BANK00,__ETHERNET_RX_START_PTR__);
ENC_WRITE_REG16(B0_ERXNDL,BANK00,__ETHERNET_RX_END_PTR__);
ENC_WRITE_REG16(B0_ERXRDPTL,BANK00,__ETHERNET_RX_END_PTR__);
/*6.3 Receive Filters*/
ENC_WRITE_REG8(B1_ERXFCON,BANK01,PROMISCUOUS_MODE);
/*6.5 MAC Initialization Settings*/
ENC_WRITE_REG8(B3_MAADR1,BANK03,ethernetDevice->mac[0]);
ENC_WRITE_REG8(B3_MAADR2,BANK03,ethernetDevice->mac[1]);
ENC_WRITE_REG8(B3_MAADR3,BANK03,ethernetDevice->mac[2]);
ENC_WRITE_REG8(B3_MAADR4,BANK03,ethernetDevice->mac[3]);
ENC_WRITE_REG8(B3_MAADR5,BANK03,ethernetDevice->mac[4]);
ENC_WRITE_REG8(B3_MAADR6,BANK03,ethernetDevice->mac[5]);
ENC_WRITE_REG8(B2_MACON1,BANK02,MACON1_MARXEN);
ENC_WRITE_REG8(B2_MACON3,BANK02,MACON3_FRMLNEN + MACON3_TXCRCEN + MACON3_PADCFG0);
ENC_WRITE_REG8(B2_MACON4,BANK02,MACON4_DEFER);
ENC_WRITE_REG16(B2_MAMXFLL,BANK02,MAX_FRAME_LEN);
if ( ethernetDevice->duplex == ETHERNET_FULL_DUPLEX){
ENC_WRITE_REG8(B2_MABBIPG,BANK02,FULL_DUPLEX);
ENC_WRITE_REG16(B2_MAIPGL,BANK02,MAIPGH_FULL_DUPLEX);
}else{
ENC_WRITE_REG8(B2_MABBIPG,BANK02,HALF_DUPLEX);
ENC_WRITE_REG16(B2_MAIPGL,BANK02,MAIPGH_HALF_DUPLEX);
}
ENC_WRITE_REG8(ECON1,BANK02,ECON1_RXEN);
return ETHERNET_OK;
}
/**
* @brief
* */
U8 Ethernet_init(pETHERNET_Device ethernetDevice){
if (&(ethernetDevice->mac) == 0)
return ETHERNET_MAC_NULL_POINTER;
ethDevice = ethernetDevice;
/* Definition of Enc28j60 spi default values */
ethDevice->ethernetDevice.mode = SPI_PRIOR_TO_FIRST_SCK_RISING_EDGE;
ethDevice->ethernetDevice.role = SPI_MASTER;
ethDevice->ethernetDevice.nbrbits = 8;
ethDevice->ethernetDevice.byteShift = SPI_MSB;
ethDevice->ethernetDevice.started = 0;
/*Intialization of spi device of ethernet*/
if ( SPI_init(&(ethDevice->ethernetDevice),1) != SPI_SUCESS ){
return ETHERNET_SPI_INIT_ERROR;
}
ENC_init(ðDevice->ethernetDevice);
/*Reset Enc28j60 to default values*/
ENC_system_reset_command();
/*6.1 Receive Buffer*/
/*
ENC_write_reg(B0_ERXSTL,BANK00,__ETHERNET_RX_START_PTR__,true);
ENC_write_reg(B0_ERXNDL,BANK00,__ETHERNET_RX_END_PTR__,true);
ENC_write_reg(B0_ERXRDPTL,BANK00,__ETHERNET_RX_END_PTR__,true);
*/
ENC_WRITE_REG16(B0_ERXSTL,BANK00,__ETHERNET_RX_START_PTR__);
ENC_WRITE_REG16(B0_ERXNDL,BANK00,__ETHERNET_RX_END_PTR__);
ENC_WRITE_REG16(B0_ERXRDPTL,BANK00,__ETHERNET_RX_END_PTR__);
/*
ENC_write_reg(B1_ERXFCON,BANK01,PROMISCUOUS_MODE,false);
ENC_write_reg(B3_MAADR1,BANK03,ethernetDevice->mac[0],false);
ENC_write_reg(B3_MAADR2,BANK03,ethernetDevice->mac[1],false);
ENC_write_reg(B3_MAADR3,BANK03,ethernetDevice->mac[2],false);
ENC_write_reg(B3_MAADR4,BANK03,ethernetDevice->mac[3],false);
ENC_write_reg(B3_MAADR5,BANK03,ethernetDevice->mac[4],false);
ENC_write_reg(B3_MAADR6,BANK03,ethernetDevice->mac[5],false);
ENC_write_reg(B2_MACON1,BANK02,MACON1_MARXEN,false);
ENC_write_reg(B2_MACON3,BANK02,MACON3_FRMLNEN + MACON3_TXCRCEN + MACON3_PADCFG0,false);
ENC_write_reg(B2_MACON4,BANK02,MACON4_DEFER,false);
*/
/*6.3 Receive Filters*/
ENC_WRITE_REG8(B1_ERXFCON,BANK01,PROMISCUOUS_MODE);
/*6.5 MAC Initialization Settings*/
ENC_WRITE_REG8(B3_MAADR1,BANK03,ethernetDevice->mac[0]);
ENC_WRITE_REG8(B3_MAADR2,BANK03,ethernetDevice->mac[1]);
ENC_WRITE_REG8(B3_MAADR3,BANK03,ethernetDevice->mac[2]);
ENC_WRITE_REG8(B3_MAADR4,BANK03,ethernetDevice->mac[3]);
ENC_WRITE_REG8(B3_MAADR5,BANK03,ethernetDevice->mac[4]);
ENC_WRITE_REG8(B3_MAADR6,BANK03,ethernetDevice->mac[5]);
ENC_WRITE_REG8(B2_MACON1,BANK02,MACON1_MARXEN);
ENC_WRITE_REG8(B2_MACON3,BANK02,MACON3_FRMLNEN + MACON3_TXCRCEN + MACON3_PADCFG0);
ENC_WRITE_REG8(B2_MACON4,BANK02,MACON4_DEFER);
/*ENC_write_reg(B2_MAMXFLL,BANK02,MAX_FRAME_LEN,true);*/
ENC_WRITE_REG16(B2_MAMXFLL,BANK02,MAX_FRAME_LEN);
/**
* @todo
* Config Full Duplex
* *//*
if ( ethernetDevice->duplex == ETHERNET_FULL_DUPLEX){
ENC_write_reg(B2_MABBIPG,BANK02,FULL_DUPLEX,false);
ENC_write_reg(B2_MAIPGL,BANK02,MAIPGH_FULL_DUPLEX,true);
}else{
ENC_write_reg(B2_MABBIPG,BANK02,HALF_DUPLEX,false);
ENC_write_reg(B2_MAIPGL,BANK02,MAIPGH_HALF_DUPLEX,true);
}
ENC_write_reg(ECON1,BANK02,ECON1_RXEN,false);
*/
if ( ethernetDevice->duplex == ETHERNET_FULL_DUPLEX){
ENC_WRITE_REG8(B2_MABBIPG,BANK02,FULL_DUPLEX);
ENC_WRITE_REG16(B2_MAIPGL,BANK02,MAIPGH_FULL_DUPLEX);
}else{
ENC_WRITE_REG8(B2_MABBIPG,BANK02,HALF_DUPLEX);
ENC_WRITE_REG16(B2_MAIPGL,BANK02,MAIPGH_HALF_DUPLEX);
}
ENC_WRITE_REG8(ECON1,BANK02,ECON1_RXEN);
/*
* Prepare Software Buffer.
* */
/*
buffer_init(&rx_Buffer,&rx_Buffer_Space,__BUFFER_RX_SIZE__);
buffer_init(&tx_Buffer,&tx_Buffer_Space,__BUFFER_TX_SIZE__);
*/
return ETHERNET_OK;
}
/**
* @brief
* */
U8 Ethernet_init(pETHERNET_Device ethernetDevice){
if (&(ethernetDevice->mac) == 0)
return ETHERNET_MAC_NULL_POINTER;
ethDevice = ethernetDevice;
ethDevice->ethernetDevice=&spi_enc28j60_dev;
ENC_init((cyg_spi_lpc2xxx_dev_t*)(ethDevice->ethernetDevice));
/*Reset Enc28j60 to default values*/
ENC_system_reset_command();
/*6.1 Receive Buffer*/
/*
ENC_write_reg(B0_ERXSTL,BANK00,__ETHERNET_RX_START_PTR__,true);
ENC_write_reg(B0_ERXNDL,BANK00,__ETHERNET_RX_END_PTR__,true);
ENC_write_reg(B0_ERXRDPTL,BANK00,__ETHERNET_RX_END_PTR__,true);
*/
ENC_WRITE_REG16(B0_ERXSTL,BANK00,__ETHERNET_RX_START_PTR__);
ENC_WRITE_REG16(B0_ERXNDL,BANK00,__ETHERNET_RX_END_PTR__);
ENC_WRITE_REG16(B0_ERXRDPTL,BANK00,__ETHERNET_RX_END_PTR__);
/*6.3 Receive Filters*/
ENC_WRITE_REG8(B1_ERXFCON,BANK01,PROMISCUOUS_MODE);
/*6.5 MAC Initialization Settings*/
ENC_WRITE_REG8(B3_MAADR1,BANK03,ethernetDevice->mac[0]);
ENC_WRITE_REG8(B3_MAADR2,BANK03,ethernetDevice->mac[1]);
ENC_WRITE_REG8(B3_MAADR3,BANK03,ethernetDevice->mac[2]);
ENC_WRITE_REG8(B3_MAADR4,BANK03,ethernetDevice->mac[3]);
ENC_WRITE_REG8(B3_MAADR5,BANK03,ethernetDevice->mac[4]);
ENC_WRITE_REG8(B3_MAADR6,BANK03,ethernetDevice->mac[5]);
ENC_WRITE_REG8(B2_MACON1,BANK02,MACON1_MARXEN);
ENC_WRITE_REG8(B2_MACON3,BANK02,MACON3_FRMLNEN + MACON3_TXCRCEN + MACON3_PADCFG0);
ENC_WRITE_REG8(B2_MACON4,BANK02,MACON4_DEFER);
ENC_WRITE_REG16(B2_MAMXFLL,BANK02,MAX_FRAME_LEN);
/**
* @todo
* Config Full Duplex
* */
if ( ethernetDevice->duplex == ETHERNET_FULL_DUPLEX){
ENC_WRITE_REG8(B2_MABBIPG,BANK02,FULL_DUPLEX);
ENC_WRITE_REG16(B2_MAIPGL,BANK02,MAIPGH_FULL_DUPLEX);
}else{
ENC_WRITE_REG8(B2_MABBIPG,BANK02,HALF_DUPLEX);
ENC_WRITE_REG16(B2_MAIPGL,BANK02,MAIPGH_HALF_DUPLEX);
}
ENC_WRITE_REG8(ECON1,BANK02,ECON1_RXEN);
/*
* Prepare Software Buffer.
* */
/*buffer_init(&rx_Buffer,&rx_Buffer_Space,__ETHERNET_RX_BUFFER_SIZE__);
buffer_init(&tx_Buffer,&tx_Buffer_Space,__ETHERNET_TX_BUFFER_SIZE__);
*/
return ETHERNET_OK;
}
