int bcm_wlan_set_power(bool on) { int err = 0; if (on) { printk("======== PULL WL_REG_ON HIGH! ========\n"); #ifdef CONFIG_MACH_ODROID_4210 err = gpio_set_value(EXYNOS4_GPK1(0), 1); #endif #ifdef CUSTOMER_HW_ALLWINNER wifi_pm_power(1); #endif /* Lets customer power to get stable */ mdelay(100); } else { printk("======== PULL WL_REG_ON LOW! ========\n"); #ifdef CONFIG_MACH_ODROID_4210 err = gpio_set_value(EXYNOS4_GPK1(0), 0); #endif #ifdef CUSTOMER_HW_ALLWINNER wifi_pm_power(0); #endif } return err; }
void exynos4_setup_mshci_set_power(struct platform_device *dev, int en) { struct s3c_mshci_platdata *pdata = dev->dev.platform_data; unsigned int gpio = 0; if (pdata->int_power_gpio) { if (en) { /*CMD/CLK*/ for (gpio = EXYNOS4_GPK0(0); gpio < EXYNOS4_GPK0(2); gpio++) { s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); } /*DAT[0]~[3]*/ for (gpio = EXYNOS4_GPK0(3); gpio <= EXYNOS4_GPK0(6); gpio++) { s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); } /*DAT[4]~[7]*/ for (gpio = EXYNOS4_GPK1(3); gpio <= EXYNOS4_GPK1(6); gpio++) { s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); } gpio_set_value(pdata->int_power_gpio, 1); pr_info("%s : internal MMC Card ON samsung-mshc.\n", __func__); } else { gpio_set_value(pdata->int_power_gpio, 0); /*CMD/CLK*/ for (gpio = EXYNOS4_GPK0(0); gpio < EXYNOS4_GPK0(2); gpio++) { s3c_gpio_cfgpin(gpio, S3C_GPIO_INPUT); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_DOWN); } /*DAT[0]~[3]*/ for (gpio = EXYNOS4_GPK0(3); gpio <= EXYNOS4_GPK0(6); gpio++) { s3c_gpio_cfgpin(gpio, S3C_GPIO_INPUT); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_DOWN); } /*DAT[4]~[7]*/ for (gpio = EXYNOS4_GPK1(3); gpio <= EXYNOS4_GPK1(6); gpio++) { s3c_gpio_cfgpin(gpio, S3C_GPIO_INPUT); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_DOWN); } pr_info("%s : internal MMC Card OFF samsung-mshc.\n", __func__); mdelay(50); } } }
void exynos4_setup_mshci_cfg_gpio(struct platform_device *dev, int width) { unsigned int gpio; struct s3c_mshci_platdata *pdata = dev->dev.platform_data; #ifndef CONFIG_KERNEL_PANIC_DUMP //ly 20120412 early_printk("exynos4_setup_mshci_cfg_gpio\n"); #endif /* Set all the necessary GPG0/GPG1 pins to special-function 2 */ for (gpio = EXYNOS4_GPK0(0); gpio < EXYNOS4_GPK0(2); gpio++) { s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); if ( gpio == EXYNOS4_GPK0(0) ) s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); else s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); } /* if CDn pin is used as eMMC_EN pin, it might make a problem So, a built-in type eMMC is embedded, it dose not set CDn pin */ if ( pdata->cd_type != S3C_MSHCI_CD_PERMANENT ) { s3c_gpio_cfgpin(EXYNOS4_GPK0(2), S3C_GPIO_SFN(3)); s3c_gpio_setpull(EXYNOS4_GPK0(2), S3C_GPIO_PULL_UP); } switch (width) { case 8: for (gpio = EXYNOS4_GPK1(3); gpio <= EXYNOS4_GPK1(6); gpio++) { s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); } __raw_writel(0x2AAA, GPK1DRV); case 4: /* GPK[3:6] special-funtion 2 */ for (gpio = EXYNOS4_GPK0(3); gpio <= EXYNOS4_GPK0(6); gpio++) { s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); } __raw_writel(0x2AAA, GPK0DRV); break; case 1: /* GPK[3] special-funtion 2 */ for (gpio = EXYNOS4_GPK0(3); gpio < EXYNOS4_GPK0(4); gpio++) { s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); } __raw_writel(0xAA, GPK0DRV); default: break; } }
void bcm_wlan_power_off(int flag) { if (flag == 1) { printk("%s : device power off!\n", __func__); sdhci_s3c_force_presence_change(&sdmmc_channel, 0); mdelay(100); gpio_set_value(EXYNOS4_GPK1(0), 0); mdelay(100); } else { printk("%s : device power off skip!! (flag = %d)\n", __func__, flag); gpio_set_value(EXYNOS4_GPK1(0), 0); mdelay(100); } }
void bcm_wlan_power_off(int flag) { if (flag == 1) { printk("======== Card detection to remove SDIO card! ========\n"); #ifdef CONFIG_MACH_ODROID_4210 sdhci_s3c_force_presence_change(&sdmmc_channel, 0); mdelay(100); printk("======== PULL WL_REG_ON LOW! ========\n"); gpio_set_value(EXYNOS4_GPK1(0), 0); #endif } else { printk("======== PULL WL_REG_ON LOW! (flag = %d) ========\n", flag); #ifdef CONFIG_MACH_ODROID_4210 gpio_set_value(EXYNOS4_GPK1(0), 0); #endif } gpio_set_value(WL_REG_ON, 0); }
void bcm_wlan_power_on(int flag) { if (flag == 1) { printk("======== PULL WL_REG_ON HIGH! ========\n"); #ifdef CONFIG_MACH_ODROID_4210 gpio_set_value(EXYNOS4_GPK1(0), 1); /* Lets customer power to get stable */ mdelay(100); printk("======== Card detection to detect SDIO card! ========\n"); sdhci_s3c_force_presence_change(&sdmmc_channel, 1); #endif } else { printk("======== PULL WL_REG_ON HIGH! (flag = %d) ========\n", flag); #ifdef CONFIG_MACH_ODROID_4210 gpio_set_value(EXYNOS4_GPK1(0), 1); #endif } gpio_set_value(WL_REG_ON, 1); }
void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; unsigned int gpio; /* Set all the necessary GPK1[0:1] pins to special-function 2 */ for (gpio = EXYNOS4_GPK1(0); gpio < EXYNOS4_GPK1(2); gpio++) { s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); } for (gpio = EXYNOS4_GPK1(3); gpio <= EXYNOS4_GPK1(6); gpio++) { /* Data pin GPK1[3:6] to special-function 2 */ s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); } if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_cfgpin(EXYNOS4_GPK1(2), S3C_GPIO_SFN(2)); s3c_gpio_setpull(EXYNOS4_GPK1(2), S3C_GPIO_PULL_UP); s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); } }
void exynos4_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width) { struct s3c_sdhci_platdata *pdata = dev->dev.platform_data; unsigned int gpio; for (gpio = EXYNOS4_GPK1(0); gpio < EXYNOS4_GPK1(2); gpio++) { s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE); s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); } for (gpio = EXYNOS4_GPK1(3); gpio <= EXYNOS4_GPK1(6); gpio++) { s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP); s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); } if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) { s3c_gpio_cfgpin(EXYNOS4_GPK1(2), S3C_GPIO_SFN(2)); s3c_gpio_setpull(EXYNOS4_GPK1(2), S3C_GPIO_PULL_UP); s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4); } }
{EXYNOS4210_GPJ1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ {EXYNOS4210_GPJ1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ {EXYNOS4210_GPJ1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ {EXYNOS4210_GPJ1(3), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, {EXYNOS4210_GPJ1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ {EXYNOS4_GPK0(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK0(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK0(2), S3C_GPIO_SLP_OUT0, S3C_GPIO_PULL_NONE}, {EXYNOS4_GPK0(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK0(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK0(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK0(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ {EXYNOS4_GPK1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ {EXYNOS4_GPK1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ {EXYNOS4_GPK1(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK1(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK1(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK1(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK2(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK2(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK2(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, /* NC */ {EXYNOS4_GPK2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK2(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK2(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK2(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ {EXYNOS4210_GPJ0(5), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ {EXYNOS4210_GPJ0(6), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ {EXYNOS4210_GPJ0(7), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ {EXYNOS4210_GPJ1(0), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ {EXYNOS4210_GPJ1(1), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ {EXYNOS4210_GPJ1(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, S3C_GPIO_PULL_DOWN, S5P_GPIO_DRVSTR_LV1}, /* NC */ #endif {EXYNOS4_GPK1(1), S3C_GPIO_OUTPUT, S3C_GPIO_SETPIN_ZERO, S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, {EXYNOS4_GPK2(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE, S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV1}, /* PS_ALS_SDA_2.8V */ #if defined(CONFIG_TARGET_LOCALE_NA) /* GPIO_BT_EN */ {EXYNOS4_GPL0(4), S3C_GPIO_OUTPUT, S3C_GPIO_SETPIN_ZERO, S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV4}, /* GPIO_BT_nRST */ {EXYNOS4_GPL1(0), S3C_GPIO_OUTPUT, S3C_GPIO_SETPIN_ZERO, S3C_GPIO_PULL_NONE, S5P_GPIO_DRVSTR_LV4}, #endif /*CONFIG_TARGET_LOCALE_NA*/ #if defined(CONFIG_TARGET_LOCALE_NA) /* PS_ALS_SCL_2.8V */ {EXYNOS4_GPK3(2), S3C_GPIO_INPUT, S3C_GPIO_SETPIN_NONE,
{EXYNOS4_GPF3(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_NONE}, /* NC */ {EXYNOS4_GPF3(1), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /*BUCK2_SEL*/ {EXYNOS4_GPF3(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /*BUCK3_SEL*/ {EXYNOS4_GPF3(3), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /*BUCK4_SEL*/ {EXYNOS4_GPF3(4), S3C_GPIO_SLP_OUT1, S3C_GPIO_PULL_NONE}, {EXYNOS4_GPF3(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK0(0), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /*NAND_CLK*/ {EXYNOS4_GPK0(1), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /*NAND_CMD*/ {EXYNOS4_GPK0(2), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /*eMMC_EN*/ {EXYNOS4_GPK0(3), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /*NAND_D(0)*/ {EXYNOS4_GPK0(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /*NAND_D(1)*/ {EXYNOS4_GPK0(5), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /*NAND_D(2)*/ {EXYNOS4_GPK0(6), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /*NAND_D(3)*/ {EXYNOS4_GPK1(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK1(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK1(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK1(3), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /*NAND_D(4)*/ {EXYNOS4_GPK1(4), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /*NAND_D(5)*/ {EXYNOS4_GPK1(5), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /*NAND_D(6)*/ {EXYNOS4_GPK1(6), S3C_GPIO_SLP_PREV, S3C_GPIO_PULL_NONE}, /*NAND_D(7)*/ {EXYNOS4_GPK2(0), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK2(1), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK2(2), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK2(3), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK2(4), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK2(5), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN}, {EXYNOS4_GPK2(6), S3C_GPIO_SLP_INPUT, S3C_GPIO_PULL_DOWN},
.eint_offset = 0x8, .group = 16, .chip = { .base = EXYNOS4_GPK0(0), .ngpio = EXYNOS4_GPIO_K0_NR, .label = "GPK0", }, #ifdef CONFIG_MACH_SMDK4X12 // add by rongpin .pm = &s3c_gpio_pm_nop, #endif }, { .base = (S5P_VA_GPIO2 + 0x60), .eint_offset = 0xC, .group = 17, .chip = { .base = EXYNOS4_GPK1(0), .ngpio = EXYNOS4_GPIO_K1_NR, .label = "GPK1", }, }, { .base = (S5P_VA_GPIO2 + 0x80), .eint_offset = 0x10, .group = 18, .chip = { .base = EXYNOS4_GPK2(0), .ngpio = EXYNOS4_GPIO_K2_NR, .label = "GPK2", }, }, { .base = (S5P_VA_GPIO2 + 0xA0), .eint_offset = 0x14,
#include <linux/delay.h> #define LEDS_DEBUG #ifdef LEDS_DEBUG #define DPRINTK(x...) printk("LEDS_CTL DEBUG:" x) #else #define DPRINTK(x...) #endif #define DRIVER_NAME "leds" #if defined(CONFIG_CPU_TYPE_SCP_ELITE) || defined(CONFIG_CPU_TYPE_POP_ELITE) || defined(CONFIG_CPU_TYPE_POP2G_ELITE) static int led_gpios[] = { EXYNOS4_GPL2(0), EXYNOS4_GPK1(1), }; #elif defined(CONFIG_CPU_TYPE_SCP_SUPPER) || defined(CONFIG_CPU_TYPE_POP_SUPPER) || defined(CONFIG_CPU_TYPE_POP2G_SUPPER) static int led_gpios[] = { #if defined(CONFIG_MTK_COMBO_COMM) || defined(CONFIG_MTK_COMBO_COMM_MODULE) EXYNOS4_GPC0(2), #else EXYNOS4_GPX2(5), #endif EXYNOS4_GPX0(1), };